This brief presents an all-digital frequency synthesizer based on the flying adder (FA) architecture. The FA is a fascinating architecture for frequency synthesizer designs due to its simplicity and effectiveness. The FA-based frequency synthesizer can simply use a set of multiple phase reference signals to generate a desired frequency to achieve fast frequency switching. In the proposed work, the frequency synthesizer adopts an all-digital phase-locked loop to provide a steady reference signal for the FA. The proposed frequency synthesizer is implemented in a standard 0.18-μm CMOS cell-based technology, and the core area is 0.16 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The output frequency range is 39.38-226 MHz, and the peak-to-peak jitter is less than 130 ps.