Phase-locked Loop System Research Articles

Chaotic transition in a three-coupled phase-locked loop system.

The chaotic transition is observed in a three-coupled phase-locked loop (PLL) system in both experiments and numerical simulations. In this system, three PLL oscillators are connected with the periodic boundary condition. Intermittency is found in partially synchronized phase, in which two of three oscillators synchronize with each other and form a pair, and the chaotic transition occurs due to the recombination of synchronized pairs so that different pair is re-formed. In this phase, on-off intermittency is also observed and statistical analyses are carried out for on-off intermittent time series. This intermittency is considered as a hybrid type of intermittency with both on-off intermittency and intermittency due to the recombination of synchronized pairs present in the same time series. We also show the chaotic transition phenomena in a three-coupled logistic map system. (c) 2001 American Institute of Physics.

Study on chaotic synchronisation in a four-coupled phase-locked loop system

The paper describes chaotic synchronisation, observed both experimentally and numerically, in a four-coupled phase-locked loop (PLL) system. The system consists of four PLLs and four couplers, constructed with four operational amplifiers. Each subsystem shows chaos and is described by a set of differential equations with seven degrees of freedom. When the synchronisation behaviour among these subsystems is observed, it is found that a subsystem easily synchronises with a subsystem positioned diagonally opposite, but hardly does so with adjacent subsystems. The on-off intermittency is observed for the difference between a couple of diagonally positioned subsystems. The chaotic transition of synchronised states in two diagonal pairs is investigated. From calculation of the local transverse Lyapunov exponent, it is considered that two hyperplanes exist in the phase space, and the phase point itinerates via the two planes.

Phase Lock-In of MM/SUBMM Backward Wave Oscillators: Development, Evolution, and Applications

The development and evolution of a Phase-Lock Loop (PLL) system up to the highest frequencies of Backward Wave Oscillators (BWO) is considered starting from the first submillimeter BWO PLL in 1970. Improvements and increase of working range near to Terahertz are followed. Development of the series of commercial BWO-based millimeter wave frequency synthesizers, extension of the BWO PLL beyond Terahertz as well as recent progress in fast millimeter wave frequency synthesizers are described. Applications of BWO PLL systems for physical and technical measurements are discussed and some proposals for the next generation of BWO-based synthesizers are presented.

Supply noise insensitive PLL design through PWL behavioral modeling and simulation

This brief presents a design flow for a supply noise insensitive (SNI) phase-locked loop (PLL). The influence on the PLL jitter of each noise component having high/low bandpass filter characteristics is investigated in the time domain. Acquisition time, tracking range, lock range and jitter are key parameters of a PLL system, and they are evaluated with piecewise linear (PWL) behavioral modeling. Finally, the SNI-PLL circuit having worst-case -45-dB power supply noise rejection based on the behavioral simulation results is implemented.

A phase-locked loop system for 7–18 and 37.5–78-GHz commercial microwave generators

A phase-locked loop system for widespread Γ4–84, Γ4–111, Γ4–141, and Γ4–142 microwave generators, whose operating ranges cover a frequency range of 7–78 GHz, is described. The phase-locked loop uses a rubidium frequency standard.

A digital implementation of a frequency steered phase locked loop

A digital implementation of a new technique that delivers an extremely accurate and stable phase locked loop system (PLL) is presented. The new technique uses competing phase and frequency loops to incorporate an accurate local reference frequency into the phase locked loop structure. Disturbances on the phase loop caused by the digital frequency loop are identified and a method to mitigate the disturbances is developed. The implementation is primarily designed for high-speed clock and data recovery and experimental results from a clock recovery system for nonreturn to zero data streams at 155.52 MHz are presented.

A phase tracking system for three phase utility interface inverters

The analysis and design of the phase-locked loop (PLL) system is presented for the phase tracking system of the three phase utility interface inverters. The dynamic behavior of the closed loop PLL system is investigated in both continuous and discrete-time domains, and the optimization method is considered for the second order PLL system. In particular, the performance of the three phase PLL system is analyzed in the distorted utility conditions such as the phase unbalancing, harmonics, and offset caused by the nonlinear load conditions and measurement errors. The tracking errors under these distorted utility conditions are also derived. The phase tracking system is implemented in a digital manner using a digital signal processor (DSP) to verify the analytic results. The design considerations for the phase tracking system are deduced from the analytic and experimental results.

A phase-locked loop system for the difference frequency of two lasers

A system for phase locking of the difference frequency of two identifical lasers to an intermediate frequency (1–10 MHz) is described. The control channel is divided into two channels (fast and slow) for enhancing the speed of response at a significant range of the control effect. The system can be applied to different (gas and semiconductor) type of lasers. The phase is kept within an interval of 0.5 π at perturbations of up to 0.1 kg·m/s. The perturbation suppression coefficient at frequencies of 0.001–500 Hz isK(f)=107/f.

Cooperative phenomena observed in a globally coupled phase-locked loop system

The authors describe cooperative phenomena observed in a globally coupled 8-phase-locked loop (PLL) system in both experiments and simulations by using SPICE. In the present system, each PLL is connected through the coupler that averages the all PLLs' output signals. When the frequency modulated external force is applied, three phases are observed such as (1) the coherent phase in which all subsystems are synchronized, (2) the turbulent phase in which all subsystems oscillate independently, and (3) the partially synchronized phase in which creation of clusters and chaotic itineracy due to the reconstruction of clusters occur. In the partially synchronized phase, the time series of voltage difference between arbitrary two subsystems shows an intermittency. From the statistical analysis for this intermittency it is found that the distribution functions of burst amplitude and laminar duration time show the -1 power law and -1.5 power law, respectively. These properties agree with those of the on-off intermittency. We also investigate the variation of number of cluster in the partially synchronized phase. The distribution function of the duration time of one-cluster state, namely the residence time in the state in which all subsystems are synchronized with each other, is also expressed as the -1.5 power law.

Phase-locked loop for grid-connected three-phase power conversion systems

Analysis and design of a phase-locked loop (PLL) is presented for the power factor control of grid-connected three-phase power conversion systems. The dynamic characteristics of the closed loop PLL system with a second order are investigated in both continuous and discrete-time domains, and the optimisation method is discussed. In particular, the performance of the PLL in the three-phase system is analysed under the distorted utility conditions such as the phase unbalancing, harmonics, and offset caused by nonlinear loads and measurement errors. The PLL technique for the three-phase system is implemented in software of a digital signal processor to verify the analytic results, and the experiments are carried out for various utility conditions. This technique is finally applied to the grid-connected photovoltaic power generation system with the current-controlled PWM inverter as a subpart for generating the current reference of the inverter. The experimental results demonstrate its phase tracking capability in the three-phase grid-connected operation.

On–off intermittency observed in a mutually coupled phase-locked loop system

On–off intermittency is observed in a mutually coupled phase-locked loop (PLL) system for both experiments and simulations. The system has two couplers between two PLLs for coupling and is designed to give good correspondence with dynamic systems with a periodic potential. In simulations, numerical calculations are performed on the governing equations of the PLL. In experiments, PLL IC modules and op-amps are used as PLL-cores and key components of couplers, respectively. The simulation results show coincidence with those of experiments. The properties of the burst signal in the observed intermittent signal are: the –1 power law of the amplitude distribution; and the –1.5 power law of the laminar duration time distribution. The power laws agree with the proper statistical features of the on–off intermittency.

COMMUNICATIONS USING CASCADE COUPLED PHASE-LOCKED LOOP CHAOS

It has been shown that chaotic signal can be obtained from cascade coupled phase-locked loop systems in a broad region of parameter variation. In this paper we demonstrate by computer simulation that the cascade coupled PLLs may be a useful tool for the solution of the problem of synchronization of two PLL systems in the regime of chaotic oscillations (with stabilized average frequency). We give an example of using cascade coupled PLLs for data communication by means of the chaotic signal.

Impulse control of chaos in continuous systems

Several methods of nonconstant feedback impulse control of chaos are proposed. The approach is based on the similarity of the return maps of dissipative continuous-time systems with one-dimensional maps and has a clear geometrical interpretation. The methods are illustrated for Chua's circuit, the Rössler oscillator, and the phase-locked loop system.

Intermittent chaos in a mutually coupled PLL's system

Novel intermittent chaos is experimentally observed in a mutually coupled phase-locked loop system, which is constructed mainly of two commercial phase-locked loops used as nonlinear oscillators and two op amps used as couplers. This intermittent chaos has similar statistical properties as the on-off intermittency.

Properties of optical phase-locked loop based on four wave mixing in semiconductor laser amplifiers

In this paper, the properties of the optical phase-locked loop(PLL) based on the four-wave mixing in the semiconductor laser amplifiers (SLAs) are discussed. The components that achieve the function of detecting the bit phase of the input optical signal are concerned and discussed in detail together as a function module named as the optical bit phase detector referred to the general electronic PLL. Therefore, most of the properties of the optical PLL can be analyzed by applying the general phase-locked theory. Here the stability of the optical PLL is discussed. It's shown that the variance of input signal power in the practical application will cause optical PLL system unstable because of its long loop delay. The influence on the output phase jitter of the optical PLL is also investigated.

A study of digital auto equalizer and PLL system using maximum likelihood error for digital VCRs

A newly developed compact digital auto equalizer and phase locked loop (PLL) system with original algorithms has solved the problems of digital auto equalizer systems using maximum likelihood error (MLE). It realizes experimentally fully automatic and practical size systems. An example of of a corresponding digital VCR is discussed.

Synchronous weld pool oscillation for monitoring and control

A novel approach for inducing and monitoring oscillations in a molten weld pool is presented. Recent research efforts have illustrated that the weld pool resonates at natural frequencies that are related to its dimensions and state of penetration. This phenomenon may be used to monitor the weld pool, particularly its depth of penetration, in a closed-loop feedback control system. The approach used to induce pool oscillations was to excite the weld pool with current pulses synchronized to the natural oscillations of the pool. Implementation of this synchronous weld pool pulsing technique was based on the use of a phase-locked loop (PLL) system. The natural weld pool oscillations are used as the reference frequency source and a pulsing circuit is controlled by the PLL oscillator, so that the arc current pulses repeatedly impact the pool after a fixed number of reference oscillation periods. An optical sensor detects the pool oscillations which are amplified, filtered, and limited to eliminate amplitude variations from the optical signal. A model of the weld pool is developed which uses a fluid droplet formulation for the relation of weld pool geometry and other physical parameters to the natural frequencies of the weld pool. Comparison of the weld pool's actual resonant frequency with the expected resonant frequency as predicted by weld pool geometry models and measurements of the pool width (or area) allows assessment of the state of penetration of the weld pool into the workpiece.

Operation of a phase locked loop system under distorted utility conditions

Operation of a phase locked loop (PLL) system under distorted utility conditions is presented. A control model of the PLL system is developed and recommendations are made on tuning of this model specially for operation under common utility distortions such as line notching, voltage unbalance/loss, and frequency variations. The PLL is completely implemented in software without any filters. All analytical results are experimentally verified.

A PLL-based frequency synthesizer for 160-MHz double-sampled SC filters

This paper describes a clock generator for a double-sampled switched capacitor (SC) filtering system. The circuit is based on a fast charge-pump phase-locked loop (PLL) system that multiplies an external reference clock signal by a factor of eight and also ensures a high precision and stability of two internal nonoverlapped clock phases up to 80 MHz. This allows the driving of double-sampled SC filters up to 160 MHz sampling rate. The PLL is a third-order system with a bandwidth of 100 kHz and a lock-in time of 15 /spl mu/s. The output clock jitter is 170 ps r.m.s. The total power consumption at 160 MHz is 25 mW and the total chip area is about 1 mm/sup 2/.

Interrupted ultrasonic bolt load measurements using the pulsed phase-locked loop system

A method of reacquiring a previous phase lock-point using the pulsed phase-locked loop (PPLL) ultrasonic system in situations where the measurement is interrupted such as by removing and recoupling the transducer is developed. Operation of the PPLL is mathematically analyzed in the time domain rather than in the conventional frequency domain, providing a method of characterizing multiple lock-points. The general lock-point reacquisition method that follows from the model relies on measurement over a frequency range that spans several lock-points and is demonstrated to work well for interrupted measurements on threaded fasteners. The method is analyzed for sensitivity to signal noise, and an equation is derived, expressing the number of lock-points over which to measure for successful lock-point reacquisition as a function of signal noise level. Experimental verification on a glass block shows that theoretical values obtained with this model are in good agreement with measurements. Automation of the method presented has been demonstrated, showing that it offers a practical, objective approach to making interrupted load measurements, thereby greatly widening the range of applications of the PPLL.