Phase Disposition Pulse Width Modulation Research Articles

Control Methods on Three-phase Power Converters in Photovoltaic Systems

<span lang="EN-US">In this paper, a three-phase load connected to a NPC three-level inverter is presented. To generate gate signals for the multilevel inverter, two commands are developed and compared: the phase disposition pulse width modulation (PDPWM) and the space vector pulse width modulation (SVPWM). DC supply is provided by photovoltaic cells. Boost converter controls the power transfer from photovoltaic generator. Due to nonlinear I-V characteristics of photovoltaic cells, a maximum power point tracking algorithm is adopted to maximize the output power, the nonlinear controller (sliding mode) is developed and simulated. To verify the effectivnesse of the introdueced controller, it is compared with the fuzzy logic controller. Matlab-simulink is used for simulation, analysis and interpretation the results of these controllers.</span>

Three-phase multilevel inverter for grid-connected distributed photovoltaic systems based in three three-phase two-level inverters

A multilevel three-phase voltage source inverter (VSI) for distributed grid-connected photovoltaic system is proposed in this paper. This multilevel inverter is based on a new topology using three three-phase two-level VSIs (T3VSI) with isolation transformer. The photovoltaic panels are connected at the DC side of each three-phase VSI. The three-phase VSIs AC sides are connected to the three-phase isolation transformer with primary open-end windings, ensuring multilevel operation. The T3VSI can be modulated using existing multilevel Pulse Width Modulation (PWM) schemes. A control system designed to ensure the transfer of the energy generated by the PV generators to the grid is also presented, together with a Phase Disposition PWM (PDPWM) adapted for the multilevel T3VSI. Tests of the grid-connected PV multilevel T3VSI will be shown through simulation and experimental results. Several results obtained from experiments confirm the expected characteristics of the multilevel T3VSI photovoltaic system.

Developed Z-Source H-Bridge Multilevel Inverter with Reduced Components for Speed Control of Induction Motor

This paper introduces a new developed H-bridge based cascaded multilevel inverter with reduced components. This topology has a low complexity thereby reducing the overall cost of an inverter. The proposed circuit is connected with a PI controller and switches are controlled by pulse width modulation technique to control the speed of an induction motor. The simulation was carried out using Matlab / Simulink. The simulation of the same was made and performance of various PWM techniques such as Phase disposition (PD), Phase opposite disposition (POD) and phase shifted (PS) and there results were compared on different quantitative measures such as Voltage, current stator Total harmonic Distortion, Voltage stress and rise time. It was observed that that the proposed power circuit with Phase disposition pulse width modulation (PDPWM) that offers reduced total harmonic Detection in terms of voltage, current and phase was found to be very less when compared to other Pulse width modulation techniques. The simulation results will have a fast and quick rise time thereby making this inverter a choice for speed control of induction motor.

Single‐phase multilevel inverter based on switched‐capacitor structure

This study proposes a new topology for multilevel inverters based on switched-capacitor structure. The proposed topology uses capacitor charged/discharged characteristic to boost the output voltage without employing magnetic elements. The proposed circuit configuration has fewer components, including switches, voltage sources, and capacitors comparing with the conventional similar topologies. A phase disposition pulse-width modulation method is used to enhance the output waveform quality of the proposed inverter. Nine-level and 17-level configurations are simulated. To verify the operating principle, the experimental results for a nine-level inverter topology are presented.

Modular multi-level converter-based DFIG wind power system with MMC-STATCOM

ABSTRACT Transmission and distribution conversion operation, voltage, current magnitude variation and time-to-time power flow change through grid are the major issues in power system. Variable wind energy system is more popular for power generation through conventional converters and hence harmonic reduction is very less in these converters. In this paper, 9 MW modular multi-level converter-based DFIG wind energy power system parameters are compared with 9 MW DFIG systems using conventional converter. DFIG is operated in four mode condition with proper back-to-back power electronic converters and controllers. In power electronics, the modular multi-level converters are more advanced for reducing transients, peak response oscillations and improving the efficiency of the system. A five-level MMC has been applied in back-to-back converter with phase disposition (PD) PWM technique for DFIG wind system of the same rotor side controller and grid side controller. A conventional converter-based DFIG wind energy system is replaced with five-level MMC-based system with level shift PD-PWM technique. The impact of MMC on DFIG wind energy system is reduced voltage and current harmonics fast settling time compared to conventional converter-based DFIG system. The above MMC DFIG power system voltage is balanced at fault condition with MMC-STATCOM.

Comparative Analysis of Various Z-source Based Five Level Cascaded H-bridge Multilevel Inverter

Z-source based multilevel inverters are the recent topologies as they have boosting ability and near sinusoidal output waveforms. This paper proposes different inverter topologies such as Z-source multilevel inverter and quasi Z-source multilevel inverter. This paper also deals with switched inductor and improved switched inductor topologies with quasi Z-network. The proposed switched inductor system reduces the voltage stresses caused by capacitors, power devices and diodes. In addition to multilevel inverter advantages, the proposed configuration employs Z-source inverter advantages. The Z-source inverter as compared to the traditional inverter is less costly, less complex, more efficient and more reliable. The performance of the proposed configurations is analysed by varying passive elements in impedance network and is simulated in MATLAB/SIMULINK. Phase disposition (PD) pulse width modulation (PWM) technique is applied on the proposed configurations and performance parameters are measured by the fast Fourier transform FFT analysis. The object of this paper is to develop an inverter which is used for variable speed drives with increase in output voltage by eliminating transformer and filter circuit. The performance is checked with standared parameter of the inverter.

Single-Carrier Phase-Disposition PWM Techniques for Multiple Interleaved Voltage-Source Converter Legs

Interleaved converter legs are typically modulated with individual carriers per leg and phase-shifted pulse width modulation (PS-PWM) as it facilitates current balancing amongst the legs. Phase-disposition PWM (PD-PWM), despite the better harmonic performance, cannot be directly used due to the resulting current imbalance that may damage the converter. This paper addresses the current sharing issue and proposes a sorting algorithm implementation that enables single-carrier PD-PWM technique for interleaved two-level converter legs. An extension of the proposed algorithm through a switching state feedback loop, limiting the average switching frequency, is also developed. In both cases, the output current is of high quality and shared amongst the phase-legs, while the deviation between the phase-leg currents is well regulated. Simulation results demonstrate the general function of method for multiple interleaved legs as well as its current sharing capabilities for high-power applications. Experimental results from a low-power laboratory prototype validate the operation of the proposed approach.

A Modified Phase Disposition Pulse Width Modulation to Suppress the Leakage Current for the Transformerless Cascaded H-Bridge Inverters

Transformerless cascaded H-bridge inverters have the advantages of low cost and high efficiency in low-power applications. However, the leakage currents resulting from the parasitic capacitors may increase system losses, electromagnetic interference, and safety concerns. To reduce the leakage current, this paper first establishes the equivalent common-mode circuit of the inverter with the parasitic capacitance and analyzes the characteristics of leakage current in the symmetrical and asymmetrical filter inductance circuit, respectively. The analysis shows that the traditional phase disposition pulse width modulation or phase-shift pulse width modulation cannot solve the leakage current issues, but modifying the modulation methods can eliminate the system leakage current in the symmetrical circuit, and it has a little effect in the asymmetrical circuit. For this reason, a modified phase disposition pulse width modulation for the symmetrical circuit, which can eliminate the leakage current effectively with simple implementation, is proposed. Simulation and experimental results are reported, along with evaluation and comparison results, against a conventional carrier-based pulse width modulation method.

NPC Multilevel Photovoltaic Inverter with Nonlinear MPPT Using Boost Converter

This work proposes an advanced control of power converters used in photovoltaic solar energy. The boost converter and NPC three level inverter are usually associated with photovoltaic cells. A maximum power point tracking algorithm is adopted in this case to maximize the output power by using the sliding mode control approach. For three level inverter, five command strategy is applied in order to compare their performances: PDPWM (Phase Disposition PWM), PODPWM (Phase Opposition Disposition PWM), APODPWM (Alternative Phase Opposition Disposition PWM), COPWM (Carrier Overlapping PWM), PSPWM (Phase Shift PWM). The total harmonic distortion (THD) is evaluated for the various modulation index. Finally, validity and effectiveness are verified through a simulation in Matlab/Simulink.

Performance Comparison of Star Connected Cascaded STATCOM Using Different PWM Techniques

<p><span>Five control algorithms are presented in this paper for STATCOM that meets the requirement of load reactive power and correspondingly voltage balancing of isolated dc capacitors for H-bridges. The control techniques used for an inverter in this paper are Sinusoidal Phase Shifted Carrier (SPSC) PWM, Sinusoidal Phase Disposition (SPD) PWM Third Harmonic Injected Phase Shifted Carrier (THIPSC) PWM, Space Vector Phase Shifted Carrier (SVPSC) PWM, and Space Vector Phase Disposition (SVPD) PWM techniques. The STATCOM performance for the different load changes is simulated in MATLAB environment. The performance parameters such as balancing the DC link voltage, THD for the STATCOM output currents, voltages, and reactive components supplied by the STATCOM to the load are compared for all the control strategies.</span></p>

A new topology for cascaded H-bridge multilevel inverter with PI and Fuzzy control

This paper presents a new configuration of switches for H-bridge multilevel inverter (MLI) to provide five voltage levels as output. Also in this paper, two H-Bridges are joined in cascaded fashion to provide output of a nine level inverter. The multi carrier based level shifting phase disposition pulse width modulation (LS-PD-PWM) technique is proposed to reduce the percentage of Total harmonic distortion (THD). The cascaded H-Bridge inverter is governed with proportional integral (PI) and Fuzzy logic controller (FLC) to reduce the THD at the output. The simulation results are validated using MATLAB/SIMULINK environment.

Double-Carrier Phase-Disposition Pulse Width Modulation Method for Modular Multilevel Converters

Modular multilevel converters (MMCs) have become one of the most attractive topologies for high-voltage and high-power applications. A double-carrier phase disposition pulse width modulation (DCPDPWM) method for MMCs is proposed in this paper. Only double triangular carriers with displacement angle are needed for DCPDPWM, one carrier for the upper arm and the other for the lower arm. Then, the theoretical analysis of DCPDPWM for MMCs is presented by using a double Fourier integral analysis method, and the Fourier series expression of phase voltage, line-to-line voltage and circulating current are deduced. Moreover, the impact of carrier displacement angle between the upper and lower arm on harmonic characteristics is revealed, and further the optimum displacement angles are specified for the circulating current harmonics cancellation scheme and output voltage harmonics minimization scheme. Finally, the proposed method and theoretical analysis are verified by simulation and experimental results.

Elimination of Low-Frequency Ripples and Regulation of Neutral-Point Voltage in Stacked Multicell Converters

This paper introduces a modulation method for the stacked multicell converters (SMCs). The proposed method is implemented using phase-disposition pulse width modulation and is capable of balancing and regulating the voltages of all the capacitors in the topology, i.e., the flying capacitors and the dc-link capacitors. The proposed method is also able to eliminate the low-frequency voltage ripples that may appear in the neutral point (NP) of SMCs. In SMCs with two stacks, the NP voltage level can be generated by direct connection of the output to the dc-link NP, but also using two extra states available. This redundancy is used to regulate the NP voltage. Furthermore, since the proposed method can eliminate the low-frequency voltage ripples in the capacitors, the capacitances of all the capacitors of the SMCs can be reduced, while maintaining high quality of the output voltages and currents. This enables the use of film capacitors. Simulation and experimental results are presented from a three-phase five-level $2\times 2$ SMC to verify the effectiveness of the proposed method.

A Switched Inductor Quasi Z source-H-bridge Multilevel Inverter for Soft starting Control of Induction Motor using Direct Torque and Flux Control

An impedance source multilevel inverter schemes applied for traction and industrial drives application. Because it has unique merits ofharmonics less, transformer less drives control application and also soft start capability of induction drives. This paper proposed a reduced source z source Hbridge multilevel inverter and it is applied for induction motor drive control. In order to improving performance of induction motor performance, the torque and speed control is achieved using Direct Torque and Flux Control (DTFC)via phase voltage and current magnitude control. The proposed control scheme of Direct Torque and Flux Control (DTFC) is calculated through phase voltage and phase current sensing and then stator torque and flux is to be calculated byseparate estimation scheme. In reduced source Z source H-bridge multilevel inverter schemes, z source circuit gives a soft start capability across induction motor drive by controlling power magnitude across DC-Link. Reduced source is achieved using capacitor balancing circuit using a common DC-source. A single carrier and multi-reference of Phase Opposition and Disposition (POD) pulse width modulation topology is uses for proposed reduced source z source Multilevel Inverter for soft start control of induction motor.

Novel Asymmetrical Pulse Width Modulation Method

The paper proposes new asymmetrical PWM that can be used for operation of multilevel inverters. The working and construction principle of this PWM is demonstrated on 13-level PWM signal that is applied to nine-level inverter and operates it as 13-level inverter. The proposed PWM signal consists of 5-level hybrid PWM which is constructed from two PWM signals- combined parts of the standard 5-level Phase Disposition (PD) PWM and pulsed PWM. The sum of these two PWM signals produces the desired 13-level PWM signal that is applied to the 9-level cascaded inverter. The proposed PWM method allows reduction of 13-level inverter components compared to the standard topologies such as neutral point clamped or flying capacitor inverters. This results in smaller size, weight and cists of the inverter.. Extensive simulation results validate the practicability of the proposed PWM method. The proposed method can be extended to any desired number of levels.

A Method for the Suppression of Fluctuations in the Neutral-Point Potential of a Three-Level NPC Inverter With a Capacitor-Voltage Loop

This paper investigates the problem of fluctuation of the neutral-point potential (NPP) in a three-level NPC inverter with a capacitor-voltage loop. The phase pulse width duty cycle disturbance pulse width modulation (PWM) method is proposed to suppress the NPP fluctuation efficiently. Based on the basic carrier-based phase-disposition PWM method, the average pulse neutral-point current model is established. Then, the frequency, amplitude, and equivalent initial phase of the NPP fluctuation are analyzed based on the current model. According to the alternating error of the dc-link capacitor voltages, a capacitor-voltage loop with a quasi-proportional resonant (PR) controller is presented. The control variable, which varies with the modulation index, phase current, load power factor, etc., can be obtained from the quasi-PR controller. Finally, an experimental three-level NPC inverter is described and the validity and feasibility of the proposed method are verified by experimental results.

Neutral Point Clamped and Cascaded H-Bridge Multilevel Inverter Topologies – A Comparison

Objectives: This work emphasizes on the analysis of two five levels inverter topologies - neutral point clamped topology and Cascaded H-Bridge inverter topology. Methods/Analysis: The neutral point clamped topology requires only one DC source, eight switches and four clamping diodes with two voltage balancing capacitors. The cascaded topology carries two voltage sources and eight switching devices. Phase disposition pulse width modulation technique generates gating pulses for both the multilevel inverter topologies. All the simulations are done in MATLAB-Simulink simulation environment. Findings: The output waveforms, switching stress and harmonic spectrum of the output waveforms of both the inverter topologies are obtained using phase disposition pulse width modulation technique for a modulation index of unity. Moreover, the work aims to perform a comparison of both the inverter topologies with respect to total harmonic distortion, switch stress and complexity of the topology. It is found that though a cascaded inverter needs less overall components when compared to neutral point clamped inverter, yet both the inverter topologies carries the same stress across their switches and produce an almost the same harmonic distortion on their output waveforms. Applications/Improvement: Conventional voltage source inverters are gradually being replaced by multilevel inverters in various applications like photovoltaic systems, reactive power compensators, FACTS devices, adjustable speed drives etc. The stress across each of the switches gets decreased in both the multilevel inverter topologies compared to conventional inverters. Further, neutral point clamped inverters carry the advantage of requiring only one DC source for its operation.

A Flying-Capacitor-Clamped Five-Level Inverter Based on Bridge Modular Switched-Capacitor Topology

A novel flying-capacitor-clamped five-level inverter based on bridge modular switched-capacitor topology is proposed in this paper. The inverter features the switched-capacitor circuit with dc–dc boosting conversion ability and the multilevel inverter circuit with flying-capacitor-clamped performance. With the special composite structure, the number of components is cut down compared to the topology of the conventional cascaded multilevel inverter. Meanwhile, part of switches can be operated under line voltage frequency, resulting in switching loss reduction. Hence, the potential of system efficiency and power density is released due to embed switched-capacitor circuit. More importantly, the optimized carrier-based phase disposition pulse width modulation method is employed as a control strategy. Under this control strategy, the capacitor voltage self-balance can be realized and quality of output waveforms can be improved significantly. After simulation, the prototype is built to validate the correctness and practicability of the analysis.

Common-Mode Reduction for ANPC With Enhanced Harmonic Profile Using Interleaved Sawtooth Carrier Phase-Disposition PWM

Multilevel active neutral-point-clamped (ANPC) converter is popularly known for its higher medium voltage drives up to 6.9 kV. However, common-mode voltages (CMV) are generated when using the well-established carrier-based pulse width modulation (PWM) modulation technique. As a result, CMV will become the major cause of the premature bearing failures and the conducted electromagnetic interferences. In this paper, a reduced CMV strategy is proposed for the ANPC which employs an alternatively new hybrid carrier-based modulation named as interleaved sawtooth carrier phase-disposition PWM (ISC-PD-PWM). By doing so, enhanced harmonic profile is achieved as compared to the typically used classical phase-shifted carrier PWM (PSC-PWM). Therefore, a comparative evaluation of the seven-level (7L) ANPC performance using the proposed reduced CMV approach is made between the novel hybrid ISC-PD-PWM and the conventional PSC-PWM in terms of harmonic analysis. The experimental results have proven the feasibility of the proposed concepts with the CMV effectively reduced. Such perceived merits make ANPC be more attractive for its motor drives.

A Novel Generalized Topology for Multi-level Inverter with Switched Series-Parallel DC Sources

<p>This paper presents a novel topology of Single-phase multilevel inverter for low and high power applications. It consists of polarity (Level) generation circuit and H Bridge to generate both positive and negative polarities. The proposed topology can produce more output voltage levels by switching dc voltage sources in series and parallel. The proposed topology utilizes minimum number of power electronic devices which leads to the reduction of cost, size, and weight low and consumes low power which improves the efficiency. Switching pulses are generated using Phase disposition (PD) pulse width modulation technique. Finally the effectiveness of the proposed topology is verified using MATLAB/SIMULINK software tool. 7level asymmetrical multilevel inverter prototype hardware is prepared to support the proposed topology to verify the effectiveness and its validity.</p>