Phase Change Memory Research Articles

Simultaneously low resistance drift and ultra‐fast phase change speed based on GeSb/Sb multilayer thin films

AbstractThermal stability and phase transition rate are two important issues that restrict the engineering applications of phase change memories. In this paper, GeSb/Sb multilayer films were prepared by multilayer stacking, and their phase transition properties were investigated. GeSb/Sb multilayer films had higher crystallization temperature, better data retention, and lower resistance drift than pure Sb films, which indicated that they had excellent thermal stability and accuracy of resistance identification. The test results of X‐ray diffraction and atomic force microscopy showed that GeSb spacer layers could inhibit grain growth of Sb film layers, thus reducing the roughness and potential fluctuation of the film surface. X‐ray reflectivity experiments showed that the GeSb/Sb multilayer films before and after crystallization had small volume changes. The devices based on [GeSb(7 nm)/Sb(3 nm)]8 multilayer films could achieve reversible resistive transition operation between SET and RESET at a pulse width of 10 ns, showing satisfactory transition rate and operational power consumption. The low resistance drift and ultra‐fast phase transition speed make GeSb/Sb multilayer films one of the promising choices for phase change memories.

Thermal stability and high speed for optoelectronic hybrid phase-change memory based on Cr doped Ge2Sb2Te5 thin film

Non-volatile memory, which can simultaneously store data and compute in memory, is a promising candidate to break through “memory bottleneck”. However, its operation speed and thermal stability are still contradictory and difficult to meet the requirement of in-memory computing especially in high-temperature applications. In this work, optoelectronic hybrid phase-change memory based on Cr doped Ge2Sb2Te5 material is proposed, where the picosecond laser is used to perform the information recording/erasing operation based on the reversible phase-change characteristics while resistance signal is detected to realize the information readout. Results imply that the Cr doped Ge2Sb2Te5 film with Cr concentration of 10.7 at. % has high crystallization temperature (289 °C) and ten-year data-retention temperature (221 °C), low density-change rate (2.3%) and small resistance drift coefficients (0.022 at 85 °C, 0.056 at 120 °C, 0.070 at 150 °C, and 0.00131 for the laser induced SET state). The corresponding memory device has the SET/RESET operation speeds of as fast as 1820 ps/13 ps accompanied by the RESET/SET resistance ratio of higher than two orders of magnitude. The structural analyses indicate that Cr doping can suppress the growth of grains and reduce the grain size, improving the thermal stability of amorphous Ge2Sb2Te5 thin film while the octahedral/defective octahedral motif ensures its fast phase-change speed. Therefore, Cr doped Ge2Sb2Te5 based optoelectronic hybrid phase-change memory with superior thermal stability and ultrafast operation speed may be one of the promising solutions for in-memory computing.

Unveiling the structure and electronic characteristics of amorphous GeS for high performance threshold switching

Ovonic threshold switching selectors are widely studied owing to the essential application in high density phase-change memory. Amorphous GeS is proposed as a potential candidate for the excellent performance. However, the knowledge of amorphous GeS is still insufficient up to date. Here, we have studied the structure and electronic characteristics of GeS in the amorphization process, by using ab initio molecular dynamics simulations. The results indicate that the amorphous GeS is mainly made up of Ge–S bonds. The Ge- and S-centered clusters are dominantly in the form of octahedral structures in liquid GeS. During the amorphization process, most of Ge-centered clusters become highly coordinated octahedrons while a small number of Ge-centered clusters change to tetrahedrons, and the S-centered clusters deviate from the octahedral structure gradually. In addition, the large bandgap and the relatively small mid-gap states in amorphous GeS lead to a high switching voltage.

WARM-tree: Making Quadtrees Write-efficient and Space-economic on Persistent Memories

Recently, the value of data has been widely recognized, which highlights the significance of data-centric computing in diversified application scenarios. In many cases, the data are multidimensional, and the management of multidimensional data often confronts greater challenges in supporting efficient data access operations and guaranteeing the space utilization. On the other hand, while many existing index data structures have been proposed for multidimensional data management, however, their designs are not fully optimized for modern nonvolatile memories, in particular the byte-addressable persistent memories. As a result, they might undergo serious access performance degradation or fail to guarantee space utilization. This observation motivates the redesigning of index data structures for multidimensional point data on modern persistent memories, such as the phase-change memory. In this work, we present the WARM-tree , a m ultidimensional t ree for r educing the w rite a mplification effect, for multidimensional point data. In our evaluation studies, as compared to the bucket PR quadtree and R*-tree, the WARM-tree can provide any worst-case space utilization guarantees in the form of \(\frac{m-1}{m}\) ( m ∈ ℤ^+) and effectively reduces the write traffic of key insertions by up to 48.10% and 85.86%, respectively, at the price of degraded average space utilization and prolonged latency of query operations. This suggests that the WARM-tree is a potential multidimensional index structure for insert-intensive workloads.

Thermally Reentrant Crystalline Phase Change in Perovskite-Derivative Nickelate Enabling Reversible Switching of Room-Temperature Electrical Resistivity.

Reversible switching of room-temperature electrical resistivity due to crystal-amorphous transition is demonstrated in various chalcogenides for development of non-volatile phase change memory. However, such reversible thermal switching of room-temperature electrical resistivity has not reported in transition metal oxides so far, despite their enormous studies on the electrical conduction like metal-insulator transition and colossal magnetoresistance effect. In this study, a thermally reversible switching of room-temperature electrical resistivity is reported with gigantic variation in a layered nickelate Sr2.5 Bi0.5 NiO5 (1201-SBNO) composed of (Sr1.5 Bi0.5 )O2 rock-salt and SrNiO3 perovskite layers via unique crystalline phase changes between the conducting 1201-SBNO with ordered (O-1201), disordered Sr/Bi arrangements in the (Sr1.5 Bi0.5 )O2 layer (D-1201), and insulating oxygen-deficient double perovskite Sr2 BiNiO4.5 (d-perovskite). The O-1201 is reentrant by high-temperature annealing of ≈1000°C through crystalline phase change into the D-1201 and d-perovskite, resulting in the thermally reversible switching of room-temperature electrical resistivity with 102 - and 109 -fold variation, respectively. The 1201-SBNO is the first oxide to show the thermally reversible switching of room-temperature electrical resistivity via the crystalline phase changes, providing a new perspective on the electrical conduction for transition metal oxides.

Quantification of fcc-Ge2Sb2Te5 stoichiometry variations

Ge-rich Ge-Sb-Te (GGST) alloys are being currently integrated to the complementary metal oxide semiconductor technology for industrial production of new generation of non-volatile memories, able to support the development of raising technologies such as internet-of-things and artificial intelligence. These phase-change random access memories are based on ultra-fast reversible crystallization/amorphization of the Ge2Sb2T5 (GST225) chalcogenide compound exhibiting a large resistivity contrast between the amorphous and crystalline states. GGST film crystallization is accompanied by the phase separation of Ge and an fcc-GST225 phase of unknown composition, which should vary with Ge excess of GGST films. However, device properties and reliability are expected to vary with fcc-GST225 stoichiometry. This work reports atom probe tomography, X-ray diffraction, and scanning transmission electron microscopy investigations of the crystallization of an amorphous GST225 layer containing pseudo-periodic local composition variations. The results show that the compound fcc-GST225 is not stoichiometric, accepting 10 Ge at% variations, 7.5 Sb at% variations, and 6 Te at% variations. Furthermore, the microstructure as well as element distributions in the crystallized fcc-GST225 film suggest that fcc-GST225 nucleation is piloted by local composition variations. Fcc-GST225 nuclei formed in the Te-richest regions of the amorphous layer, corresponding to bulk hetero-nucleation, lowering the nucleation temperature.

Crystallization behavior of MnTe/GeTe stacked thin films for multi-level phase change memory

With substantial data storage requirements, enhancing the storage density of emerging non-volatile memories is a common challenge for achieving commercial applications. Phase change memory is capable of multi-level data storage in a storage cell, which can be applied in neural-inspired and all-photonic memory computing. In this study, we propose a MnTe/GeTe stacked thin film structure suitable for multi-level phase change memories and systematically study on the correlation between structure and performance. As the temperature rises, the stacked thin film sequentially crystallizes into form MnTe2, GeTe and Te phases, resulting in three changes in resistance. By utilizing different resistance states, the phase change memory cell based on the MnTe (15 nm)/GeTe (35 nm) stacked thin film can achieve multi-level storage with a 50 ns electrical pulse. The results show that the amorphous thermal stability of the stacked thin films is improved and that the minimal thickness variation before and after crystallization enhances its reliability. Therefore, the MnTe/GeTe stacked thin film is a phase change memory material with favorable structural properties and potential for multi-level storage applications.

Understanding and Characterizing Side Channels Exploiting Phase-Change Memories

Recent advances in non-volatile memory (NVM), together with their performance-optimized architectural schemes, position NVMs as promising building blocks for future main memory. However, the security of such techniques has not been explored. This article performs the first study on information leakage threats in phase change memories (PCM). We propose an attack framework, R-SAW, that systematically investigates side channel vulnerabilities in representative read techniques under inter-line and intra-line interleaving for multi-level cells. Our evaluation shows that the new side channels can accurately leak program secrets (e.g., crypto keys) and are extremely robust to noise. Our work highlights the need to understand microarchitecture security for emerging memory devices.

FeCrypto: Instruction Set Architecture for Cryptographic Algorithms Based on FeFET-Based In-Memory Computing

Recently, computing-in-memory (CiM) becomes a promising technology for alleviating the memory wall bottleneck. CiM is suitable for data-intensive applications, especially cryptographic algorithms. Most current cryptographic accelerators are specific to a single function. It is expensive to accelerate different cryptographic algorithms with different accelerators. In this work, we first introduce a CiM architecture FeMIC that supports multi-operand CiM operations, by exploring advantages of state-of-the-art ferroelectric field-effect transistors. Based on that, we propose a novel instruction set together with an accelerator architecture named FeCrypto which supports the acceleration of various cryptographic algorithms. Evaluation results show that FeCrypto has better performance and energy efficiency than software implementations. The energy-delay product (EDP) of FeCrypto is 118.4× and 1.93× lower than that of the dedicated AES accelerator AIM that is built based on phase-change memories (PCMs) and magnetic random-access memories (MRAMs), respectively. EDP is reduced by 44.7× compared with PCM-based EIM, a recent AES accelerator. Compared with MRAM-based EIM, the EDP overhead of FeCrypto for supporting multiple functions is 23.2%.

Analysis of lithium-ion indirect liquid cooling battery thermal management system with high discharge rate

<span lang="EN-US">Electric vehicles are developing rapidly and require technological support. Electric vehicles require good power storage. One of the reasonable parameters of a battery pack is its high discharge capability. A high discharge rate requires suitable cell and heat management capabilities in the battery pack. When discharging, it produces heat energy and needs to be released. The battery thermal management system (BTMS) is a method used to maintain battery heat. BTMS using liquid has a better performance compared to phase-change memory (PCM) and air cooling. The use of liquid coolers still has limitations. Namely, the weight of the cooling system is quite large because of a large amount of liquid which increases the weight of the battery. This study offers the potential to use mini channels mounted on cooling plates for application as BTMS. This research used the finite element method (FEM) process by simulating the process of fluid flow that occurs when the battery is used at various C rates. The results of this study indicate that the type of BTMS can keep the battery hot at working temperatures below 40 ºC.</span>

Area-Selective Atomic Layer Deposition for Resistive Random-Access Memory Devices.

Resistive random-access memory (RRAM) is a promising technology for data storage and neuromorphic computing; however, cycle-to-cycle and device-to-device variability limits its widespread adoption and high-volume manufacturability. Improving the structural accuracy of RRAM devices during fabrication can reduce these variabilities by minimizing the filamentary randomness within a device. Here, we studied area-selective atomic layer deposition (AS-ALD) of the HfO2 dielectric for the fabrication of RRAM devices with higher reliability and accuracy. Without requiring photolithography, first we demonstrated ALD of HfO2 patterns uniformly and selectively on Pt bottom electrodes for RRAM but not on the underlying SiO2/Si substrate. RRAM devices fabricated using AS-ALD showed significantly narrower operating voltage range (2.6 × improvement) and resistance states than control devices without AS-ALD, improving the overall reliability of RRAM. Irrespective of device size (1 × 1, 2 × 2, and 5 × 5 μm2), we observed similar improvement, which is an inherent outcome of the AS-ALD technique. Our demonstration of AS-ALD for improved RRAM devices could further encourage the adoption of such techniques for other data storage technologies, including phase-change, magnetic, and ferroelectric RAM.

Atomic Layer Deposition of GeSb2Te4 Thin Films for Reliable Phase Change Memory With a High Dynamic Range

Atomic Layer Deposition of GeSb₂Te₄ Thin Films for Reliable Phase Change Memory With a High Dynamic Range

A Capacitor-Based Synaptic Device with IGZO Access Transistors for Neuromorphic Computing

IGZO TFT has extremely low leakage current characteristics compared to Si-CMOS, so it can be applied not only to displays but also to various research fields. One of the important applications using IGZO TFT is analog-based synaptic device for the efficient implementation for deep learning. The application of IGZO TFT to a synaptic device was more widely studied after a synaptic device based on Si-CMOS and capacitor was devised in 2017(1). Since insufficient retention time was a remaining problem in Si-CMOS and capacitor-based storage synaptic devices, the combination of IGZO TFT with low leakage current and capacitor was a very attractive solution. However, because the viable p-type metal oxide TFT does not exist, linearity and symmetry of weight update, a major requirement of on-chip trainable synaptic devices, has been difficult to achieve. In our research, for the first time, we obtained linear and symmetric weight update characteristics by combining an IGZO TFT and a capacitor.In addition, we verified the leakage characteristics of IGZO TFT and the retention characteristics of synaptic devices, which are the most important characteristics. Through the single TFT measurement result, we were able to obtain a leakage current per channel width 1µm of 10-17A, which is much smaller than the Si transistor. Lower leakage current will lead to better retention characteristics than conventional Si-CMOS-based devices, which will result in higher accuracy in deep neural network training. Based on the published results, the IGZO TFT synapse is projected to be able to achieve the retention time of ~4×109s using only 10fF capcacitor.Another important factor that affects deep neural network training is cell-to-cell and device-to-device variation. As opposed to capacitive synaptic devices, resistive synaptic devices such as Resistive RAM and Phase Change Memory suffer from large device variation. We also verified the device variation characteristics, which are advantages of charge storage devices based on transistors and capacitors. The variation characteristics of the device were evaluated through the ΔG+3σ/ΔG-3σ(%) formula and an excellent result of ~200% was obtained.In our research, we verified the main characteristics for on-chip training of synaptic devices based on IGZO TFT and capacitor: linearity and symmetry of weight update, retention characteristics and variation characteristics. The remarkable characteristics of synaptic devices based on IGZO TFT and capacitor will be a good candidate for on-chip training.1. S. Kim, T. Gokmen, H. M. Lee, and W. E. Haensch, Midwest Symp. Circuits Syst., 2017-Augus, 422–425 (2017).AcknowledgementsThis research was supported by National R&D Program through the National Research Foundation of Korea(NRF) funded by Ministry of Science and ICT(NRF-2020M3F3A2A01081240)

A Novel Hybrid Multifunctional Compound: (CMQ)BiCl5 Showing Enhancement in Physical Properties by Halogen Substitution

AbstractOrganic‐inorganic hybrid multifunctional materials have received significant attention due to their potential applications in smart devices such as phase‐change memory (PCM), resistive random‐access memory (ReRAM). Yet, devices application requires achieving a balance between fast switching speeds, long‐term stability, and high cycling endurance in materials still facing difficulties. Herein, we report two hybrid phase transition compounds: (CMQ)BiCl5(CMQ=Chloromethyl Quinuclidin‐3‐one) (1) and (FMQ)2SbBr5(FMQ=Fluoromethyl Quinuclidin‐3‐one) (2), both two compounds exhibit high phase transition temperature, dual‐stable behavior in dielectric during reversible phase transition process. Notably, 1 exhibit small dielectric change after multiple dielectric state switching. Furthermore, investigate the influence of halogen substitution (F to Cl) for compound properties, which show an Increasing transition temperature (9 K) and raising structural dimension (0D to 1D). Additionally, using first principles, analyze the electronic structure of 1 and find that it has a 3.4 eV wide bandgap, closing to GaN semiconductor (3.4 eV). This work provides a new insight into developing the next‐generation phase transition compounds and chemical modification enhances material performance.

An analog-AI chip for energy-efficient speech recognition and transcription

Models of artificial intelligence (AI) that have billions of parameters can achieve high accuracy across a range of tasks1,2, but they exacerbate the poor energy efficiency of conventional general-purpose processors, such as graphics processing units or central processing units. Analog in-memory computing (analog-AI)3–7 can provide better energy efficiency by performing matrix–vector multiplications in parallel on ‘memory tiles’. However, analog-AI has yet to demonstrate software-equivalent (SWeq) accuracy on models that require many such tiles and efficient communication of neural-network activations between the tiles. Here we present an analog-AI chip that combines 35 million phase-change memory devices across 34 tiles, massively parallel inter-tile communication and analog, low-power peripheral circuitry that can achieve up to 12.4 tera-operations per second per watt (TOPS/W) chip-sustained performance. We demonstrate fully end-to-end SWeq accuracy for a small keyword-spotting network and near-SWeq accuracy on the much larger MLPerf8 recurrent neural-network transducer (RNNT), with more than 45 million weights mapped onto more than 140 million phase-change memory devices across five chips.

Advanced interfacial phase change material: Structurally confined and interfacially extended superlattice

Interfacial Phase Change Memory (iPCM) retrench unnecessary power consumption due to wasted heat generated during phase change by reducing unnecessary entropic loss. In this study, an advanced iPCM (GeTe/Ti-Sb2Te3 Superlattice) is synthesized by doping Ti into Sb2Te3. Structural analysis and density functional theory (DFT) calculations confirm that bonding distortion and structurally well-confined layers contribute to improve phase change properties in iPCM. Ti-Sb2Te3 acts as an effective thermal barrier to localize the generated heat inside active region, which leads to reduction of switching energy. Since Ge-Te bonds adjacent to short and strong Ti-Te bonds are more elongated than the bonds near Sb-Te, it is easier for Ge atoms to break the bond with Te due to strengthened Peierls distortions (Rlong/Rshort) during phase change process. Properties of advanced iPCM (cycling endurance, write speed/energy) exceed previous records. Moreover, well-confined multi-level states are obtained with advanced iPCM, showing potential as a neuromorphic memory. Our work paves the way for designing superlattice based PCM by controlling confinement layers.

Performance optimization of Sn15Sb85 phase change material via introducing multilayer structure

The superlattice-like Sn15Sb85/Ti phase change films were fabricated by magnetron sputtering, and the effects of Ti layer on the phase change properties and crystal structure of the Sn15Sb85 films were systematically researched. With the addition of Ti layers, the crystallization temperature of the films increased, indicating their thermal stability and data retention were improved. X-ray diffraction results reflect that the presence of Ti layers restrains grain growth and refines grain size. X-ray photoelectron spectroscopy analysis reveals that the incorporation of Ti layers enhances the interatomic binding energy and improves the stability. X-ray reflectivity analysis and atomic force microscopy indicate that the Sn15Sb85/Ti films have smaller volume change and smoother surface than pure Sn15Sb85 films, implying the better interfacial property and reliability. The T-type phase change memory cell based on Sn15Sb85/Ti thin film has faster operation speed (100 ns) and lower power consumption (2.6 ×10−12 J) than the conventional Ge2Sb2Te5 material. The results show that the superlattice-like Sn15Sb85/Ti film will be a potential candidate with outstanding properties in thermostability and power consumption.

Mechanism of residue formation on Ge-rich germanium antimony tellurium alloys after plasma etching

In phase-change random access memory (PCRAM) applications, the germanium antimony tellurium alloy (GST) is patterned using halogen etching in inductively coupled plasma reactors. This paper focuses on the surface state evolution of an optimized Ge-rich GST material after plasma etching. Four hours after etching, big dome-shaped residues are observed on PCRAM structures. Their number and size increase with the time of air exposure. X-ray photoelectron spectroscopy and energy-dispersive x-ray spectroscopy analyses reveal an important germanium oxidation on the surface with residues. Their formation is then investigated. Complementary analyses highlight that the moisture environment has a catalytic effect on the residue formation. Based on this study, a detailed mechanism responsible for residue formation is proposed.

TLP/VFTLP investigation on eNVM 1T1R PCM in FD-SOI UTBB CMOS technology at room temperature

Intrinsic robustness against electrostatic discharge (ESD) like HBM or CDM is a major concern for the reliability and functionality in advanced CMOS FD-SOI technology and especially for non-volatile memory (eNVM). And it is well known that device characterizations are a first step of an ESD investigation. Thus, this R&D study the experimental results from 100 ns to 1 ns transmission line pulse (TLP-VFTLP) on 1T1R phase change memory (PCM) at 300 mm wafer level and at room temperature are reported here. Two types of devices are fabricated and characterized in the standard fully depleted (FD) silicon-on-insulator (SOI) with ultra-thin body and BOX (UTBB). These devices have no additional technological step and are embedded in the final memory cell topology with its selector NMOS transistor. The idea is to evaluate the behaviour of the 1T1R device under transmission line pulse stress with different stress durations. TLP/VFTLP I-V curves are reported and discussed along with post-DC responses to determine the magnitude of the phase change generated by the ESD pulse. These characterizations are important for automotive, micro-controllers, neuromorphic computing and spatial applications depending on their dedicated mission profiles at room or cryogenic temperature.

A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference

A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference