Understanding and Characterizing Side Channels Exploiting Phase-Change Memories

Abstract

Recent advances in non-volatile memory (NVM), together with their performance-optimized architectural schemes, position NVMs as promising building blocks for future main memory. However, the security of such techniques has not been explored. This article performs the first study on information leakage threats in phase change memories (PCM). We propose an attack framework, R-SAW, that systematically investigates side channel vulnerabilities in representative read techniques under inter-line and intra-line interleaving for multi-level cells. Our evaluation shows that the new side channels can accurately leak program secrets (e.g., crypto keys) and are extremely robust to noise. Our work highlights the need to understand microarchitecture security for emerging memory devices.