PFC Converter Research Articles

Bridgeless SEPIC PFC Converter for Low Voltage EV Applications With Reduced Sensor Count

Bridgeless SEPIC PFC Converter for Low Voltage EV Applications With Reduced Sensor Count

A Comparison of Digital Constant On-Time and Variable On-Time Control in Buck/Buck-Boost PFC Converter

This study compares two frequently used control strategies in the context of completely digitally controlled critical conduction mode (CRM) buck/buck-boost converters, namely constant on-time (COT) and variable on-time (VOT). The aim of this research is to compare and assess the performance of different control systems in terms of power factor (PF) and total harmonic distortion (THD). The COT control technique employs a fixed on-time period for each switching cycle, resulting in a predictable and straightforward control scheme. On the other hand, VOT control dynamically adapts the on-time period based on the input and output voltage conditions, offering potential advantages in terms of load regulation and stability. The analysis results provide valuable insights into the strengths and limitations of each control technique. Additionally, the dynamic behavior of the converters under various operating conditions is investigated, shedding light on the stability and robustness aspects of each control scheme. The study is conducted using a fully digital setup and evaluated in Matlab/Simulink environment. The findings show that VOT control outperforms COT in terms of THD and PF under steady-state conditions. These findings offer valuable guidance for selecting the appropriate control technique for PFC converters, depending on specific requirements of their applications.

Impedance Analysis and Resonance Mitigation for Boost PFC Converters Using Sample Correction

Impedance Analysis and Resonance Mitigation for Boost PFC Converters Using Sample Correction

Retracted: High-Performance Control Simulation of PFC Converter for Electric Vehicle Charger

Retracted: High-Performance Control Simulation of PFC Converter for Electric Vehicle Charger

Comprehensive Analysis on Power Factor Correction Circuit

With the development of industrial power electronics, the current era can be called the "world energy era". Energy has never been more important, especially with the growing demand for today's "green" energy sources. power factor correction circuits have become an integral part of most current AC voltage input power applications, whether it is automotive battery power, portable energy storage (such as power banks), traditional server power, or lighting systems. However, the basic principles of power factor correction converters are rarely described in detail. This paper will summarize and illustrate the basic principle of the power factor correction circuit, and first introduce the research background of power factor correction technology; At the same time, three operating modes of power factor correction circuit are analyzed: continuous on-mode (CCM), critical on-mode (CRM) and discontinuous on-mode (DCM), and their advantages and disadvantages are to be further discussed. In addition, the PFC converters with optimized topology and excellent performance will be introduced, and the application prospect and prospect of three-phase PFC converters will be presented.

Design and Analysis of High Power Density On-Board Charger with Active Power Decoupling Circuit for Electric Vehicles

This article presents a design method for the active power decoupling (APD) circuit of a PFC converter for high power density on-board chargers (OBCs) utilized in electric vehicles (EVs). The utilization of electrolytic capacitors to mitigate power ripple at the input is a common practice in PFC converters. However, these electrolytic capacitors are associated with issues such as limited lifetime and low current ratings, resulting in a significant portion of the OBC’s volume being occupied by them. To address these challenges and achieve power density, the relationship between the power of the APD circuit and DC-link voltage is derived, and a design method for the APD circuit for high power density is proposed. The feasibility of this design approach is validated through the PFC converter prototype designed for 6.6 kW OBC. Consequently, a substantial volume reduction of 19.7% is realized when compared to the utilization of the electrolytic capacitor approach, and a reduction of 36.2% is achieved in comparison to the conventional APD design method. This reduction in volume proves advantageous for fulfilling the requisites of high power density OBCs.

Multiloop Control With Two Duty-Ratio Feedforward Current Loops via Sensing Series-Capacitor Current for Voltage Doubler PFC Converter

In this paper, the voltage doubler PFC converter with two boost inductors and one series-capacitor is studied. Only when both symmetrical duty ratios are larger than 0.5, the conventional multiloop control with one inner current loop and one voltage loop can be directly applied to the voltage doubler PFC converter due to its topology asymmetry. To remove this duty-ratio limit, the multiloop control with two duty-ratio feedforward current loops is proposed where the series-capacitor current is sensed to reconstruct two inductor currents. It follows that the number of sensor in the proposed control is three equal to the number of sensor in the conventional multiloop control. The proposed method is implemented in a Field Programmable Gate Array (FPGA) chip. The provided simulation and experimental results validate the effectiveness.

Partial Switching PFC Converters for Air Conditioner Applications Using Harmonics and Model Predictive Controls

Partial Switching PFC Converters for Air Conditioner Applications Using Harmonics and Model Predictive Controls

A Study on the Pareto Optimization Method of Boost Inductor for PFC Converter

A Study on the Pareto Optimization Method of Boost Inductor for PFC Converter

Single-Phase Universal-Input PFC Converter Operating at High Frequency

Single-phase ac to dc converters for computers and related applications have requirements that are difficult to meet while achieving both high power density and high efficiency: wide input voltage range, large voltage step down, galvanic isolation, harmonic current limits and hold-up requirements. This work explores a circuit architecture and topology that is structured to facilitate operation at multi-MHz frequencies in order to address this challenge. We present a 250 W, 24 V output, universal input PFC converter prototype that leverages the proposed approach to achieve a power density of 34.9 W/in <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> while meeting the 80 PLUS Platinum efficiency standard, EN61000-3-2 line harmonic requirements and half-cycle holdup. The converter operates at variable switching frequencies in the range of 1-4 MHz; the measured efficiency at 230 Vac RMS, 60 Hz input is 95.33% at full load and 84.57% at 8% load.

A Discrete Average Current Mode Control CCM Boost PFC Converter With Hybrid Pulse Train Modulation and Dual Edge Modulation

In this paper, a discrete average current mode (ACM) control method with hybrid modulation, which is composed of pulse train modulation (PTM) and dual edge modulation (DEM), is proposed for boost power factor correction (PFC) converters operating in continuous conduction mode (CCM) to achieve both fast dynamic response and high power factor (PF). The proposed discrete ACM control is special in that fast and accurate control are achieved by directly generating discrete duty cycles to fit a unity PF duty cycle. The target duty cycle consists of two components <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sub> ) and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sub> ) related to output voltage and inductor current respectively. Based on <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sub> ), the voltage control loop adjusts the output voltage by applying PTM in every half-line cycle. And based on <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sub> ), the current control loop, which is independence from the voltage control loop, regulates the inductor current to track reference current in every switching cycle to achieve high PF. Therefore, the voltage and current control loops of the proposed control are decoupled. The control principle, parameters design and control performances of the proposed discrete ACM control method are developed. Experimental results of 320-W prototype are presented to validate the proposed control method.

Constant on-time variable frequency control for critical conduction mode GaN-based totem-pole PFC converters

Constant on-time variable frequency control for critical conduction mode GaN-based totem-pole PFC converters

Current THD and Output Voltage Ripple Characteristics of Flyback PFC Converters with LED Lamp and Nonlinear RL Loads

This study analysedthe characteristics of total harmonic distortion (THD) and output voltage ripple in a flyback PFC converter circuit under two different loads, which are the LED lamp modules and nonlinear RL loads. The converter was designed to step down the AC input voltage (90 V-265 V) to a DC output voltage of 80 V DC for both loads, each with an output power of 16 W. The main objectives were to observe and assess current THD and output voltage ripple for both loads using two different capacitances of the output capacitor, which are 2400 μF and 6 μF, respectively. The results demonstrated that using smaller capacitors(6 μF), it increased output voltage ripple, which it increased for the LED lamp load from 10% to 25% and for the nonlinear RL load it increased from 15% to70%. However, with the same smaller capacitors (6 μF), it reduced current THD for both loads, which for the LED lamp load it reduced from 12% to 10.3%, and for the nonlinear RL load it reduced from 13.7% to 8.3%. From these results, with 2400 μF of the output capacitor, it provided better performance in terms of current THD and output voltage ripple for both load types.

A single‐stage bridgeless isolated positive output Cuk configuration‐based unidirectional onboard battery charger

SummaryAs power factor correction rectifiers play a key component of electric vehicle (EV) battery charger, the advancements in designing of improved power quality‐based EV charger become more significant in modern era. This article exposes a single‐stage bridgeless isolated positive output (BIPO) Cuk PFC converter with a noninverted output signal. The input diode rectifier present at the input is redeemed by the bridgeless topology that eliminates the serious power quality (PQ) issues and proffers the eminent charging solution for the light electric vehicles (LEV). Unlike the conventional Cuk converter, the noninverted outcome of the BIPO converter does not require a separate amplifier for converting negative to positive output voltage. The preferred charger utilizes a single voltage and current sensor to synchronize the battery charging control in the constant current (CC) and constant voltage (CV) phases of charging. Therefore, the converter encompasses intrinsic zero current switching (ZCS) and offers low‐cost solution to the charger with reduced control complexities. The extensive state space approach is executed to analyze the marginal stability of the presented system. Moreover, the detailed loss modeling is addressed to show the charger's efficacy curve at the standard conditions. A hardware prototype of 350 W, 60 V/4 A charger is implemented to validate its steady‐state and dynamic performance.

Design of PFC converter with stand-alone inverter for microgrid applications

The proposed topology is used to connect a single-phase and a three-phase renewable energy resources to the grid. The single-phase source is coupled to a single-phase PFC boost converter, which enhances the input PF utilizing two feedback loops: outer voltage loop control and inner current loop control. The basic hightlight is to study the PFC converter in microgrid application where renewables are integrated with the systems. The basic aim is to observe the overall performance of the converters with various disturbances such as load variations, etc. Here, the single-phase and three-phase stand-alone inverter is used to get the the output of the PFC boost converters. A symmetrical sinusoidal output voltage waveform should be produced and maintained by the inverter. The three-phase source is also coupled to a PFC buck converter, which enhances the input PF utilizing two feedback loops: outer voltage loop control and inner current loop control. The single-phase stand-alone inverter receives the output of the PFC buck converter. The transformer receives the outputs of both the inverters as it is a multi-winding high-frequency transformer and offers isolation between the grid and the source. The pulses for the switches in the single-phase inverter coupled stand-alone system were generated using a sinusoidal pulse width modulation approach. Both the PI controllers are implemented to maintain the regulations. The simulation results are achieved by varying the load, maintaining a constant voltage, and observing whether the current varies as the load changes. It also provides the efficacy of the study.

Design of PFC Converter Based on Interleave Boost

Based on the principle of stagger boost PFC, this paper expounds the application value of stagger PFC theory by developing a scientific and feasible scheme and using Matlab simulation. According to the subject requirements, the use of UCC28070 to achieve PFC control function. And learn IC functions. Based on the theory of interlaced PFC, the most suitable electronic device is selected to adjust each part of the circuit. Finally, Solidworks and Protel software were used to draw the radiator and PCB boards, then the prototype was made and debugged, and the final result was obtained.

An Error Amplifier Scheme to Reduce Compensation Capacitor for Boost PFC Converter

An error amplifier (EA) scheme to reduce type-I compensation capacitor for Boost PFC converter is proposed in this paper. Compared to traditional EA scheme, the compensation capacitance is significantly reduced by applying a switch network to sample the output feedback signal. In this way, the compensation capacitance can be reduced to 10pF and easily fabricated on chip. Therefore, the control circuit combined with the proposed EA scheme can reduce the cost and improve the reliability of the Boost converter. Detailed theoretical analysis has been presented and a boundary conduction mode (BCM) Boost converter with constant on-time (COT) control and proposed EA scheme has been designed. Finally, an 80W experimental Boost PFC prototype has been built up and experimental results show that the converter can maintain good performance with the proposed EA scheme.

An online capacitance estimation method based on DC component applied in PFC converter with split-capacitor

Inaccurate capacitance significantly increases the DC-Link ripple voltage of active power decoupling circuit (APDC). To solve this problem, a high-precision online capacitance estimation method is proposed. This method converts the AC components of decoupling capacitor into the sum of DC component and AC component with 8 times grid frequency, which is beneficial to the extraction of DC component. This DC component replaces the AC component to effectively eliminate the periodic capacitance mutation, and accurately estimate the capacitance. Based on the capacitance, the DC-Link ripple is controlled with the set scope. Experimental results verify the effectiveness of the proposed method.

A Method for CM EMI Suppression on PFC Converter Using Lossless Snubber with Chaotic Spread Spectrum

This paper proposes an improved common mode (CM) electromagnetic interference (EMI) suppression method in switching power supplies. The lossless snubber circuit can reduce du/dt and EMI in the high-frequency band. Nevertheless, it has a weak EMI suppression effect on the low-frequency band. A method combining the chaotic spread spectrum and the lossless snubber (CSS–LS) is proposed to improve the EMI suppression effect of the lossless snubber. It is an effective means to suppress CM EMI further. The paper used a Boost PFC converter as the object of analysis to study the CM EMI suppression effect of CSS–LS. Firstly, a CM EMI-equivalent model of the lossless snubber PFC converter was established. Then, the power spectral density function under chaotic spread-spectrum modulation was derived. The simulation analysis was performed. Finally, an experimental prototype was built, and relevant EMI tests were carried out. The experimental results show that CSS–LS can reduce CM EMI by 4~20 dBµV with little impact on converter stability. Fewer extra costs are needed for this optimization method, which is suitable for high-power-density power electronic devices.

Ripple Steering Interleaved Boost PFC Converter Analysis, Simulation, and Experimentation

A zero-voltage-transition (ZVT)-based ripple steering interleaved boost converter is proposed in this paper for power factor correction. The ZVT auxiliary circuit enables soft-switching, reducing the current input ripple and the stress on the main circuit device. The proposed converter achieves better performance in terms of THD and power factor with fewer elements, reducing size and cost. A non-linear current control strategy is employed to suppress harmonics in the supply current. The theoretical study and design are validated through simulations and laboratory tests. Automatic current sharing characteristic is an added advantage when interleaved boost converters are employed. In this work, the devices in the semiconductor power are soft switched and consequently, the losing switches are eliminated, thereby making the across the switchers there is stress voltage which is very less. The results show that the converter achieves ZVT operation, reducing switching losses and improving efficiency. The measured supply current THD is 3.029%, and the switching frequency hardly affects the soft switching performance. The converter proposed reduces the stress on the devices and significantly lowers the switching loss when compared to hard switching. The proposed ZVT-based IBC accomplishes soft switching operation and lessens the number of power devices, improving power factor and efficiency.