Personal Digital Cellular Phones Research Articles

Single 3.4 V operation power heterojunction FETwith 60% efficiency for personal digital cellular phones

The authors describe the 950 MHz power performance of a double-doped AlGaAs/InGaAs/AlGaAs heterojunction FET (HJFET), operated at a single 3.4 V bias voltage. The developed 1.0 µm gate-length HJFET exhibited an on-resistance of 2.3 Ω·mm and a threshold voltage of –0.25V. While operating with a single 3.4 V bias supply, a 16 mm gate-width HJFET exhibited an output power of 1.42 W (31.5 dBm) and 60.1% power-added efficiency with an adjacent channel leakage power of –48.2 dBc at an off-centre frequency of 50 kHz. The developed HJFET is promising for single-bias voltage operation power modules of personal digital cellular phones with a single Li-ion battery supply.

Double-doped power heterojunction FET for 1.5 V digital cellular applications

This article describes 1.5 V operation power performance of a double-doped AlGaAs/InGaAs/AlGaAs heterojunction FET (HJFET) for personal digital cellular phones. A 1.0 μm gate length HJFET exhibited 600 mA mm −1 maximum drain current, 260 mS mm −1 transconductance ( g m) and 9.4 V gate-to-drain breakdown voltage. Operated with a drain bias of 1.5 V, a 28 mm gate width HJFET demonstrated 1.02 W (30.1 dBm) output power and 45.2% power-added efficiency with −50.3 dBc adjacent channel leakage power at 50 kHz off-center frequency. This excellent power performance under 1.5 V operation was discussed with a low on-resistance of 2.5 ohm mm as well as with linear g m characteristics around an operating bias point.

High-linearity and small-chip AlGaAs/GaAs power HBTs for L-band personal digital cellular applications

A high-linearity AlGaAs/GaAs power heterojunction bipolar transistor (HBT) is developed for personal digital cellular phones. For compact chip layout, thermal design was considered. To improve power performance, proton implantation, optimum alloy condition for collector electrodes, and multiple via holes were used. A 2400-μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> -emitter-area HBT fabricated on a 0.5×0.67 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> substrate exhibits adjacent channel leakage powers below -53 dBc for 0.95- and 1.5-GHz /spl pi//4-shifted QPSK modulated input signals at a low collector-emitter voltage of 3.4 V. The HBT produces a 31.7-dBm output power, 50% power-added efficiency, and 15-dB linear power gain at 0.95 GHz, and produced a 31.3-dBm output power, 52% power-added efficiency, and 11.5-dB linear power gain at 1.5 GHz. These results were achieved on about one-fifth of the substrate area of conventional GaAs FETs.