Pentacene Organic Thin-film Transistors Research Articles

One‐Step Fabrication of Hydrophobic Hybrid Gate Dielectrics for Low‐Voltage Organic Thin‐Film Transistors

We report here on the design, processing, and dielectric properties of low surface energy organic/inorganic hybrid dielectric films for low‐voltage operation of organic thin‐film transistors (OTFTs). The hydrophobic hybrid dielectric films are easily fabricated by one‐step spin coating of a zirconium chloride precursor in an octadecyltrimethoxysilane solution under ambient conditions, followed by thermal curing at low temperatures (approximately 150°C). These novel dielectrics exhibit excellent surface smoothness (root‐mean‐square roughness is <0.5 nm), great insulating property (leakage current densities <10−6 A/cm2), and high capacitance (365 nF/cm2). In addition, the surface nature of the hybrid dielectric is hydrophobic (water contact angle is 105°), without any further surface modifications, which is highly compatible with organic semiconductors. Consequently, the hybrid dielectrics integrated into the pentacene OTFTs function at relatively low voltages (< −2.5 V) with excellent TFT characteristics (mobility: 0.31 cm2/V·s, on/off current ratio: 105, low threshold voltage: down to −0.7 V).

SuPR-NaP Technique for Printing Ultrafine Silver Electrodes and its Use for Low-Voltage Operation of Organic Thin-Film Transistors

ABSTRACTRecently, an epoch-making printing technology called “SuPR-NaP (Surface Photo-Reactive Nanometal Printing)” that allows easy, high-speed, and large-area manufacturing of ultrafine silver wiring patterns has been developed. Here we demonstrate low-voltage operation of organic thin-film transistors (OTFTs) composed of printed source/drain electrodes that are produced by the SuPR-NaP technique. We utilize an ultrathin layer of perfluoropolymer, Cytop, that functions not only as a base layer for producing patterned reactive surface in the SuPR-NaP technique but also as an ultrathin gate dielectric layer of OTFTs. By the use of 22 nm-thick Cytop gate dielectric layer, we successfully operate polycrystalline pentacene OTFTs below 2 V with negligible hysteresis. We also observe the improvement of carrier injection by the surface modification of printed silver electrodes. We discuss that the SuPR-NaP technique allows the production of high-capacitance gate dielectric layers as well as high-resolution printed silver electrodes, which provides promising bases for producing practical active-matrix OTFT backplanes.

Pentacene bottom-contact thin film transistors with solution-processed BZT gate dielectrics

The solution-processed high-k barium zirconate titanate (BZT) as gate dielectrics for bottom-gate pentacene-based organic thin film transistor (OTFT) applications is presented. To reduce the transistor threshold voltage, higher work function metals (Au) is used as the gate electrodes. The threshold voltage is efficiently decreased from −3.6 to −2.15 V as compared to that of Al. In addition, the UV/ozone was employed to treat the Au (source/drain) surface to improve the poor crystalline of pentacene grown on Au. Moreover, the surface morphologies and orientations of pentacene films were analyzed through atomic force microscopy (AFM) and X-ray diffraction. As the results, the stack of pentacene molecules from disorder state changed to vertical growth on the Au surface. Finally, the electrical properties of pentacene-based thin film transistors exhibit high field-effect mobility of 4.5 cm2/V·s, low subthreshold swing of 260 mV/decade, high on/off ratio of 1.4 × 105 and low operation voltage of −5 V. These results are better than the reported data using bottom contact pentacene OTFTs.

A Study on Organic Thin-Film Transistors Using Hf–La Oxides With Different La Contents as Gate Dielectrics

The effects of La content in HfLaO gate dielectric on the performance of pentacene organic thin-film transistor (OTFT) fabricated on Si have been studied. The OTFT with Hf0.103La0.897O y gate dielectric shows high performance such as high carrier mobility of 3.45 cm $^{\textsf {2}}\cdot \textsf {V}^{-\textsf {1}}\cdot \textsf {s}^{-\textsf {1}}$ (132 times and 40 times higher than those of devices using Hf oxide and La oxide, respectively), small threshold voltage of −2.09 V, and negligible hysteresis of −0.029 V. Binding-energy shift of Hf 4f peak in the X-ray photoelectron spectroscopy spectrum indicates that La incorporation can passivate the oxygen vacancies in HfO2. Atomic force microscope reveals that the La incorporation can reduce the surface roughness of the gate dielectric by suppressing the crystallization of HfO2. Therefore, by using Hf0.103La0.897O y as gate dielectric, OTFT with high carrier mobility and small threshold voltage can be obtained.

Flexible solution-processed high-voltage organic thin film transistor

Abstract

Organic thin-film transistors with sub-10-micrometer channel length with printed polymer/carbon nanotube electrodes

Abstract An electrohydrodynamic (EHD) jet printing technique was used for direct printing of a conductive polymer combined with carbon nanotubes (CNT). The solutions mixture of poly(3,4-ethylenedioxythiophene):poly(4-styrenesulfonate) (PEDOT:PSS) and carbon nanotubes (CNTs) wrapped with PSS served as a PEDOT:PSS/CNT composite ink for the EHD jet printing. The EHD jet-printed patterns of the PEDOT:PSS/CNT composite exhibited excellent dimensional stability and provided sub-10-micrometer channel lengths suitable for highly integrated organic thin-film transistors (OTFTs). The resulting pentacene OTFTs employing the channel length of 7 μm yielded the field-effect mobility of 0.03 ± 0.01 cm2/(V s). In addition, we investigated the electronic structure and the crystalline morphology at the interface between pentacene and the PEDOT:PSS/CNT composite electrode, as well as the contact resistance of the OTFTs by varying the channel length produced by the EHD jet printing process.

Low-voltage operation of organic thin-film transistors based on ultrafine printed silver electrodes

Abstract We report the low-voltage operation of organic thin-film transistors (OTFTs) based on high-resolution printed source/drain electrodes that are produced by a surface photoreactive nanometal printing (SuPR-NaP) technique. We utilized an ultrathin layer of perfluoropolymer, Cytop, that functions not only as a gate dielectric layer in the OTFTs but also as a base layer for producing a patterned reactive surface for silver nanoparticle chemisorption in the SuPR-NaP technique. We successfully demonstrate 2 V operation with negligible hysteresis in the polycrystalline pentacene OTFT with a gate dielectric thickness of 22 nm, and we achieved current amplification by the printed electrodes modified with pentafluorobenzenethiol. The SuPR-NaP technique enables the production of high-resolution printed silver electrodes required for high-performance OTFTs, which have potential practical electronic device applications.

Working Principle of Hydrogen Sensor Based on Pentacene Thin-Film Transistor

A hydrogen sensor based on pentacene organic thin-film transistor (OTFT) with palladium (Pd) source and drain (S/D) electrodes is analyzed in detail. When exposed to H2 with different concentrations, the sensor shows a clear change in drain current due to three reasons: 1) work-function change of the source electrode induced by hydrogen absorption; 2) reduced carrier mobility; and 3) increased S/D series resistance both caused by the expansion of the S/D electrodes after absorbing hydrogen. Analysis of the data demonstrates that the first two are the dominant mechanisms. Without the need of heating, rapid, reversible, and concentration-dependent response of the OTFT is observed upon introduction and removal of H2 with concentration ranging from 200 to 17 000 ppm.

Deposition of Pentacene Thin Film on Polydimethylsiloxane Elastic Dielectric Layer for Flexible Thin-Film Transistors

A novel method was applied to realize the uniform and dense pentacene thin film on the elastic polydimethylsiloxane (PDMS) dielectric layer via vacuum deposition. The oxygen (O2) plasma treatment followed by octadecyltrichlorosilane (OTS) vapor treatment was found to be important for the successful deposition of pentacene thin film with large grain size and hence high field-effect mobility. The highest mobility of the obtained pentacene-based organic thin-film transistors (OTFTs) was 0.65 cm $^{2}\text{V}^{-1}\text{s}^{-1}$ at the optimized condition with O2 plasma treatment of 100 s and OTS treatment of 7 h. Furthermore, the flexible pentacene OTFTs based on PDMS dielectric layer were successfully fabricated. This letter opens up the capability of PDMS as dielectric layer for the fabrication of the vacuum-depositeddevices, exhibiting a strong potential for future large-scale flexible and conformal electronics.

High-performance pentacene OTFT by incorporating Ti in LaON gate dielectric

Pentacene organic thin-film transistors (OTFT) using high-k LaTiON gate dielectric with different Ti contents are investigated. The LaxTi(1-x)ON films (with x = 1, 0.87, 0.76, and 0.67) are deposited by reactive sputtering followed by an annealing in N2 at 200 °C. The OTFT with La0.87Ti0.13ON can achieve a high carrier mobility of 2.6 cm2/V·s, a small threshold voltage of −1.5 V, a small sub-threshold swing of 0.07 V/dec, and a small hysteresis of 0.17 V. AFM and X-ray photoelectron spectroscopy reveal that Ti can suppress the hygroscopicity of La oxide to achieve a smoother dielectric surface, which can result in larger pentacene grains and thus higher carrier mobility. All the devices show a clockwise hysteresis because both the LaOH formation and Ti incorporation can generate acceptor-like traps in the gate dielectric.

A Study on Pentacene Organic Thin-Film Transistor With Different Gate Materials on Various Substrates

Bottom-gate pentacene organic thin-film transistors (OTFTs) with HfLaO gate dielectric have been fabricated on different substrates with different gate materials (namely, Ti- or Al-coated vacuum tape, n-Si wafer, and ITO-coated glass) and the effects of the gate material on device performance have been studied. Although the dielectric surface and pentacene grain on the Ti- and Al-coated vacuum tapes are much rougher and much smaller, respectively, than those on the n-Si wafer, the OTFTs fabricated on the two vacuum tapes have much higher carrier mobility than that fabricated on the n-Si wafer, implying that the gate material can greatly affect the device performance. Like the case for MOSFET, the possible reason is that metal gate can screen the remote phonon scattering of HfLaO and avoid the remote Coulomb scattering of silicon gate, thus resulting in higher carrier mobility for the OTFTs with Al and Ti gate electrodes. As a result, a high-performance OTFT with a carrier mobility of 4.95 cm $^{2}\text{V}^{-1}\text{s}^{-1}$ and threshold voltage of −1.31 V was successfully fabricated on vacuum tape by using Ti gate.

High-Mobility Pentacene Organic Thin-Film Transistor with La<italic>x</italic>Nb(1–<italic>x</italic>)O<italic>y</italic>Gate Dielectric Fabricated on Vacuum Tape

Pentacene organic thin-film transistors (OTFTs) using La x Nb(1– x )O y as gate dielectric with ${x}= \mathsf {1}$ , 0.946, 0.850, and 0.648 have been fabricated on vacuum tape at a temperature of 200 °C. Among them, the OTFT with La0.850Nb0.150O y as gate dielectric has the highest carrier mobility of 4.63 cm $^{\mathsf {2}}\text{V}^{\mathsf {-1}}\text{s}^{\mathsf {-1}}$ , negligible hysteresis of −0.032 V, small subthreshold swing of 0.174 V/decade, and small threshold voltage of −1.90 V. AFM and X-ray photoelectron spectroscopy reveal that Nb incorporation can alleviate the hygroscopicity of La oxide, resulting in a smoother dielectric surface. Pentacene grain size first increases with Nb content due to smoother dielectric surface, and then decreases due to Nb-induced traps acting as nucleation sites for the growth of pentacene grains on the dielectric surface. Therefore, there exists an optimal Nb content in La x Nb(1– x )O y that can result in the largest grain size and, hence, the highest carrier mobility.

Spin Self‐Assembled Clay Nanocomposite Passivation Layers Made from a Photocrosslinkable Poly(vinyl alcohol) and Na+‐Montmorillonite Enhance the Environmental Stability of Organic Thin‐Film Transistors

AbstractWe investigated the effects of the multilayer polymer‐clay nanohybrid passivation films on the stability of pentacene organic thin‐film transistors (OTFTs) exposed to air and UV irradiation. Well‐ordered multilayer films were deposited by the spin‐assisted layer‐by‐layer assembly method using photocrosslinkable poly(vinyl alcohol) with the N‐methyl‐4(4′‐formylstyryl)pyridinium methosulfate acetal group (SbQ‐PVA) and Na+‐montmorillonite in a water‐based solution process. When photocrosslinked, these SbQ‐PVA/clay multilayers were found to serve as excellent barriers to O2 and UV‐light. Moreover, when used as passivation layers, they enhanced the stability of pentacene OTFT devices exposed to air and UV radiation.

Vapor-phase deposition of the fluorinated copolymer gate insulator for the p-type organic thin-film transistor

ABSTRACTA copolymer-based gate insulator was synthesized from 1,3,5-trivinyl-1,3,5-trimethyl cyclotrisiloxane (V3D3) and 3,3,4,4,5,5,6,6,7,7,8,8,9,9,10,10,10-heptadecafluorodecyl methacrylate (PFDMA) via initiated chemical vapor deposition. The synthesis of the random copolymer of poly(V3D3-co-PFDMA) was confirmed by Fourier transform infrared, X-ray photoelectron spectroscopy, and water contact angle analysis. No phase segregation and pinhole formation were observed in the atomic force microscopy images of the copolymer film. The ultra-thin copolymer film showed an extremely low leakage current density (J < 10−9 A/cm2 in the range of ±2 MV/cm) even with a 70 nm thickness. Pentacene organic thin-film transistors (OTFTs) were fabricated with the copolymer gate insulator and showed excellent operational stability. An up to 95% initial drain current was maintained, and a negligible shift in threshold voltage (VT) was observed even after applying a constant gate bias stress of −12 V and a corresponding electric field of 1.7 MV/cm to the OTFT for 3 ks.

Effects of Polymeric Dielectric Morphology on Pentacene Morphology and Organic TFT Characteristics

In this paper, we report on the effects of the polymeric dielectric morphology on pentacene morphology and organic thin film transistor (TFT) characteristics. The morphology and thickness of cyclo-olefin polymer (COP) dielectric could be controlled by selecting a solvent. Higher the solvent’s boiling point is, thinner and smother COP films could be obtained. Using the solvent of trimethylcyclohexane, the spin-coated COP films of ca. 330 nm with the peak-to-valley of 7.35 nm and the roughness of root mean square of 0.58 nm were obtained, and pentacene TFT showed high mobility of 2.0 cm 2 V -1 s -1 , which originated from highly ordering of pentacene thin films deposited on the smoother and thinner COP films.

High-performance organic thin-film transistor by using LaNbO as gate dielectric

Pentacene organic thin-film transistors (OTFTs) using LaxNb(1−x)Oy as gate dielectric with different La contents (x = 0.347, 0.648) have been fabricated and compared with those using Nb oxide or La oxide. The OTFT with La0.648Nb0.352Oy as gate dielectric can achieve a high carrier mobility of 1.14 cm2V−1s−1 (about 1000 times and 2 times those of the devices using Nb oxide and La oxide, respectively), and has negligible hysteresis of −0.130 V, small sub-threshold swing of 0.280 V/dec, and low threshold voltage of −1.35 V. AFM and XPS reveal that La can suppress the formation of oxygen vacancies in Nb oxide while Nb can alleviate the hygroscopicity of La oxide, which results in a more passivated and smoother dielectric surface, leading to larger pentacene grains grown and thus higher carrier mobility. The OTFT with Nb oxide has an anticlockwise hysteresis but the device with La oxide shows an opposite direction. This can be explained in terms of donor-like traps due to oxygen vacancies and acceptor-like traps originated from hydroxyl ions formed after La2O3 absorbing water moisture.

A Study on La Incorporation in Transition-Metal (Y, Zr, and Nb) Oxides as Gate Dielectric of Pentacene Organic Thin-Film Transistor

The effects of La incorporation in three transition-metal (TM = Y, Zr, and Nb) oxides as gate dielectric of pentacene organic thin-film transistor (OTFT) have been investigated. La incorporated in Zr oxide and Nb oxide greatly decreases their trap density (as confirmed by low-frequency noise measurement) by passivating their oxygen vacancies, resulting in larger pentacene grains grown on them (as shown by atomic force microscopy) and thus higher carrier mobility for the OTFT due to less grain-boundary scattering. The carrier mobility of the ZrLaO- and NbLaO-OTFTs is about 70 times and 300 times higher than that of their counterparts based on ZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> and Nb <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sub> , respectively. However, La incorporated in Y <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> increases its trap density by roughening its surface, causing smaller pentacene grains grown and thus lower carrier mobility. On the other hand, all the three TM elements incorporated in La <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> can result in more moisture-resistant gate dielectric with smoother surface, resulting in larger pentacene grains grown and thus higher carrier mobility for the OTFT.

Patterning process of ink-jet printed 6,13-bis(triisopropylsilylethynyl) pentacene layer using bank structures for organic thin film transistors

A layer of 6,13-bis(triisopropylsilylethynyl) pentacene(TIPS-pentacene) organic thin film transistors (OTFTs) deposited by an ink jet printer was patterned using bank structures. Normally, banks degrade the performance of OTFTs because ink adhering to the sidewalls of the bank disrupts the formation of crystal grains, lowering mobility. An appropriately designed bank structure, which had only two photo-resist sidewalls perpendicular to the channel direction of the OTFTs, produced a mobility of the 0.23±0.05cm2/V·s, comparable to 0.25±0.09cm2/V·s of OTFTs produced without banks. The minimum thickness of the TIPS-pentacene layer needed to achieve high mobility was determined to be about 20nm. A modified bank structure with a splitter bar in the middle of the open bank was also developed to simultaneously fabricate two OTFTs by jetting a single drop on the splitter. The mobilities of the two OTFTs were 0.24±0.04cm2/V·s and 0.28±0.09cm2/V·s, respectively.

(Invited) Design and Development of an Organic Operational Amplifier for Use in Low-Cost Smart Sensor Systems

Over the past decade, Organic Electronics has continued to evolve steadily, particularly in the development of simple digital circuits [1]. Efforts have also begun in the development of analog counterpart, for use as key functional blocks in flexible low-cost smart sensor systems [2 - 4]. This however has been generally challenging due to the complexity of the fabrication processes [5], owing to the circuit architecture adapted. In addition, the gain and bandwidth of the amplifier are low, attributed to the low charge carrier mobility of the active layer. Moreover, for solution-processed layers, the possible variability of the parameters can hinder the overall circuit performance [6 - 11]. In this talk, we propose novel approaches in the design of an organic analog circuit such as the Operational amplifier (Op-amp), for integration in a smart sensor technology. We propose methods to tackle and investigate the various issues addressed above. In order to maintain simpler processes, the design of the organic Op-amp adapts a pseudo-PMOS configuration with saturated loads, rather than the alternative CMOS. With such a configuration, only p-channel organic thin-film transistors (OTFTs) are utilised of higher charge carrier mobility, and subsequently require one type of metal contact for the source/drain of the load and driver OTFTs. And with saturated loads, smaller number of input gates is needed compared to the CMOS design [12] for better control of the threshold voltages of the load and driver OTFTs. There are however performance trade-offs to be considered when adapting the pseudo-PMOS designs, particularly in the voltage range for the logic levels, switching point and operational speeds. Nonetheless, such trade-offs can be compensated by adjusted the aspect ratios of the load to driver OTFTs, and utilising additional circuitry so as to boost the gain and attain adequate bandwidth for sensor applications. The Op-amp circuit designs are simulated using appropriate organic parameter values to reflect the conductance and capacitances of the OTFT, including low mobility of the charge carriers and high contact resistances. These models are verified using experimental data of 6,13-bis(tri-isopropylsilylethynyl) pentacene (TIPS) OTFT [13]. The effect of the variability of the parameters such mobility and threshold voltage, on the overall circuit performance are presented, and finally the functionality of the organic Op-Amp in sensing applications is demonstrated.

Cellulose-Derivative-Based Gate Dielectric for High-Performance Organic Complementary Inverters.

been realized using organic thin-fi lm transistors (OTFTs) as the essential element. In the majority of these applications OTFTs are integrated either in the form of arrays or as digital logic. The fundamental building block of digital logic is the inverter, a circuit that inverts an input signal. Much work has been devoted in the last fi ve years to design unipolar inverters using p-typeonly OTFTs. [ 18‐23 ] Unfortunately, unipolar logic based on single gate OTFTs always suffers from high power consumption and low noise margin coupled with high noise margin variability and therefore impedes the fabrication of complex circuits having hundreds or more logic gates. [ 19,22,23 ] In this context, it stands