Pentacene Channel Layer Research Articles

Improvement of the thermal stability of a pentacene-based organic FET utilizing an amorphous rubrene passivation layer

In this research, the thermal stability of pentacene-based organic FETs (OFETs) was investigated utilizing an amorphous rubrene (α-rubrene) passivation layer. Pentacene channel layers with a thickness of 10 nm were deposited at RT and at 100 °C. The influence of the α-rubrene passivation layer, which was in situ deposited on the pentacene at RT, was examined. The stability of the electrical characteristics and the crystallinity were compared with those after heating to 100 °C in air. For the pentacene deposited without an α-rubrene passivation layer, device performance was remarkably degraded after the heating process. On the other hand, the device characteristics of pentacene-based OFETs with an α-rubrene passivation layer were found to be stable after heating. Furthermore, the α-rubrene passivation layer stabilized the crystallinity of the pentacene layers during the heating process.

Current progress in electrode/pentacene interfaces of pentacene-based organic thin films transistors: A review

Organic thin-film transistors (OTFTs) in device physics is currently considered as a standout amongst the most progressive concepts of device applications. Currently, due to humongous technological progress, OTFT with high mobilities can be produced that are comparable to silicon technology. This remarkable mobility is considered as a benchmark for more demanding applications which is accomplished by novel, tenable organic semiconductor materials such as pentacene and the tailoring of their geometries and characteristics. In addition, pentacene demonstrates charge carrier mobilities up to 5.5 cm2/Vs. However very low mobility was achieved in OTFTs due to fabrication defects, material processing etc. The most important defect that arise during the fabrication process is contact interfaces in OTFTs, which highly effect the device performance. Thus, in this article, we will review the current progress of contact engineering of OTFTs with special emphasis on electrode/pentacene interfaces of pentacene-based organic thin film transistors. Further, this review aims to provide an in-depth understanding of bottlenecks to improve the OTFTs performance. After a short introduction, the historical background of pentacene-based OTFTs is discussed that focuses on different methods and materials employed so far to improve the contact between pentacene layer. Also, the review presents the key challenges in the geometry of pentacene based OTFT that is the direct deposition of metal electrodes onto the pentacene channel layer in top contact interface due to which poor carrier injection, high barrier height, chemical diffusion between both layers, high contact resistance and surface roughness has been observed which highly affects the device performance especially the field effect mobility. Also, the state-of-the-art devices and related models that widely employ pentacene are presented. This detailed review will assist the future researchers in understanding and improving field-effect properties of OTFTs.

Investigation of Various Thick Copper Phthalocyanine Buffer Layers on Pentacene-Based Organic Thin-Film Transistors

To systematically study the thickness effect of copper phthalocyanine (CuPc) buffer layers on pentacene-based organic thin-film transistors, various-thick CuPc buffer layers deposited on pentacene channel layers with various deposition rates were designed and studied in the work. By considering the contrary effect of the lower conductivity and the bandgap difference reduction of a CuPc buffer layer inserted between the Au electrode and the pentacene channel layer, the optimal thickness of the CuPc buffer layer stacked on the 50-nm-thick pentacene channel layer of the thin-film transistors was 5 nm. Furthermore, by considering the molecule ordering and quality of pentacene channel layer, the optimal deposition rate of pentacene channel layer of the thin-film transistors was 1.5 A/s. After measuring the organic thin-film transistors with the optimal parameters, the associated transconductance of 2.4 μS, effective carrier mobility of 0.23 cm2/Vs, threshold voltage of − 5.1 V, subthreshold swing of 1.46 V/dec., and on/off current ratio of 3.7 × 105 were obtained.

Microscopic gate-modulation imaging of charge and field distribution in polycrystalline organic transistors

In this work, a high-resolution microscopic gate-modulation imaging (μ-GMI) technique is successfully developed to visualize inhomogeneous charge and electric field distributions in operating organic thin-film transistors (TFTs). We conduct highly sensitive and diffraction-limit gate-modulation sensing for acquiring difference images of semiconducting channels between at gate-on and gate-off states that are biased at an alternate frequency of 15 Hz. As a result, we observe unexpectedly inhomogeneous distribution of positive and negative local gate-modulation (GM) signals at a probe photon energy of 1.85 eV in polycrystalline pentacene TFTs. Spectroscopic analyses based on a series of μ-GMI at various photon energies reveal that two distinct effects appear, simultaneously, within the polycrystalline pentacene channel layers: Negative GM signals at 1.85 eV originate from the second-derivative-like GM spectrum which is caused by the effect of charge accumulation, whereas positive GM signals originate from the first-derivative-like GM spectrum caused by the effect of leaked gate fields. Comparisons with polycrystalline morphologies indicate that grain centers are predominated by areas with high leaked gate fields due to the low charge density, whereas grain edges are predominantly high-charge-density areas with a certain spatial extension as associated with the concentrated carrier traps. Consequently, it is reasonably understood that larger grains lead to higher device mobility, but with greater inhomogeneity in charge distribution. These findings provide a clue to understand and improve device characteristics of polycrystalline TFTs.

Performance enhancement of pentacene-based organic thin-film transistors using 6,13-pentacenequinone as a carrier injection interlayer

This work demonstrates pentacene-based organic thin-film transistors (OTFTs) fabricated by inserting a 6,13-pentacenequinone (PQ) carrier injection layer between the source/drain (S/D) metal Au electrodes and pentacene channel layer. Compared to devices without a PQ layer, the performance characteristics including field-effect mobility, threshold voltage, and On/Off current ratio were significantly improved for the device with a 5-nm-thick PQ interlayer. These improvements are attributed to significant reduction of hole barrier height at the Au/pentacene channel interfaces. Therefore, it is believed that using PQ as the carrier injection layer is a good candidate to improve the pentacene-based OTFTs electrical performance.

Fabrication of top-contact pentacene-based organic thin-film transistors with short channels using two-step SU8/poly(vinyl alcohol) lift-off photolithography process

We propose a two-step SU8/poly(vinyl alcohol) (PVA) lift-off photolithography scheme for fabricating top-contact pentacene-based organic thin-film transistors (OTFTs) with small channels. The bilayer of PVA and SU8 will not damage the pentacene channel layer in the lift-off photolithography process used in forming the patterned pentacene channel layer and source/drain metal electrodes. We demonstrate a device that not only obtains a 5 µm short channel length for source/drain metal-electrode patterning but also avoids fringe current resulting from pentacene channel layer patterning. The field-effect mobility and threshold voltage of the pentacene-based OTFTs were changed from 0.29 to 0.12 cm2 V−1 s−1 and from −5.74 to −3.19 V by varying the channel length from 50 to 5 µm, respectively. The proposed scheme is a good candidate for use in the design and fabrication of high-performance short-channel organic electronics.

Correlation between ambient air and continuous bending stress for the electrical reliability of flexible pentacene-based thin-film transistors

This study investigated how continuous bending stress affects the electrical characteristics of pentacene-based organic thin-film transistors (OTFTs) with poly(4-vinylphenol) (PVP) gate insulator in a vacuum and in ambient air. In tension mode, the strain direction of the fabricated devices was perpendicular to the device channel length. The OTFT devices that were bent in a vacuum exhibited a decreased on current because of cracking in the pentacene channel layer, which can obstruct the transport of charge carriers and deteriorate the on current of the OTFTs. The OTFT devices that were bent in ambient air exhibited a slightly decreased on current and considerably increased off current and subthreshold swing (SS). It was assumed that air moisture passed through the pentacene cracks into the interface between the PVP and pentacene layer, thereby yielding an increase in polar moisture traps, and leading to an increase in the conductivity of the pentacene, thus yielding a slightly decreased on current and considerably increased off current and SS.

Teflon/SiO2 bilayer passivation for improving the electrical reliability of pentacene-based organic thin-film transistors

We demonstrate a bilayer passivation method using a Teflon and SiO2 combination layer to improve the electrical reliability of pentacene-based organic thin-film transistors (OTFTs). The Teflon was deposited as a buffer layer using a thermal evaporator that exhibited good compatibility with the underlying pentacene channel layer, and can effectively protect the OTFTs from plasma damage during the SiO2 deposition process, resulting in a negligible initial performance drop in OTFTs. Furthermore, because of the excellent moisture barrier ability of SiO2, the OTFTs exhibited good time-dependent electrical performance, even after 168h of aging in ambient air with 60–80% relative humidity.

Performance improvement mechanisms of pentacene-based organic thin-film transistors using TPD buffer layer

To improve the performances of pentacene-based organic thin-film transistors (OTFTs), a TPD buffer layer was inserted between the Au metal electrode and the pentacene channel layer. As shown by the ultraviolet photoelectron spectroscopy measurement, the Au work function was increased from 4.61eV for Au in direct contact with pentacene to 4.74eV and 4.78eV for the sample inserted with 2-nm-thick and 3-nm-thick TPD buffer layers, respectively, between the Au metal electrode and the pentacene channel layer. Moreover, the contact resistance was reduced from 1MΩ to 0.1MΩ by inserting a 2-nm-thick TPD buffer layer. Compared with the transconductance of 2.67×10−7S, the field-effect mobility of 0.46cm2/Vs, and the substhreshold swing of 1.78V/decade for the conventional pentacene-based OTFTs without TPD buffer layer, the transconductance, the field-effect mobility, and the subthreshold swing were improved to 9.77×10−7S, 1.68cm2/Vs, and 1.46V/decade, respectively, for the pentacene-based OTFTs inserted with a 2-nm-thick TPD buffer layer. By considering the trade-off between the increase of Au work function and the tunneling effect, the optimal thickness of the TPD buffer layer in the pentacene-based OTFTs was 2nm.

Investigation on the electrical characteristics of a pentacene thin-film transistor and its reliability under positive drain bias stress

This study systematically investigates the effects of pentacene deposition rates and channel lengths on the electrical characteristics of pentacene-based organic thin-film transistors (OTFTs), and the performance degradation of OTFTs under the positive drain bias stress. With a slower deposition rate of the pentacene channel layer, the larger grain size is formed, and it improves the performance of pentacene-based OTFTs. As the channel length decreases, the threshold voltage (VTH) shifts toward the positive direction and the field-effect mobility (µFE) decreases, which are due to the drain-induced barrier lowering effect and the lower mobility in the active channel near the region of source/drain electrodes, respectively. In addition, we also propose a mechanism to present the channel length dependence on the field-effect mobility. Results also show that the pentacene-based OTFTs, which are under positive drain bias stress, exhibit greater performance degradation than those under negative drain bias stress. The greater performance degradation, the decreasing ION and the larger VTH shift are due to the greater trap state density (Ntrap) created in the bulk channel by the large lateral electrical field and the carriers injected into the gate insulator by the large vertical electrical field, respectively.

Performance Improvement of Top-Contact Pentacene-Based Organic Thin-Film Transistors by Inserting an Ultrathin Teflon Carrier Injection Layer

This work demonstrates top-contact (TC) pentacene-based organic thin-film transistors (OTFTs) fabricated by inserting a Teflon carrier injection layer between the source/drain (S/D) metal electrodes and pentacene channel layer. Compared to devices without a Teflon layer, the inserted 1.5-nm-thick Teflon layer can enhance the drain current and field-effect mobility by 136 and 62%, respectively. The improvements are attributed to the reduction of hole injection barrier and tunneling process at the Au/pentacene interface, which can be confirmed by the reduced contact resistance measured at linear region. We therefore believe that using ultrathin Teflon as the carrier injection layer is a good candidate method to improve the TC-OTFTs performance.

Performance improvement mechanisms of organic thin-film transistors using MoO x-doped pentacene as channel layer

Organic thin-film transistors (OTFTs) with various MoO x -doped pentacene channel layers were fabricated and investigated. Compared the OTFTs with the 0.50 mol% MoO x -doped pentacene to the conventional OTFTs without MoO x dopant, the maximum output current was increased from −11.6 to −37.9 μA, the effective field-effect mobility was enhanced from 0.71 to 1.60 cm 2/V-s, the threshold voltage was reduced from −21.2 to −14.8 V, and the on/off current ratio slightly decreased from 3.6 × 10 6 to 1.2 × 10 6. The performance improvement was attributed to the highest occupied molecular orbital (HOMO) of the MoO x -doped pentacene gradually approached to the Au work function with increasing the doping percentage of MoO x , which led to reduce the contact resistance and to enhance the p-type characteristics of the MoO x -doped OTFTs by increasing the hole density and enhancing the hole-injection efficiency. However, the output current and the field-effect mobility decreased with an increase of the MoO x doping percentage, if the doping mole percentage of MoO x was higher than 0.50%. This behavior was attributed to the Fermi level pinning effect, gradual increase of hole concentration and significant degradation of crystallinity.

Low-Voltage High-Performance Pentacene Thin-Film Transistors With Ultrathin PVP/High- $\kappa$ HfLaO Hybrid Gate Dielectric

Low-voltage and high-performance pentacene thin-film transistors with a hybrid gate dielectric consisting of ultrathin PVP (8 nm) and a high-κ HfLaO (20 nm) have been demonstrated. The hybrid gate dielectric exploits the advantages of both dielectrics, i.e., a good interface between the organic dielectric and channel material as well as the insulating properties of the inorganic metal-oxide, resulting in very low leakage current, hysteresis-free behavior, superior drain-current drivability, and successful operation at -2 V. The superior device performance is attributed to good intermolecular ordering and the large grain size of the pentacene channel layer formed on the hybrid dielectric.

Performance improvement of bottom-contact pentacene-based organic thin-film transistors by inserting a thin polytetrafluoroethylene buffer layer

The electrical characteristics of bottom-contact pentacene-based organic thin-film transistors with polytetrafluoroethylene (PTFE) as the buffer layer were investigated. PTFE can provide a hydrophobic surface to improve the molecular orientation of the grown pentacene channel layer. In addition, the contact resistance (RC) between the pentacene channel layer and source/drain electrodes can be decreased as a result of the carriers injection by tunneling through the thin PTFE buffer layer (1.5 nm) into the pentacene channel layer. Compared to device without PTFE buffer layer, the saturation drain current and field-effect mobility of the proposed device were increased by 93% and 105%, respectively.

Influence of Bank Structure on the Film Morphology and Electrical Properties of Ink-Jet Printed TIPS Pentacene Thin-Film Transistors

The effects of bank geometry on the morphology of ink-jet printed TIPS pentacene channel layer and electrical properties of TFT devices. It was found that the size and shape of the bank had a significant influence on the film morphology as well as the electrical properties of transistors. It is suggested that a specific bank shape and size have to be selected considering the ink-jet drop volume and solid concentration.

Electrical Characteristics of Organic Field Effect Transistor Formed by Gas Treatment of High-k Al2O3 at Low Temperature

We studied the electrical characteristics of an organic field effect transistor (OFET) formed by the hydrogen (H2) and nitrogen (N2) mixed gas treatment of a gate dielectric layer. We also investigated how device mobility is related to the length and width variations of the channel. Aluminum oxide (Al2O3) was used as the gate dielectric layer. After the treatment, the mobility and subthreshold swing were observed to be significantly improved by the decreased hole carrier localization at the interfacial layer between the gate oxide and pentacene channel layers. H2 gas plays an important role in removing the defects of the gate oxide layer at temperatures below 100 °C.

Top-Contact Organic Thin-Film Transistors Fabricated by Picoliter and Sub-Femtoliter Inkjets

Employing inkjet technologies with picoliter and sub-femtoliter droplet volumes, we have successfully manufactured high-quality top-contact organic thin-film transistors. Silver fine lines were directly patterned by two inkjet systems on the pentacene channel layer without the need for any photolithographic pre patterning or any surface pretreatment. The lines were calcinated at 130 {degree sign}C to form source and drain electrodes. The minimum width of silver lines was 25 µm with the picoliter inkjet system, while that was 2µm with the sub-femtoliter inkjet system. We have manufactured p-type channel and n-type channel organic transistors with source/drain contacts prepared by the sub-femtoliter inkjet to fabricate complimentary inverter circuits.

Bending Effect of Organic Field-Effect Transistors with Polyimide Gate Dielectric Layers

We manufactured markedly flexible pentacene field-effect transistors (FETs) on a polyethylenenaphthalate base film with polyimide gate dielectric layers, with a mobility of 0.3 cm2/Vs and an on/off ratio of 105. The electric performance of DC current–voltage characteristics was measured by applying compressive and tensile strains while reducing the bending radius down to 3 mm. It was found that the compressive strain leads to an increase in mobility of 10% induced by the change in strain of up to 1.4±0.1%, although the tensile strain leads to a decrease in mobility of 10%. To elucidate the origin of the enhancement of mobility under the compressive strain, we also investigated the strain dependence of capacitance–voltage characteristics for a pentacene channel layer, and almost no change was observed. Our results suggest that the strains markedly affect the spacing between pentacene molecules rather than the number of induced carriers.

High mobility of pentacene field-effect transistors with polyimide gate dielectric layers

Polyimide gate dielectric layers cured at 180 °C have been employed to fabricate high-quality pentacene field-effect transistors on polyethylenenaphthalate-based films. The surface roughness (root-mean square) of gate dielectric layers characterized by atomic force microscopy is only 0.2 nm, while that of the base film is 1 nm. The transistors with pentacene channel layers deposited on 990 nm polyimide gate dielectric layers attain the on/off ratio of 106 and mobility of 0.3 cm2/V s. Furthermore, by decreasing the thickness of polyimide gate dielectric layers down to 540 nm, the mobility is enhanced up to 1 cm2/V s.

Effects of substrate temperature on the device properties of pentacene-based thin film transistors using Al2O3+x gate dielectric

We report on the electrical properties of pentacene-based organic thin film transistors (OTFTs), where the active pentacene channel layers have been deposited at fixed deposition rate of 1 Å/s on a 250-nm-thick Al2O3+x gate dielectric film at various substrate temperatures: room temperature, 60 °C, and 90 °C. The grain size of the pentacene layer was found to increase with the substrate temperature, accompanied by a phase transition. The highest saturation current of 20 μA (under a gate bias of −40 V) was obtained with a high field-effect hole mobility of ∼0.21 cm2/V s from an OTFT prepared at 90 °C despite a relatively low on/off current ratio of 2×105. It is concluded that the pentacene channel deposited at a high substrate temperature contains not only large grains but also high density traps.