Pentacene-based Organic Thin-film Transistors Research Articles

Performance Analysis of Top Gate Top Contact TFT Using Different Dielectric Layers

Thin film transistors (TFT) have been gaining special attention from researchers in recent years because they are seen as an alternative to traditional MOSFET for future electronic device development. In this manuscript, the performance characteristics of n-channel Indium-Galium-Zinc-Oxide (IGZO) Top Gate Top Contact (TGTC) Thin Film Transistors (TFTs) for various insulating materials including Al2O3, Ta2O5, HfO2, Si3N4, SiO2, and Y2O3 are investigated and compared. This is followed by a comparison of p-type pentacene-based TGTC Organic Thin Film Transistors (OTFT). During simulation tests, the Silvaco Atlas tool is employed, and the I-V characteristic curve is analyzed to discover the important parameters. The proposed TFT's competency is demonstrated by extensive simulation results that contrast it with other models of a similar nature concerning threshold voltage, current ratio, subthreshold slope, mobility and Figure of Merit (FoM). The results demonstrate a trade-off between mobility and current ratio concerning the permittivity of the dielectric layer, with tantalum oxide (Ta2O5) providing the best outcomes in terms of FoM. According to simulation testing, the tantalum pentoxide (Ta2O5) gate insulating layer based on IGZO surpasses its rivals including the p-channel pentacene-based OTFT by offering mobility of 1.47 cm2V-1s-1, a current ratio of 1.36×106 and FoM of 198.87.

Behavioral modeling for low-voltage pentacene-based OTFTs and their implementations for organic logic circuits

We present a behavioral compact model and its implementation for low-voltage pentacene-based organic thin film transistors (OTFTs) using industry standard BSIM4 (Berkeley Short-channel IGFET Model) in LTspice platform. First, we simplify the number of BSIM4 model parameters according to the device structure. On the other hand, we adapt the BSIM4 mobility equation to OTFT and also involve the off-current using two behavioral current sources. Then, we perform metaheuristics-based optimization to extract the related BSIM4 model parameters together with additional four parameters, introduced in this work, fitting the modified model to the experimental data of an OTFT, using pentacene active layer. Finally, we implement the behavioral compact model in LTspice and validate its usage for low-voltage pentacene-based OTFTs comparing the experimental and modeled current–voltage curves. In this study, we also successfully simulate OTFT implementations of a Pseudo-E inverter, a Pseudo-E NAND gate, and a 1-bit full adder circuit based on NAND gates using our behavioral OTFT model and then investigate the static and dynamic performance parameters of these circuits. The supply voltage is 3 V and maximum frequency of the inputs is 500 Hz in the simulations.

Systematic Analysis of Self-Assembled Nanodielectric Architecture and Organization Effects on Organic Transistor Switching

The unconventional self-assembled nanodielectric (SAND) architecture is composed of solution-processed alternating inorganic (e.g., ZrOx and HfOx) and π-organic nanolayers (e.g., stilbazolium). As gate dielectrics, SANDs are compatible with a wide variety of organic and inorganic semiconductors and often impart superior thin-film transistor (TFT) performance in comparison to analogous inorganic-only dielectrics. The enhanced performance has been partly attributed to the interactions within the organic layers. To probe the role of the highly polarizable stilbazolium (Chr) organic layer in SAND structural organization and dielectric response, a saturated hydrocarbon chain-based self-assembling building block (Alk) was synthesized and incorporated in SAND structures. By using Chr and Alk in the different SAND organic layers, the effects of the Chr built-in dipole on bulk SAND structural and dielectric characteristics can be evaluated. The Zr-SAND structures are characterized by atomic force microscopy, X-ray reflectivity, metal-insulator-semiconductor electrical measurements, and pentacene-based organic TFTs. The layer identity and arrangement of the organic layers within the Zr-SAND structure are found to have a significant impact on the capacitor leakage current and pentacene transistor threshold voltage/turn-on voltage characteristics. Furthermore, significant cooperative interactions between adjacent Chr organic π-layers are important in enhancing these effects.

Top-Contact Pentacene-Based Organic Thin Film Transistor with a Rubrene Layer in between Pentacene-Electrode Interface

Top-contact pentacene-based organic thin-film transistor (OTFT) with a rubrene interlayer in between pentacene-electrode [Al, Au] interface is reported. A study of the interlayer behavior of rubrene shows enhanced device performance of OTFT than that of the conventional OTFTs with only metal source-drain electrodes [Al, Au]. The improved performances of the device are attributed to the smoother pentacene surface for high carrier injection and mobility and decrease in contact resistance of the device. The device with a rubrene interlayer in between pentacene/Au interface shows better field-effect mobility of 3.3 cm2 v−1 s−1, On/Off ratio of 1.22 × 107, the threshold voltage of −3.8 V, and sub-threshold-slope of 0.31 V decade−1 respectively.

Performance Enhancement of Pentacene-Based Organic Thin-Film Transistors Using a High-K PVA/Low-K PVP Bilayer as the Gate Insulator.

In this study, we proposed using the high-K polyvinyl alcohol (PVA)/low-K poly-4-vinylphenol (PVP) bilayer structure as the gate insulator to improve the performance of a pentacene-based organic thin-film transistor. The dielectric constant of the optimal high-K PVA/low-K PVP bilayer was 5.6, which was higher than that of the single PVP layer. It resulted in an increase in the gate capacitance and an increased drain current. The surface morphology of the bilayer gate dielectric could be suitable for pentacene grain growth because the PVP layer was deposited above the organic PVA surface, thereby replacing the inorganic surface of the ITO gate electrode. The device performances were significantly improved by using the bilayer gate dielectric based upon the high-K characteristics of the PVA layer and the enlargement of the pentacene grain. Notably, the field-effect mobility was increased from 0.16 to 1.12 cm2/(Vs), 7 times higher than that of the control sample.

(Invited) Parametrization of Gaussian Disordered Model with Fully Spatial and Energetic Disorders for Organic Thin Film Transistors

So far, the most widely addressed hopping transport model for organic disordered semiconductors (ODSs) is the so-called extended Gaussian disordered model (EGDM) [1] based on numerical simulations within the cubic lattice without spatial disorder. As known since 1973 [2] and confirmed recently [3], the EGDM is based on the parametrization of transport coefficients in the framework of the irrelevant set of parameters. Parameters responsible for the effects are not in the equations, while parameters in the equations are not responsible for the effects [3]. The deficiencies of the EGDM are particularly pronounced for systems with spatial disorder. Therefore, the study of Gaussian disordered model (GDM) with spatial disorder is necessary to provide a simulation tool for transport coefficients of charge carriers in real organic thin film transistors (OTFTs) and organic light-emitting diodes (OLEDs) based on materials with spatial disorder.In this study, we examine the GDM which contains both spatial and energetic disorders and propose a physical parametrization for OTFTs. We determine all the parameters by adjusting the localization length and the attempt-to-escape frequency to satisfy experimentally measured mobility. For the localization length, the concept of effective localization length [4] is adopted which has the order of a molecular diameter, because assumption of the very low localization length (commonly order of 10-8 cm) induces very low mobility due to the strong localization of the each state. The large effective localization length can alleviate the strong localization and so it can predict the similar scale of mobility with experimentally measured one. In addition, the proper value of the attempt-to-escape frequency is estimated from comparison between a direct calculation of Miller-Abrahams (MA) transition rate and theoretical estimations of the hopping transition rate based on MA and Marcus theories. We show that its value should be increased by more than two orders of magnitude than conventional value to simulate high mobility device.Then, we validate our parametrization of GDM through comparison between experimentally measured and numerically calculated transfer curves and charge carrier mobility of OTFTs at various temperature (Fig. 1). The staggered pentacene-based OTFT device was fabricated and measured at different temperatures T = 329, 293, 258 and 233 K. The charge carrier mobility was extracted by the transmission line method (TLM). For numerical simulation, we implemented the GDM by Baranovskii [3] into the commercial TCAD simulation tool, Silvaco ATLAS. Then, the numerical solver calculated Poisson’s, continuity and drift-diffusion equations in a self-consistent manner with characteristics of ODSs such as Gaussian density-of-states, generalized Einstein relation and GDM by Baranovskii. Numerical simulation with a single set of parameters makes an accurate fit with experimentally measured transfer curves (Fig. 1a) and charge carrier mobility (Fig. 1b) at every temperature condition.In conclusion, we propose physically based parametrization of GDM with fully spatial and energetical disorder for OTFTs. It is confirmed that the localization length and the attempt-to-escape frequency are key parameters for the practical fitting with experimental result. In addition, we can expect that the electronic design automate (EDA) industry can be promoted by providing rigorous transport model and its parametrization for OTFTs within commercial simulation software.[1] W. F. Pasveer, J. Cottaar, C. Tanase, R. Coehoorn, P. A. Bobbert, P. W. M. Blom, M. De Leeuw, and M. A. J. Michels, Phys. Rev. Lett. 94, 206601 (2005).[2] B.I. Shklovskii Sov. Phys.-Semicond. 6, 1964 (1973).[3] S. D. Baranovskii, Phys. Status Solidi Appl. Mater. Sci. 215, 1700676 (2018).[4] A. V Nenashev, J. O. Oelerich, and S. D. Baranovskii, J. Phys. Condens. Matter 27, 093201 (2015). Figure 1

Optimization by Numerical Simulation of the Active Layer’s Thickness for Organic Thin Film Transistor

This paper reports the performance of a pentacene-based organic thin film transistor (OTFT) that was investigated using numerical simulations for different pentacene thicknesses. The studied OTFTs showed a peak mobility in the saturation region of 5 × 10 −2 cm2V −1s −1 for a pentacene thickness of 50 nm. Furthermore, an optimum Ion/Ioff current ratio of 3.5 × 105 was observed for a similar pentacene thickness of about 50 nm. Moreover, the threshold voltage and the sub-threshold slope were significantly affected and decreased with increasing pentacene thickness. In addition, based on our proposed approach and the simulation results, we noticed that a penatcene thickness of 50 nm remained the optimum value for the active layer channel in order to obtain optimal performance from the OTFT devices.

Current progress in electrode/pentacene interfaces of pentacene-based organic thin films transistors: A review

Organic thin-film transistors (OTFTs) in device physics is currently considered as a standout amongst the most progressive concepts of device applications. Currently, due to humongous technological progress, OTFT with high mobilities can be produced that are comparable to silicon technology. This remarkable mobility is considered as a benchmark for more demanding applications which is accomplished by novel, tenable organic semiconductor materials such as pentacene and the tailoring of their geometries and characteristics. In addition, pentacene demonstrates charge carrier mobilities up to 5.5 cm2/Vs. However very low mobility was achieved in OTFTs due to fabrication defects, material processing etc. The most important defect that arise during the fabrication process is contact interfaces in OTFTs, which highly effect the device performance. Thus, in this article, we will review the current progress of contact engineering of OTFTs with special emphasis on electrode/pentacene interfaces of pentacene-based organic thin film transistors. Further, this review aims to provide an in-depth understanding of bottlenecks to improve the OTFTs performance. After a short introduction, the historical background of pentacene-based OTFTs is discussed that focuses on different methods and materials employed so far to improve the contact between pentacene layer. Also, the review presents the key challenges in the geometry of pentacene based OTFT that is the direct deposition of metal electrodes onto the pentacene channel layer in top contact interface due to which poor carrier injection, high barrier height, chemical diffusion between both layers, high contact resistance and surface roughness has been observed which highly affects the device performance especially the field effect mobility. Also, the state-of-the-art devices and related models that widely employ pentacene are presented. This detailed review will assist the future researchers in understanding and improving field-effect properties of OTFTs.

Electrical and surface properties of SiO2 films modified by ultraviolet irradiation and used as gate dielectrics for pentacene thin-film transistor applications

The effect of ultraviolet (UV) treatment on the electrical and surface properties of SiO2 is studied. UV treatment leads to the formation of the silicon peroxide in SiO2 near the surface, thus increasing the capacitance of SiO2. The effect of SiO2 gate dielectrics with UV treatment on carrier transport for a pentacene-based organic thin-film transistor (OTFT) is also studied. Experimental identification confirms that the shift of the threshold voltage towards positive gate-source voltages for OTFTs is due to an increase in the number of trap states in SiO2 near the pentacene/SiO2 interface. The existence of a peroxidation layer between pentacene and SiO2 serves to strengthen the pentacene-SiO2 interaction, reducing the field-effect carrier mobility and the leakage current in OTFTs.

TCAD SIMULATION AND PERFORMANCE ANALYSIS OF SINGLE AND DUAL GATE OTFTs

This paper presents finite element-based numerical simulation and performance analysis of dual and single gate pentacene-based organic thin film transistors (OTFTs) using technology computer-aided design (TCAD) tools. Electrical characteristics of the devices have been simulated using 2D numerical device simulation software ATLAS™ from Silvaco International. Also, device parameters like threshold voltage, mobility, transconductance, subthreshold swing and current on/off ratio of the single and dual gate OTFTs have been extracted and compared.

Leakage conduction behavior for top- and bottom-contact pentacene thin film transistors

The leakage conduction mechanisms for top-contact and bottom-contact pentacene-based organic thin film transistors (OTFTs) are studied. OTFTs that use a bottom-contact design exhibit lower leakage conduction than those that use a top-contact design. For top-contact OTFTs, the dominant leakage conduction mechanism is via Schottky emission and the density of the leakage current increases significantly as the bias voltage increases. For bottom-contact OTFTs, the dominant leakage conduction mechanism is via displacement current. OTFTs that use a bottom-contact design exhibit lower leakage conduction than those that use a top-contact design.

Temperature effects on the electrical properties of ambipolar organic complementary-like inverters

Abstract Efficient and balanced pentacene-based ambipolar organic thin-film transistors (AmOTFTs) were prepared and ready for use to achieve simple fabrication of complementary-like inverters with high gains. We examined the effect of temperature on the electrical characteristics of pentacene-based AmOTFTs and corresponding complementary-like inverters. Such complementary-like inverters can perform nonpolar operations, such as first and third quadrant operations, and can work normally up to nearly 110 °C. In situ measurements demonstrated the excellent thermal stability of pentacene active layer at the corresponding temperatures. The operating principle of the ambipolar-based complementary-like inverters was also discussed. Given the ambipolar nature of pentacene active channel, the dual-carrier recombination and release processes governed the temperature-dependent switch behaviors of the inverters. A temperature-dependent linearity function was derived using the hysteresis switch voltage, thereby highlighting that pentacene-based ambipolar complementary-like inverters could potentially be employed in temperature sensors.

High Performance Organic Thin Film Transistors Using Pentacene-Based Rare-Earth Oxide Bilayer Gate Dielectric

High-k dielectrics, neodymium oxide (Nd2O3) and lanthanum oxide (La2O3) are regarded as useful materials to reduce the operating voltage of organic thin film transistors (OTFTs). However, the high-k dielectrics often have the drawback of high interface trap density leading to high leakage current and low carrier mobility. Here, a bilayer La2O3/Nd2O3 gate dielectric for OTFTs is employed to address the issues. A top contact pentacene-based organic thin film transistor is exhibiting a variation in carrier mobility as the thickness of Nd2O3 changes from 100 nm to 175 nm. Compared to the pentacene thin film transistor with solely 118 nm thick La2O3 gate dielectric, the OTFTs with the bilayer La2O3/Nd2O3 (118 nm/150 nm) gate dielectric improves the threshold voltage from − 0.42 V to − 1.1 and V, the carrier mobility from 0.54 cm2/Vs to 1.08 cm2/Vs. These bilayer devices produced the current on–off ratio of 2.4 × 105 and the subthreshold slope of 0.5 V/decade. The OTFT device exhibits good stability under a low voltage bias-stress effect. The OTFTs are investigated in the atomic force microscope to understand the dielectric–pentacene interface to verify the improved OTFT parameters. The morphology and structure of the La2O3/Nd2O3 bilayer dielectric films are studied using a field emission scanning electron microscope and x-ray diffraction techniques.

Graphene Oxide as a Dielectric and Charge Trap Element in Pentacene-Based Organic Thin-Film Transistors for Nonvolatile Memory.

In this report, the dielectric nature of graphene oxide (GO) was exploited for the successful implementation of low-power pentacene thin-film transistors suitable for nonvolatile memory applications. Two different types of devices were fabricated on indium tin oxide-coated glass substrates with two different metals, viz., gold and aluminum, as the source and drain contacts. The performance of the devices was analyzed from their field-effect characteristics. Both the devices showed dominant p-type charge transport behavior. The breakdown electric field was determined to be 1.02 × 108 V/m. The current transport mechanism was explained from the output characteristics using the Fowler–Nordheim tunneling theory. Capacitance–voltage (C–V) measurements have been employed to determine the value of the oxide capacitance and to examine the memory effect. The hysteresis behavior observed from the C–V characteristics show the suitability of the device for memory applications with a low operating voltage of 3 V. The charge trapping behavior of GO was explained by the energy band diagram. Frequency-dependent C–V measurements in the range 100 kHz to 1 MHz were also performed to account for the memory window obtained in the devices. The charge retention and endurance characteristics were evaluated under a constant voltage stress to check the reliability of device operation.

Synthesis and characterization of photo-crosslinkable coumarin-containing polymer dielectric for organic transistors

Abstract Herein, a photo-crosslinkable coumarin-containing polymer, poly(7-(4-vinyl-benzyloxyl)-4-methylcoumarin) or PVBMC, was prepared, and its physicochemical and electrical properties as a gate dielectric in organic electronic devices, such as organic thin-film transistor (OTFT) and inverter, was evaluated. The crosslinking of PVBMC by exposure to UV light (365 nm) over time was characterized using Fourier-transform IR and UV–visible spectroscopy. The measured capacitance of the cross-linked PVBMC thin film in a metal-insulator-metal-type capacitor was as high as 36.4 pF/mm2. Pentacene-based OTFT and load-type inverter with the cross-linked PVBMC gate dielectric were prepared, and their electrical responses were evaluated under ambient conditions. The OTFT showed dominant hole charge carrier transport behavior with a field-effect mobility of 1.52 × 10−1 cm2/Vs and negligible hysteresis. The load-type inverter based on the OTFT exhibited moderate static and dynamic switching responses to the applied electrical pulse. These results suggest the potential application of photo-crosslinked PVBMC as a gate dielectric in the fabrication of high-performance OTFT-based devices.

Investigation of Various Thick Copper Phthalocyanine Buffer Layers on Pentacene-Based Organic Thin-Film Transistors

To systematically study the thickness effect of copper phthalocyanine (CuPc) buffer layers on pentacene-based organic thin-film transistors, various-thick CuPc buffer layers deposited on pentacene channel layers with various deposition rates were designed and studied in the work. By considering the contrary effect of the lower conductivity and the bandgap difference reduction of a CuPc buffer layer inserted between the Au electrode and the pentacene channel layer, the optimal thickness of the CuPc buffer layer stacked on the 50-nm-thick pentacene channel layer of the thin-film transistors was 5 nm. Furthermore, by considering the molecule ordering and quality of pentacene channel layer, the optimal deposition rate of pentacene channel layer of the thin-film transistors was 1.5 A/s. After measuring the organic thin-film transistors with the optimal parameters, the associated transconductance of 2.4 μS, effective carrier mobility of 0.23 cm2/Vs, threshold voltage of − 5.1 V, subthreshold swing of 1.46 V/dec., and on/off current ratio of 3.7 × 105 were obtained.

Pentacene bottom-contact thin film transistors with solution-processed BZT gate dielectrics

The solution-processed high-k barium zirconate titanate (BZT) as gate dielectrics for bottom-gate pentacene-based organic thin film transistor (OTFT) applications is presented. To reduce the transistor threshold voltage, higher work function metals (Au) is used as the gate electrodes. The threshold voltage is efficiently decreased from −3.6 to −2.15 V as compared to that of Al. In addition, the UV/ozone was employed to treat the Au (source/drain) surface to improve the poor crystalline of pentacene grown on Au. Moreover, the surface morphologies and orientations of pentacene films were analyzed through atomic force microscopy (AFM) and X-ray diffraction. As the results, the stack of pentacene molecules from disorder state changed to vertical growth on the Au surface. Finally, the electrical properties of pentacene-based thin film transistors exhibit high field-effect mobility of 4.5 cm2/V·s, low subthreshold swing of 260 mV/decade, high on/off ratio of 1.4 × 105 and low operation voltage of −5 V. These results are better than the reported data using bottom contact pentacene OTFTs.

Total reversibility of hysteresis in the transfer characteristics of organic thin-film transistor based on pentacene for nonvolatile memory applications

In this work, we have investigated the reversibility of hysteresis phenomena in the transfer characteristics of pentacene-based organic thin-film transistors. A clear hysteresis behavior in transfer characteristics is reported. A forward and backward scan of the gate voltage measurements reflected the appearance of hysteresis that arises due to humidity effect. Under vacuum, the hysteresis phenomenon is due to a purely electrical phenomenon based on the creation, trapping, and de-trapping of traps while under humidity the hysteresis is attributed to the diffusion of water molecules and/or oxygen into the organic active layer. The hysteresis width continuously increases with increasing the humidity in the linear and saturation regime. In contrast, the hysteresis significantly reduced under vacuum after pumping of 48 h. Consequently, the increase in hysteresis in the linear and saturation regimes arise due to humidity could be eliminated by a simple pumping under vacuum indicating the reversibility process. Based on these results, the investigated devices will be promising for some practical applications, such as nonvolatile memory device.

Bending Performance of Flexible Organic Thin-Film Transistors With/Without Encapsulation Layer

Flexible pentacene-based organic thin-film transistors (TFTs) were fabricated and their performance was investigated as a function of the bending radius and the thickness of the polydimethylsiloxane (PDMS) encapsulation layer. The TFTs were fabricated on a flexible polyimide film (film thickness: 75 $\mu \text{m}$ ), and encapsulated by a PDMS layer. Degradation of the device performance during application of a tensile bending stress of 3 mm was minimized by utilizing an encapsulation layer thickness of 75 $\mu \text{m}$ , because the mechanical strain on the pentacene layer was almost off-set (tensile strain was applied to the bottom layer of the pentacene, and compressive strain was applied to the top layer of pentacene). At the tensile bending stress of 3 mm, the performance of the non-encapsulated TFT was degraded, whereas the encapsulated device showed great stability. This flexibility and bending stability were enabled by the use of the 75- $\mu \text{m}$ PDMS encapsulation layer, due to the location of the pentacene active layer in the neutral region position. A mechanical reliability test was performed for 120 min with a bending radius of 3 mm, demonstrating that only the device with the 75- $\mu \text{m}$ thick encapsulation layer showed stable device performance over a stress time of 120 min.

Performance enhancement of pentacene-based organic thin-film transistors using 6,13-pentacenequinone as a carrier injection interlayer

This work demonstrates pentacene-based organic thin-film transistors (OTFTs) fabricated by inserting a 6,13-pentacenequinone (PQ) carrier injection layer between the source/drain (S/D) metal Au electrodes and pentacene channel layer. Compared to devices without a PQ layer, the performance characteristics including field-effect mobility, threshold voltage, and On/Off current ratio were significantly improved for the device with a 5-nm-thick PQ interlayer. These improvements are attributed to significant reduction of hole barrier height at the Au/pentacene channel interfaces. Therefore, it is believed that using PQ as the carrier injection layer is a good candidate to improve the pentacene-based OTFTs electrical performance.