Peak Switch Voltage Research Articles

Inverse Class‐E power amplifier with broadband capability at different switch‐off duty ratio

AbstractThe paper explores the investigation of an inverse Class‐E amplifier featuring a series output filter across various switch‐off duty ratios D. Analysis of different duty ratios as a design parameter reveals their impact on peak switch voltage, output power capability, and maximum operating frequency. Notably, it is demonstrated that adjusting the D ratio affects these parameters, with specific emphasis on achieving a maximum normalized switch voltage lower than 2 and an output power capability exceeding 0.1 for D = 0.7. Furthermore, the paper considers both parasitic shunt capacitance and series inductor in the load network, a departure from previous works that solely focused on the series inductor. The proposed circuit is highlighted for its ease of implementation compared with conventional reactance compensation circuits employing parallel resonant circuits, which are challenging to form directly. An innovative approach is introduced to showcase the broadband performance of the inverse Class‐E amplifier. The measured drain efficiency and output power versus input power at 430 MHz are 82% and 45.3 dBm, respectively. A similar performance can be achieved within the frequency range of 380–600 MHz by proper tuning at saturated power. The measurement results demonstrate a maximum high power‐added efficiency (PAE) of 79% and drain efficiency of 82% within this frequency range, accompanied by a gain exceeding 12.0 dB and output power surpassing 44 dBm.

The ZVS Class E/F3 Inverter Using Piezoelectric Transformers for Energy Extraction

Enhanced class E inverters (EFn or E/Fn) reduce the high peak switch voltage that is prevalent in class E inverters. Additionally, their stability and load regulation capabilities are improved as compared to class E inverters. This paper proposes an enhanced class E inverter (E/F3) with a piezoelectric transformer (PT) replacing the auxiliary resonant networks. This class E/F3 inverter is designed by adding a tuned auxiliary LC network at the third harmonic of the switching frequency to the class E inverter. Both the primary and auxiliary resonant networks are realized using a piezoelectric transformer (PT). The converter is simulated in LTspice and an experimental prototype is built and tested. It is found that the experimental results concur with the simulation results, with a measured efficiency of 90%. Thus, the theoretical design is verified and the concept of energy extraction is achieved.

Design and Experiment of a Three Phase Two Switches Voltage Clamping Buck PFC

A new three‐phase two‐switch voltage clamping buck Power Factor Correction (PFC) is presents in this paper. The principle and equations of operations are described in detail. Based on the volt‐second balance principle of input inductance in the new converter, this paper gives the design method of the circuit's key components, with voltage and current stresses analyzed. On the basis of the theory above, a prototype with parameters of a 5 kW is designed. Problems of extremely high switch peak voltage stress in the conventional one are solved. The manufacturing cost of high power three phase rectifier has been significantly decreased. A 5 kW experimental prototype with unity power factor, 4.4% input line current THD, 200 Vdc output, and system efficiency of 96% at full load under 380 Vrms input line‐to‐line voltage has been successfully implemented. © 2023 Institute of Electrical Engineers of Japan. Published by Wiley Periodicals LLC.

Enhanced Power Conversion Capability of Class-E Power Amplifiers With GaN HEMT Based on Cross-Quadrant Operation

Class-E power amplifiers are widely used in megahertz frequency power conversion systems due to their high efficiency, which can further be enhanced by virtue of wide-bandgap devices such as GaN high-electron-mobility transistors. Here, a GaN-based cross-quadrant mode Class-E amplifier is proposed, which addresses one of the major challenges for such amplifiers, i.e., to achieve both high power and high efficiency with low-voltage-rating devices. By utilizing the reverse conduction of GaN transistors, a cross-quadrant mode Class-E amplifier with small dc-feed inductance is constructed, whose circuit model is derived by virtue of the Laplace transform technique. We demonstrate an experimental prototype operating at 3.11 MHz with a 100-V GaN transistor, achieving an output power of about 6 W with the efficiency being almost 90% when the input voltage is 10 V and the load resistance is 28 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\mathrm{\Omega }$</tex-math></inline-formula> . Compared with conventional Class-E amplifiers, the power conversion capability of the proposed amplifier is increased up to three times from 0.49 to 1.69 with a slight reduction in efficiency. Such cross-quadrant mode amplifiers can be used to improve the power conversion capability and to reduce the peak switch voltage at the same output power level.

A Multi-MHz Active Clamp Topology for High Cost-Performance Wireless Power Transfer

The single-switch topologies, e.g., the Class E topology, have the advantages of low component count, no shoot-through problem, simple driving circuit, which make it more suitable for high frequency low/medium-power wireless power transfer (WPT) applications. However, due to the high switch voltage stress, narrow soft switching range, bulky input choke, or ac inductor, its power delivery capability and applications are limited. In order to solve these problems, this article proposed a novel active clamp topology for high cost-performance medium-power WPT systems. The proposed topology offers low component count with no bulky inductor and low switch voltage stress, leading to high power-density, low cost, and compact size, i.e., high cost-performance for WPT applications. And the switch peak voltage can be adjusted and the soft switching operation can be achieved in a wide load range by designing the compensation capacitor and clamp capacitor. In this article, the detailed theoretical analysis and parameter design are discussed and the proposed topology is compared with the existing single-switch topology in terms of voltage stress, cost, and component count. A 120 W and 1 MHz active clamp WPT system is built and a 92.4% system efficiency is achieved with high cost-performance, which validate the feasibility of the proposed topology and the theoretical analysis.

A Single-Ended Hybrid Resonant Converter With High Misalignment Tolerance

This article proposes a single-ended hybrid resonant converter (SEHRC) for wireless charger to provide a cost-effective solution with high misalignment tolerance. A comprehensive characteristics analysis of the proposed converter is performed in both of time and frequency domain. The analysis discloses that the hybrid compensation performs impedance transformation which maintains the input impedance nearly constant. As a result, the optimum operation of SEHRC, including zero-voltage-switching, low voltage stress, high power transfer capability, and high efficiency can be maintained within a wide range of coupling coefficients. Also, it ensures a stable output current for both load and coupling variations. The design constraints and procedure are given. Furthermore, a zero-voltage-switching and zero-voltage-derivative-switching control scheme is proposed to achieve a higher efficiency and smaller output current fluctuation, as well as reduced peak switch voltage. Finally, a 1.3 kW prototype is built to verify the theoretical analysis. The test results demonstrate that the peak voltage of the proposed SEHRC is less than 2.7 times the input voltage. When the coupling coefficient varies 2.7 times, the output current changes by 1.16 times.

A Comparative Performance Analysis of Zero Voltage Switching Class E and Selected Enhanced Class E Inverters

This paper presents a comparative analysis of the class E and selected enhanced class E inverters, namely, the second and third harmonic group of class EFn, E/Fn and the class E Flat Top inverter. The inverters are designed under identical specifications and evaluated against the variation of switching frequency (f), duty ratio (D), capacitance ratio (k), and the load resistance (RL). To offer a comparative understanding, the performance parameters, namely, the power output capability, efficiency, peak switch voltage and current, peak resonant capacitor voltages, and the peak current in the lumped network, are determined quantitatively. It is found that the class EF2 and E/F3 inverters, in general, have higher efficiency and comparable power output capability with respect to the class E inverter. More specifically, the class EF2 (parallel LC and in series to the load network) and E/F3 (parallel LC and in series to the load network) maintain 90% efficiency compared to 80% for class E inverter at the optimum operating condition. Furthermore, the peak switch voltage and current in these inverters are on average 20–30% lower than the class E and other versions for k &gt; 1. The analysis also shows that the class EF2 and E/F3 inverters should be operated in the stretch of 1 &lt; k &lt; 5 and D = 0.3–0.6 at the optimum load to sustain the high-performance standard.

An AC-DC Interleaved ZCS-PWM Boost Converter With Reduced Auxiliary Switch RMS Current Stress

The paper proposes a novel interleaved AC-DC ZCS-PWM boost converter that requires the use of just a single active auxiliary switch to assist in the turning off the main power circuit switches with ZCS. The auxiliary switch can be turned on and off with ZCS and its auxiliary circuit allows the converter to operate without an increase in the main switch peak current or voltage stress. The auxiliary switch in the converter is active for a much shorter time than in most other ZCS-PWM converter, which allows the converter to operate at higher power levels than other previously proposed interleaved ZCS-PWM converter with a single auxiliary switch. The proposed converter's operation is explained in the paper and its key features and design considerations are discussed. Experimental results that confirm the operation of the proposed converter are presented as well.

Self-magnetic insulation in plasma opening switches

The paper analyses the penetration of a magnetic field into the plasma bridge of nanosecond and microsecond opening switches. For switches with a conduction time of ~100 ns, simple formulae are derived to estimate the magnetic field velocity in collisionless and collisional plasmas. It is shown that in both cases this velocity is determined by the magnetic field rise rate to plasma density ratio raised to the power of 1/2. As the conduction time is increased to ~1 ${\rm \mu}$ s, the field velocity starts to depend on the plasma aggregation by a magnetic piston. At the same time, irrespective of the conduction time, the electron flow velocity is limited by the radial drift velocity in crossed magnetic and polarization electric fields. Such a limitation suppresses the current channel conductivity with respect to the Spitzer value by a factor equal to the electron magnetization parameter raised to one or another power. On completion of the conduction phase, the rate of rise of the switch resistance is proportional to the electron drift velocity. The peak switch voltage obtained in calculations is compared with its values recorded in experiments on mega-ampere current switching. A procedure is also presented for calculating the switch parameters to obtain the maximum possible voltage in the phase of current cutoff.

A Single-Switch High-Gain PV Microconverter With Low-Switch-Voltage-to-High-Voltage-Bus Ratio

A new soft-switched, single-switch electrolytic capacitor-less step-up dc/dc microconverter for photovoltaic applications is presented in this article. The proposed circuit is an improved coupled-magnetics based single-switch topology that has low-voltage stress across the switch compared to the high voltage dc bus level (380–400 V). The proposed circuit is able to achieve zero voltage switching turn- on and zero current switching turn- off for the switch. Since the input inductor in the proposed circuit operates in continuous conduction mode, the required input filter capacitance is reduced and hence, allows for the small-size nonelectrolytic capacitor to be used. The main advantage of the proposed circuit is that it is able to achieve high voltage gain while the ratio between the peak switch voltage and the output dc-bus voltage is reduced compared to other coupled-inductor based topologies. In addition, the proposed converter is able to achieve maximum power point tracking through variable switching frequency control. Results are provided on a 40-V/380-V, 200-W system to highlight the merits of the proposed circuit.

Experimental Investigation of Voltage Scaling in a Plasma Switch

Voltage scaling in a plasma opening switch is theoretically generalized depending on the conduction switch current. The scaling has been verified experimentally using the GIT-4 megaampere installation. It is found that the peak switch voltage depends nonmonotonically on the conduction current: a part with voltage increase for the switch conduction current less than ~1 MA is replaced by voltage decrease with further increase of the current to the level exceeding ~1 MA. The scaling changes due to different mechanisms of magnetic field penetration through the plasma: the switch operation regime with plasma erosion dispersal is replaced by the regime of plasma aggregation by increasing magnetic pressure. As a result, the pulse power of interruption current is restricted by the peak voltage reached at a switch current of ~1 MA. The detected switch voltage scaling has also been confirmed by approximation of experimental data obtained with megaampere facilities HAWK and DECADE.

Switched-Capacitor LLC Resonant DC-DC Converter With Switch Peak Voltage of Vin/2

A DC-DC hybrid switched-capacitor LLC resonant converter integrating a ladder cell at the input of the LLC resonant converter using frequency modulation is proposed in this paper. This converter has six switches that are subjected to half the voltage of the input source. All switches commutate at zero voltage over the entire load range, and the diodes of the output rectifier bridge commutate at zero current. The proposed converter has the following characteristics: (a) symmetrical operation, (b) simple frequency modulation, (c) commutation of all switches at zero voltage, (d) all switches subjected to half the input voltage, and (e) static gain practically immune to load variations. Theoretical analysis, design, and experimental results in the laboratory for a prototype of 2 kW, 1000 VDC input, 48 VDC output, and 90 kHz switching frequency are included in this study. The maximum efficiency measured was 97.3%.

Theory and Implementation of a Load-Mismatch Protective Class-E PA System

Highly efficient switch-mode class-E power amplifiers (PAs) are sensitive to load impedance variations. For voltage standing wave ratios (VSWRs) up to 10:1, the peak switch voltage and the average switch current can increase by a factor of 1.7 and 2.5, respectively, relative to those under nominal load conditions, imposing serious reliability risks. This paper describes a technique to self-protect class-E PAs to decrease their sensitivity to load variations, relying on the tuning of the switch-tank relative-resonance frequency, implemented by an on-chip switched-capacitor bank (SCB). To validate the technique, load-pull measurements are conducted on a class-E PA implemented in a standard 65-nm CMOS technology, employing an off-chip matching network, augmented with a fully automated self-protective control loop. Under nominal conditions, the PA provides 17.8 dBm at 1.4 GHz into $50\,{\Omega }$ from a 1.2-V supply with 67% efficiency. The proposed self-protective PA can reduce its peak switch voltage below the technology- and switch design-related limit for any load with a VSWR up to 19:1 while not considerably impacting output power and efficiency, which see a maximum degradation of 1.6 dB and 6%, respectively. Furthermore, a class-E PA designed to safely handle $2.5{\times }$ the nominal average switch current can reliably operate for VSWRs up to 19:1 when protected with our technique.

Steady-State Analysis of Class-E Shunt Inductor Inverter Outside ZCS and ZDCS Conditions

The class-E shunt inductor inverter (SII) topology typically operates based on zero-current switching (ZCS) and zero-derivative current switching (ZDCS) conditions. Based on these terms, the peak switch voltage and load resistance are eliminated as the major limitation parameters to implement the class-E SII with the desired design specifications. This paper introduces the design and analysis of the class-E SII with the specified deviation from both ZCS and ZDCS conditions. Therefore, 2 degrees of the design freedom are obtained. Two new parameters that are normalized by the dc-supply current are defined in terms of the deviation from ZCS, i.e., $\alpha $ and ZDCS, i.e., $\beta $ . This operation mode of class-E SII is named as the nonzero current. The performance characteristics and design relationships are obtained in terms of the phase shift between the input and output voltages. The demonstration of the proposed operation mode is proven by fabrication of a prototype circuit with output power 10 W at 4-MHz operating frequency and close agreement between experimental outcomes with the simulation and theoretical results.

Effect of Shunt Capacitances on Performance of Current-Mode Class-DE Power Amplifier at Any Active Time

In this paper, a current-mode Class-DE (CMCDE) power amplifier is presented. The CMCDE with linear shunt capacitance under zero-current switching (ZCS) and zero current-derivative switching (ZCDS) conditions at any active time is analyzed, simulated, and fabricated. An analytical theory along with the design simulation and verification by experimental results at active time $\tau _{d}= \pi / 2$ are given. It was shown that the peak switch voltage can be adjusted with active time $\tau _{d}$ . The proposed amplifier offers several desirable features, such as simple structure and possibility to include the parasitic inductance and shunt capacitance of the mosfet into a load network, so that ZCS condition is maintained. The results show that the switch voltage and current obtained in CMCDE amplifier are inversed in comparison to the voltage-mode Class-DE (VMCDE) amplifier by using a simple output matching network and series inductance. Also, we could control the harmonics in one resonator in comparison to multiple resonators used in some high-efficiency power amplifiers. The measured maximum drain efficiency of 88% and power gain of 22 dB at 42-dBm output power was obtained at 4 MHz for CMCDE amplifier at active time $\tau _{d}= \pi / 2$ .

Design of Class E Power Amplifier with New Structure and Flat Top Switch Voltage Waveform

In this paper, a new topology of the class E power amplifier (PA) is proposed. The output circuit in the proposed PA is different from that in the conventional class E PA. The conventional output circuit of class E PA consists of shunt capacitor, resonant capacitor, resonant inductor, and shifting inductor. An additional shunt capacitance is added between the resonant capacitance and the shifting inductor to shape the reduced switch voltage. The peak switch voltage of the proposed class E PA is approximately 78% of that of the conventional one, which shows a reduction in peak switch voltage. The lower peak switch voltage reduces the breakdown voltage of the active device. Also, the proposed structure can introduce a new family of switching PAs with interesting specifications. Several values of switch voltage reduction and output power capability could be achieved by varying the circuit elements. Zero voltage and zero derivative switching conditions are achieved in the switch voltage of the designed circuit. The simulation of the proposed circuit is performed using PSpice software. For verification, the presented PA is fabricated and measured.

MHz zero‐voltage‐switched isolated resonant converter for wide‐output‐voltage application

This study proposes a MHz isolated resonant converter, which achieves buck–boost DC/DC conversion, zero-voltage switching and the resonant components absorb the parasitic parameters. The DC analysis method and MATLAB computational algorithm are proposed for acquiring the specific circuit characteristics, including the voltage conversion ratio, the rms value of switch current and peak voltage of the semiconductors. The active power and apparent power are also analysed to provide design basis of optimising efficiency. The proposed converter shows greater advantages on voltage stress, current stress and efficiency over traditional isolated Sepic multi-resonant converter. A wide-output-voltage prototype based on the proposed converter was built in the lab and the experimental results verify the theoretical analysis well.

A Family of High-Frequency Single-Switch DC–DC Converters With Low Switch Voltage Stress Based on Impedance Networks

This paper presents a novel family of single-switch resonant dc-dc converters with low switch voltage stress. The single-switch resonant converter which has a ground-referenced switch is advantageous for implementing the gate drive circuit and operating at several-MHz switching frequency. However, the conventional ones mostly have high voltage stress on the switch, roughly 4-5 times the input voltage. In this paper, we propose the single-switch converter topologies derived from the drain-source impedance networks consisting of two inductors and two capacitors. The switch voltage of the proposed converters is shaped into a near trapezoid by designing the resonant networks to have the desired drain-source impedance. Furthermore, a simple and specific design scheme is presented here so that the peak switch voltage is lowered to 2.2-2.5 times the input voltage while zero voltage switching is achieved. Experimental results from a 20-W GaN-based prototype operating at 10 MHz demonstrate the feasibility of the proposed converter topologies and the design method.

A Study on the New Active Clamp Snubber Applied Quasi Resonant Flyback Converter

In this paper, active clamp snubber method was proposed to reduce effectively the switching surge voltage of the conventional quasi resonant(QR) flyback converter. The usefulness and practicality of the proposed method in QR flyback converter were verified through steady state analysis and its experimental results. The performance of the proposed circuit was compared with the RCD snubber method. It was verified from the experimental results that the switch peak voltage of the proposed method was limited below 5% while the switch peak voltage of the RCD snubber was continuously increasing accordingly with the load current. Furthermore, this new active clamp snubber method could be applied to QR flyback and its power conversion efficiency was superior to the RCD snubber one.

Analysis of inverse E class power amplifier with finite DC feed in sub-nominal condition

In this work an inverse E power amplifier with finite DC feed in sub-nominal condition is discussed. In the conventional inverse E the DC feed inductor is considered very large which imposes some conditions to the circuit such as constant current drawn from voltage supply and also a large value for inductance is hard to implement on-chip so this work removes the very large condition from DC feed inductance and proposes a finite DC feed for the structure and extracts the circuit parameters and design equations with regards to this matter. Furthermore to achieve a flexible design this work uses the phase shift between input and output voltages to control efficiency, peak switch voltage and peak switch current then the value of circuit elements and the tradeoffs for every choice are discussed in details and a design guideline is presented for achieving different goals in a finite DC feed inverse E PA. Finally the circuit is simulated in the 0.18 µm CMOS technology and the results are being verified.