Peak Dc-link Voltage Research Articles

Design and digital implementation of voltage and current mode control for the quasi‐ Z ‐source converters

Two strategies of peak dc-link voltage control of the voltage-fed quasi-Z-source converters (qZSC) are analysed and compared. Different from the currently available literatures, the peak dc-link voltage is estimated by summing the two capacitor voltages of qZSC. The voltage mode and current mode controls are derived based on the fifth-order small-signal model of the quasi-Z-source network with inductive load. Both controllers are digitally implemented using a digital signal processor (DSP)-based direct digital design approach, where the real-time workshop is used for automatic real-time code generation for a TMS320F2808 DSP. Digital compensators are tuned using Bode diagram and discrete frequency response approaches with a graphical MATLAB/single-input single-output tool. The performances of the proposed control strategies are verified by the experimental results during start-up, input voltage and load disturbances.

Grid‐tied photovoltaic system with series Z‐source inverter

This study presents a grid-tied photovoltaic (PV) system based on the series Z-source inverter. The grid-tied current control strategy, the dc-link voltage control, as well as the maximum power point tracking scheme is realised in the single-stage system. The current control strategy is performed based on dq rotating frame. Indirect dc-link control is adopted to achieve constant peak dc-link voltage and thus can simplify the controller design in inversion stage. The overall control strategy is given and analysed in detail. Simulation and experimental results demonstrate that the proposed system can be applied in PV system with a wide input voltage range, which verify the correctness and validity of the analysis.

Self-Tuning Fuzzy PI-Type Controller in Z-Source Inverter for Hybrid Electric Vehicles

This paper presents new algorithms to control speed induction motor (SIM) and the peak dc-link voltage (PDV) across the inverter bridge in z-source inverters (ZSI) by applying self-tuning fuzzy PI controller (SFP) with robust structure and non-linear characteristic. In particular, this so-called SFP based control algorithm (SFPA) is applied to a closed loop speed control system of induction motor, which relies on direct torque control scheme combined with modified space vector modulation (DTCMSVM) control strategy with so many exceptional features (e.g. fast torque response, low steady state torque ripple, and high accurate). Additionally, SFPA is used to control SIM and PDV are more adaptive to the sudden change of parameters such as load torque, stator resistance and dc input voltage (DIV), respectively. The transient response of SIM and PDV are thus improved with less over shoot, short rise time, small steady-state error and fast settling time, with low disturbance for output voltage stabilization in the inverter bridge. As a result, we achieve higher accuracy and robustness of SIM control system. Our new SFPA is verified in both simulation and experimental implementation using MATLAB and dSPACE DS1103, respectively. DOI: http://dx.doi.org/10.11591/ijpeds.v2i4.571

A DSP-Based Dual-Loop Peak DC-link Voltage Control Strategy of the Z-Source Inverter

This paper proposes a direct dual-loop peak dc-link voltage control strategy, with outer voltage loop and inner current loop, of the Z-source inverter (ZSI). The peak dc-link voltage is estimated by measuring both the input and capacitor voltages. With this proposed technique, a high-performance output voltage control can be achieved with an excellent transient performance including input voltage and load current variations with minimized nonminimum phase characteristics caused by the right half-plane zero in the control to peak dc-link voltage transfer function. Both controllers are designed based on a third-order small-signal model of the ZSI using the direct digital control method. The performance of the proposed control strategy is verified by simulation and experimental results of a 30-kW ZSI prototype.

A new topology for parallel resonant DC link with reduced peak voltage

A new topology for a parallel resonant DC link is proposed. It offers reduced peak DC link voltage without generating high di/dt. The effect of various parameters on the link voltage waveform is discussed. A design procedure is outlined to determine the component values for any desired resonant frequency. A comparison with the actively clamped circuit is given. There is an excellent correlation between the experimental and simulation results.