Passive Component Count Research Articles

Minimum Active Component Count Design of a PIλDμ Controller and Its Application in a Cardiac Pacemaker System

A generalized structure for implementing fractional-order controllers is introduced in this paper. This is achieved thanks to the consideration of the controller transfer function as a ratio of integer and non-integer impedances. The non-integer order impedance is implemented using RC networks, such as the Foster and Cauer networks. The main offered benefit, with regards to the corresponding convectional implementations, is the reduced active and, also, passive component count. To demonstrate the versatility of the proposed concept, a controller suitable for implementing a cardiac pacemaker control system is designed. The evaluation of the performance of the system is performed through circuit simulation results, using a second-generation voltage conveyor as the active element.

Design and Implementation of Bridgeless AC/DC PFC Sepic Converter with Valley-Fill Circuit

The continuous requirement to improve power quality has motivated the proposal of several PFC circuit topologies. The conventional AC/DC SEPIC has increased conduction loss due to the presence of bridge rectifier. In order to reduce the conduction loss and to improve the efficiency this research work deals with a bridgeless SEPIC (single ended primary inductance converter) AC/DC PFC integrated valley-fill circuit (VFC). The number of components is reduced compared to the existing topologies. The bridgeless topology results in reduced conduction loss, reduced current stress and improved system performance compared with the traditional SEPIC and the existing topologies. The circuit configuration of the suggested topology has been simulated using MATLAB/SIMULINK. The functional parameters of the projected AC/DC integrated VFC is compared with the conventional SEPIC (Con-SEPIC), con-SEPIC integrated VFC and bridgeless SEPIC in terms of passive component count, output voltage ripple, input current ripple, supply power factor, Total Harmonic Distortion. From the simulation outcomes, it is concluded that the bridgeless topology provides high power factor, reduced ripple and reduced supply current harmonics. The results are validated.

Analysis, Design, and Performance Evaluation of Differential-Mode Y-Source Converters for Voltage Spikes Mitigation

Impedance source converters (ISC) based on the magnetic coupling can enhance their voltage gains by maintaining lower shoot-through duty ratios and reduced passive component count. However, the nonzero leakage inductance in the practical ISC generates high switching voltage spikes resulting in poor voltage regulation. Therefore, an absorbing circuit with additional components is crucial to reduce these voltage spikes and to absorb the energy stored in leakage inductances. This article presents a family of differential-mode Y-source converters (DMYSCs) as an alternative to the latest Y-source converter that mitigates the switching voltage spikes without increasing the number of components. The proposed converters DMYSC-I, DMYSC-II, and improved Γ-type Y-source converter are derived from the original Y-source impedance network by altering the winding orientation. In this article, the respective topologies with their working principles are studied and the characteristics are compared with other Y-source converters. Simulation and experimental results have confirmed the abilities of the proposed converters to mitigate their switching voltage spikes.

Generalized Cockcroft-Walton Multiplier Voltage Z-Source Inverters

An impedance-source inverter can offer the voltage buck-boost function in a single-stage circuit. Its advantages include a simple structure, safety, and reliability. This article proposes a Cockcroft-Walton multiplier voltage (CWMV) impedance-source inverter consisting of a modified CWMV circuit and an impedance-source inverter. There are two types of circuits: the CWMV Z-source inverter (ZSI) and the CWMV quasi-Z-source inverter (qZSI). In a CWMV qZSI, the input current is continuous, the voltage overshoot across the bridge is small, and the boost capability is great, with the disadvantage is that its passive component count is increased. This article studies the static and dynamic characteristics of the two inverters. The operating modes of the CWMV qZSI is studied, the voltage and current stress of each device are analyzed, the small signal model of the circuit is established, and a proportional-integral-differential controller with good control performance is designed. Compared with existing impedance-source inverters, a CWMV qZSI has obvious advantages in terms of the voltage and current stresses on components, and also in terms of its inductor size, magnetic core volume, and overall efficiency. The theoretical analysis was verified by a 1 kW laboratory prototype. The experimental results were consistent with the theoretical analysis.

Novel active clamped Y‐source network for improved voltage boosting

Y-source impedance networks are one of the prominent two-port networks for DC–DC and DC–AC applications with the higher boosting ability and reduced stress across the switching elements. However, the boosting ability of the Y-source converter needs better magnetic coupling between the windings. The loosely coupled inductors cause high-voltage spikes and poor voltage regulation. Use of highly rated switches or incorporation of the proper clamping circuit is essential to improve the performance Y-source converter. It is always better to go with clamping/absorbing circuits instead of the selection of highly rated devices. Various passive and active clamping/absorbing circuits are introduced in literature to suppress the voltage spikes at the expense of higher component count. This article proposes a novel active clamped Y-source impedance network and its family by adding one additional clamping diode to the existing type-I improved Y-source network. Compared to other Y-source networks, the proposed networks absorb the voltage spikes with reduced passive component count and re-utilise the absorbed energy to enhance the voltage gain in the presence of leakage inductance and winding equivalent series resistance. Finally, one of the proposed impedance networks, i.e. an active clamped Y-source DC–DC converter, has been verified experimentally using a ferrite core.

Comprehensive Comparative Analysis of Impedance-Source Networks for DC and AC Application

This paper presents a comprehensive analytical comparison of the impedance-source-based dc-dc and dc-ac converters in terms of the passive component count and size, semiconductor stress, and range of input voltage variation. The conventional solution with a boost converter was considered as a reference value. The main criterion of the comprehensive comparison was the energy stored in the passive elements, which was considered both under a constant and predefined high frequency current ripple in the inductors and the voltage ripple across the capacitors. Main impedance-source converters with or without a transformer and with or without inductor coupling were analyzed. Dc-dc and dc-ac applications were considered. Selective simulation results along with experimental verification are shown. The conclusions provide a selection guide of impedance-source networks for different applications taking into account its advantages and disadvantages.

Single‐phase high‐voltage gain switched LC Z‐source inverters

Recently, switched-inductor Z-source inverters (SL-ZSIs) have been reported to achieve high-voltage gain and good power inversion operation at low shoot-through duty ratio D as compared to conventional ZSI. As the SL-ZSIs have high passive component count, weight, volume and losses of the system increases that lead to reduction in efficiency. To address the issues of conventional ZSI and SL-ZSIs, two single-phase switched LC (SLC)-ZSIs (Type 1 SLC-ZSI and Type 2 SLC-ZSI) are proposed in this study to achieve high-voltage gains at low values of D with lower passive component count as compared to SL-ZSIs. At low values of D , modulation index M approaches to higher values which results into improved AC output at reduced harmonic distortion. Due to low passive component count in the proposed inverters, weight, volume and losses decreases resulting into increase in efficiency. The proposed inverters can be used in various DC-AC and DC-DC power conversions in renewable energy applications due to their high-voltage gain, better immunity to EMI noise and higher reliability. The detailed steady-state analysis of the two proposed SLC-ZSIs is given in this study. Scaled down experimentation has been carried out to verify the performance of the proposed inverters.

Comparison of Impedance-Source Networks for Two and Multilevel Buck–Boost Inverter Applications

Impedance-source networks are an increasingly popular solution in power converter applications, especially in single-stage buck-boost power conversion to avoid additional front-end dc-dc power converters. In the survey papers published, no analytical comparisons of different topologies have been described, which makes it difficult to choose the best option. Thus, the aim of this paper is to present a comprehensive analytical comparison of the impedance-source-based buck-boost inverters in terms of passive component count and semiconductor stress. Based on the waveform of the input current, i.e., with or without a transformer, and with or without inductor coupling, the impedance-source converters are classified. The main criterion in our comprehensive comparison is the energy stored in the passive elements, which is considered both under constant and predefined high frequency current ripple in the inductors and the voltage ripple across the capacitors. Two-level and multilevel solutions are described. The conclusions provide a “one-stop” information source and a selection guide of impedance-source-based buck-boost inverters for different applications.

DYNAMIC MODEL AND HYBRID DESIGN OF CURRENT FED SWITCHED INVERTER FOR DMPPT FUEL CELL SYSTEMS

This paper proposes the dynamic model of PEM fuel cell and hybrid design of current fed switched inverter. Recently, the safe and reliable operation of PEM fuel cell especially in integrating and connecting to a hybrid wind/PV distributed generation system. In order to reduce dc-link capacitor requirement, current source inverter (CSI) offers higher reliability compare to voltage source based solar inverter. The proposed converters are applicable to fuel cell power generation and it is interface with single phase grid. The hybrid design of current-fed switched inverter (CFSI) is used to combines the high-gain property of ZSI and low passive component count of SBI. This analysis can be achieved leading current control, maximum power generation of fuel cell and high step-up capability of inverter. The proposed scheme of inverter uses only one L –C filter and three switches apart from the inverter structure. The modulation index based the pulse width modulation (PWM) control strategy is applied for the proposed inverter. The novel DMPPT (distributed MPPT) is applied in fuel cell sources to extract the maximum power. The simulation results are carried out and presented for analysis the performance of these topologies using MATLAB/SIMULINK.

Current-Fed Switched Inverter

High-boost dc-ac inverters are used in solar photovoltaic (PV), fuel cell, wind energy, and uninterruptible power supply systems. High step-up and step-down capabilities and shoot-through immunity are some of the desired properties of an inverter for a reliable, versatile, and low-distortion ac inversion. The recently developed Z-source inverter (ZSI) possesses these qualities. However, the realization of ZSI comes at a cost of higher passive component count as it needs two sets of passive filters. A switched boost inverter (SBI) has similar properties as ZSI, and it has one L-C pair less compared to ZSI, but its gain is less than ZSI. This paper proposes the current-fed switched inverter (CFSI) which combines the high-gain property of ZSI and low passive component count of SBI. The proposed inverter uses only one L-C filter and three switches apart from the inverter structure. The inverter topology is based on current-fed dc/dc topology. Steady-state analysis of the inverter is presented to establish the relation between the dc input and the ac output. A pulse width modulation (PWM) control strategy is devised for the proposed inverter. An experimental prototype is built to validate the proposed inverter circuit in both buck and boost modes of operation. A 353-V dc-link and a 127 V (rms) ac are obtained from a 35.3-V dc input to demonstrate the boost mode of operation. A 200-V dc-link and a 10.5-V (rms) ac are obtained from a 37.8-V dc input to verify the buck mode of operation of CFSI.

Switched-Inductor Quasi-Z-Source Inverter

This paper deals with a new family of high boost voltage inverters called switched-inductor quasi-Z-source inverters (SL-qZSIs). The proposed SL-qZSI is based on the well-known qZSI topology and adds only one inductor and three diodes. In comparison to the SL-ZSI, for the same input and output voltages, the proposed SL-qZSI provides continuous input current, a common ground with the dc source, reduced the passive component count, reduced voltage stress on capacitors, lower shoot-through current, and lower current stress on inductors and diodes. In addition, the proposed SL-qZSI can suppress inrush current at startup, which might destroy the devices. This paper presents the operating principles, analysis, and simulation results, and compares them with those of the SL-ZSI. To verify the performance of the proposed converter, a laboratory prototype was constructed with 48 Vdc input and an ac output line-to-line voltage of 120 Vrms. The simulation and experimental results verified that the converter has high step-up inversion ability.

Three-Level AC–DC–AC Z-Source Converter Using Reduced Passive Component Count

This paper presents a three-level AC-DC-AC Z-source converter with output voltage buck-boost capability. The converter is implemented by connecting a low-cost front-end diode rectifier to a neutral-point-clamped inverter through a single X-shaped <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LC</i> impedance network. The inverter is controlled to switch with a three-level output voltage, where the middle neutral potential is uniquely tapped from the star-point of a wye-connected capacitive filter placed before the front-end diode rectifier for input current filtering. Through careful control, the resulting converter can produce the correct volt-second average at its output, while simultaneously achieving inductive voltage boosting by shooting through either an appropriately selected inverter phase-leg or two phase-legs being commanded simultaneously. More interestingly, these performance features are achieved with no increase in the number of semiconductor commutations, and hence, no increase in switching losses. The proposed converter therefore offers a low-cost alternative to applications that need to ride through frequent input voltage sags. For confirming the converter performance, experimental testing using a constructed laboratory prototype is performed with its captured results presented in a later section of the paper.

Three-Level Z-Source Inverters Using a Single LC Impedance Network

Three-level Z-source inverters are recent single-stage topological solutions proposed for buck-boost energy conversion with all favorable advantages of three-level switching retained. Despite their effectiveness in achieving voltage buck-boost conversion, existing three-level Z-source inverters use two LC impedance networks and two isolated dc sources, which can significantly increase the overall system cost and require a more complex modulator for balancing the network inductive voltage boosting. Offering a number of less costly alternatives, this letter presents the design and control of two three-level Z-source inverters, whose output voltage can be stepped down or up using only a single LC impedance network connected between the dc input source and either a neutral-point-clamped (NPC) or dc-link cascaded inverter circuitry. Through careful design of their modulation scheme, both inverters can function with the minimum of six device commutations per half carrier cycle (similar to that needed by a traditional buck three-level NPC inverter), while producing the correct volt-sec average and inductive voltage boosting at their ac output terminals. Physically, the designed modulation scheme can conveniently be implemented using a generic "alternative phase opposition disposition" carrier-based modulator with the appropriate triplen offset and time advance/delay added. The designed inverters, having a reduced passive component count, are lastly tested in simulation and experimentally using a laboratory prototype with the captured results presented in a later section of the letter

Voltage-mode high-Q band-pass filters and oscillators employing single CDBA and minimum number of components

In this paper, voltage-mode second order high-Q band pass filters and oscillators which employ only single current differencing buffered amplifier (CDBA) as the active component are proposed. One of the four filter circuits and two of the four oscillators described have minimum passive component count properties, without using the internal pole of the active element. These BP filters can be easily cascaded without any recourse to impedance matching circuitry. The circuits have been analysed theoretically, simulated and experimentally tested in a laboratory. It is shown that the results of simulations and experimental work are in agreement with theoretical predictions.

Current mode multifunction filter using two CDBAs

This paper presents a cascadable current-mode (CM) multifunction biquadratic filter. The proposed circuit realizes all five different filter transfer functions employing only two current differencing buffered amplifiers (CDBAs), while previously reported CM multifunction filters require more CDBAs and more passive component count for the same number of filter transfer function realizations. Examples for different filter transfer functions are given along with the results of circuit simulations. It is shown that theoretical and simulation results are in good agreement.

Design and loss comparison of matrix converters, and voltage-source converters for modern AC drives

This paper compares a matrix converter (MC) and a DC-voltage link converter with an active front end for a 7.5 kW, 460 V induction motor drive. Part count, semiconductor losses, input filter design, and protection aspects are discussed. It is shown that the matrix converter's semiconductor losses are smaller only at full load operation for the same silicon area in both converters. A 33% reduction of the device current rating of the MC is possible, resulting in comparable thermal device stress. The overall passive component count and rating is only slightly better for the MC.