Parasitic Impedance Effects Research Articles

Voltage-Mode Multifunction and Universal Biquads with Two CFOAs

In this paper, a new voltage-mode (VM) multifunction filter including only two grounded capacitors, three resistors, and two current feedback operational amplifiers is introduced. This filter with one high input impedance and two low output impedances can simultaneously provide band-pass filter (BPF) and low-pass filter (LPF) responses with an adjustable gain. A universal VM filter topology with three inputs and one output generating high-pass filter (HPF), BPF, LPF, notch filter, and all-pass filter (APF) responses is obtained from the multifunction one. It has the same number of active and passive elements as the multifunction and a low output impedance. Sensitivities of both introduced filters are low enough. However, the APF of the introduced universal filter has a passive element-matching problem. As an example, parasitic impedance effects are considered for the LPF of the universal filter, while non-ideal gain analyses are given for the HPF. To see how the introduced universal filter works, countless simulations are performed through the SPICE (Simulation Program with Integrated Circuit Emphasis) program in which 0.13 [Formula: see text]m IBM CMOS technology parameters are utilized. DC supply voltages are selected as ± 0.9 V. Also, several experiments using commercially available AD844s with ± 10 V supply voltages are carried out to see the performance.

New Current-Mode Precision Full-Wave Rectifier Employing Single Inverted Z-Copy Current Differencing Buffered Amplifier

This paper aims to introduce a new current-mode precision full-wave rectifier configuration using a single inverted Z-copy current differencing buffered amplifier (IZC-CDBA) and two nMOSFETs. The unique feature of the proposed configuration is that it can simultaneously produce both the inverting and non-inverting rectified outputs without changing its architecture. Only active components make the configuration more suited for IC implementation. Moreover, it features low input impedance and high output impedance, making it fully cascadable. In addition, the new design enjoys extremely high-frequency operations. The effects of non-ideal transfer gain and parasitic impedances on the designed circuit are also explored. PSPICE simulations test the functionality of the proposed circuit for two distinct types of IZC-CDBA realization. The CMOS-based realization is checked through TSMC 0.18 μm level-7 technology parameters. The average DC current output, input dynamic range (± 450 μA), power consumption, temperature, total harmonic distortion, noise, and Monte-Carlo studies are performed to judge the efficiency level. The findings of the simulations match up nicely with the theoretical analysis. RMS and average value computation for a sinusoidal signal are also provided as an application of the suggested full-wave rectifier.

Novel FDNR, FDNC and lossy inductor simulators employing second generation voltage conveyor (VCII)

AbstractIn this research the second‐generation voltage conveyor (VCII) is employed in the design of grounded frequency dependent negative resistor (FDNR) and Frequency dependent negative conductance (FDNC). Additionally, two lossy parallel and series R‐L inductor simulators are also designed. To the best knowledge of the authors above mentioned immittance simulators are first time implemented using VCII. The FDNR requires two VCII, two capacitors and one grounded resistor. FDNC is implemented using three VCII, three resistors and two grounded capacitors. The R‐L inductor emulators requires two VCII, two resistors and one grounded capacitor. All the presented immittance simulators do not require any kind of passive component matching. The non‐ideal gain and sensitivity analysis is conducted to study their performance under circuit parameter variations. Parasitic analysis is also done for the FDNR, FDNC and R‐L inductance simulators to study the effect of parasitic impedance on the circuit operation. To validate the designs, they are simulated in Cadence design environment using 0.18 μm process design kit (PDK) at ±0.9 V supply. Additionally, the circuits are also validated using the macro model of commercially available integrated circuit (IC) AD844. The theoretical and simulation results are found to be in close agreement.

Supplementary DDCC+ based universal filter with grounded passive elements

A new voltage-mode (VM) analog filter is proposed in this paper. The proposed circuit is composed of three plus-type single output DDCCs and only grounded passive elements that are important when the integrated circuit fabrication is involved. It has three high input impedances and one low output impedance. As a result, it has the feature of easy cascadability with other VM structures. Passive element matching constraints and extra additional active devices are not needed for it. Non-ideality analyses such as non-ideal gain and parasitic impedance effects are also given. Many simulations through SPICE program and several experimental studies are included.

New Grounded and Floating Decremental/Incremental Memristor Emulators Based on CDTA and Its Application

This paper presents grounded and floating memristor emulators based on current differencing transconductance amplifier. These emulators are realized using current differencing transconductance amplifier, operational transconductance amplifier and a grounded capacitor. Incremental to decremental memristor emulators and vice versa are easily obtained by modifying the circuit slightly. These memristor emulators are very simple in design over other complex realizations reported in the literature. The pinched hysteresis curves have been obtained without using analog multiplier for a wide range of frequency that varies from 600 kHz to 2 MHz. The property of retention has been verified for proposed design of memristor emulators after applying voltage pulse of amplitude 100 mV and frequency 1 MHz. Non-ideal analysis including the effects of parasitic impedances on the behaviour of proposed memristor emulators has also been presented. The proposed designs of memristor emulators have been simulated by Mentor Graphics Eldo simulation tool with TSMC 0.18 µm, level 53, CMOS technology parameters. The performance of proposed memristor emulator is verified by embedding it in the realization of current- mode analog filter.

A voltage-mode PID controller using a single CFOA and only grounded capacitors

A new voltage-mode (VM) proportional integral derivative (PID) controller employing only a single active component named Current Feedback Operational Amplifier (CFOA), two resistors and two grounded capacitors is proposed. The proposed PID controller employs a canonical number of only grounded capacitors without requiring any critical passive component matching conditions and cancellation constraints. It has high input and low output impedances; thus, it can be easily cascaded with other VM structures. It can be easily constructed by a single commercially available active element. Frequency-dependent non-ideal gain and parasitic impedance effects on the performance of the proposed PID controller are investigated. The performance of the proposed PID controller circuit is demonstrated by using PSPICE circuit simulation program and an experiment. Also, 0.18 μm CMOS TSMC technology parameters with ±2 V supply voltages are used. Total power dissipation of the proposed PID controller is 1.64 mW.

Modified current follower-based immittance function simulators

ABSTRACTIn this paper, four immittance function simulators consisting of a single modified current follower with single Z− terminal and a minimum number of passive components are proposed. The first proposed circuit can provide +L parallel with +R and the second proposed one can realise −L parallel with −R. The third proposed structure can provide +L series with +R and the fourth proposed one can realise −L series with −R. However, all the proposed immittance function simulators need a single resistive matching constraint. Parasitic impedance effects on all the proposed immittance function simulators are investigated. A second-order current-mode (CM) high-pass filter derived from the first proposed immittance function simulator is given as an application example. Also, a second-order CM low-pass filter derived from the third proposed immittance function simulator is given as an application example. A number of simulation results based on SPICE programme and an experimental test result are given to verify the theory.

Water-enhanced guarding of polymer-coated IDE platforms as a key mechanism for achieving response immunity towards parasitic coupling events

Capacitive detection of organic pollutants present in water at low ppm and ppb levels by means of polymer-coated interdigitated electrode (IDE) structures is a challenging research and engineering task. The detection limit of a measuring system is dependent on its noise level and systematic physical nonidealties. To achieve a high detection sensitivity all parasitic impedance effects must be reduced as much as possible in order not to interfere with the information carrying signal. In comparison to ‘closed’, three-dimensional structures, the electrical sensing field of the ‘open’, planar IDE structure is geometrically difficult to guard. Direct exposure to aqueous solutions may cause unpredictable parasitic coupling to the surrounding, which results in changes in the sensitivity of response of the device to changes in environmental conditions such as salt concentration and pH. Thicker polymer layers increase the distance between the electrode plane and the water phase, thereby reducing the parasitic coupling effects but at significant cost of the sensing response time. In this work we demonstrate how water-enhanced electrical coupling to guarding electrodes is a key mechanism in achieving response immunity to parasitic electric-field bending without impairing the detection performance of the polymer-coated IDE platform. Our work contributes to the knowledge of capacitive response interpretation and mechanisms and points out important design considerations for improved sensing systems, in particular for applications in aqueous environments such as droplet and flow detectors for biomedical and environmental fields.

CMOS FIRST-ORDER CURRENT-MODE ALL-PASS FILTER WITH ELECTRONIC TUNING CAPABILITY AND ITS APPLICATIONS

In this paper, a novel first-order current-mode (CM) electronically tunable all-pass filter including one grounded capacitor and two dual-output current followers (DO-CFs) is presented. The used DO-CFs are implemented using only 10 MOS transistors granting the proposed CM all-pass filter extremely simple structure. The proposed filter is suitable for integrated circuit (IC) fabrication because it employs only a grounded capacitor and is free from passive component matching conditions. Interestingly the introduced configuration uses minimum number of components compared to other works. It also offers other interesting advantages such as, alleviating all disadvantages associated with the use of resistors, easy cascadability and satisfies all technology requirements such as small sizing, simple realization, low voltage and low power operation. Additionally, the circuit parameters can be easily set by adjusting control voltages. Most favorably, the proposed CM all-pass filter can be simply used as a voltage-mode (VM) all-pass filter with outstanding properties of adjustable gain and tunability. To further show the versatility of the proposed structure a sinusoidal oscillator is also derived from presented CM all-pass filter. Nonideal gain and parasitic impedance effects on developed CM filter are discussed. Finally, simulation results with SPICE program are included to confirm the theory.

Unity/Variable-gain Voltage-mode/Current-mode First-order All-pass Filters Using Single Dual-X Second-generation Current Conveyor

In this paper, two new general topologies for realizing voltage-mode (VM)/current-mode (CM) first-order all-pass Alter transfer functions (TFs) are presented. The proposed topologies use single dual-X second-generation current conveyor (DXCCII) and three impedances Z1, Z2 and Z3. Based on the selection of Z1, Z2 and Z3, new VM and CM all-pass Alters with unity or variable gains are obtained. The proposed VM/CM filters have high-input/high-output impedances which provide easy cascading at their input/output terminals, respectively. Non-ideal gain and parasitic impedance effects, associated with actual DXCCII implementation, on the performance of the developed topologies are also included. Finally, simulation program with integrated circuit emphasis (SPICE) simulation results based on level 49, 0.25 μm TSMC complementary metal-oxide-semiconductor (CMOS) technology parameters are given to confirm the theory.

DESIGN AND STABILITY ANALYSIS OF MIXED-MODE FILTERS CONTAINING ONLY GROUNDED CAPACITORS

In this paper, three dual-mode (mixed-mode) analog filters using only grounded capacitors and two to three second-generation current conveyors (CCIIs) are presented. The first proposed filter can provide a transimpedance-mode (TIM) second-order filter transfer function (TF), and is free from passive component matching constraints, which is advantageous in integrated circuit (IC) design. Other two mixed-mode filters having the property of tunability are derived from the first proposed filter. However, the developed filters in this work, like other active filters, suffer from nonidealities such as nonideal gain and parasitic impedance effects which increase the order of the filter TFs; accordingly, stability problem may arise. In this study, stability analysis using gain and phase margins is accomplished. To explain the claimed ideas, several computer simulations and an experimental test are performed.

Current-mode electronically tunable biquadratic filters consisting of only CCCIIs and grounded capacitors

In this paper, a current-mode (CM) analog filter for simultaneously realizing high output impedance low-pass, band-pass and high-pass analog responses besides high output impedance notch and all-pass analog filter responses with interconnection of the relevant output currents, is presented. Also, two CM filters for simultaneously providing high output impedance universal filter responses are derived from the proposed one. All of the introduced CM topologies employ a canonical number of only grounded capacitors without requiring any resistors, and do not need critical component matching conditions. All of the developed circuits have low input impedance and high output impedance resulting in easy cascadability with other CM ones. Frequency dependent non-ideal gain and parasitic impedance effects on the performance of the presented first filter are investigated as examples. In order the show the performance of the filter and verify the theory, simulations are accomplished with SPICE program.

On the Realization of Simulated Inductors with Reduced Parasitic Impedance Effects

In this paper, a method for reducing the parasitic impedance effects of the current feedback operational amplifiers (CFOAs) in an inductor simulator at low frequencies is proposed. Also, two novel grounded inductors employing a current follower (CF) and a second generation current conveyor (CCII) are given to illustrate the parasitic reduction technique clearly. The low frequency restrictions of the proposed inductors due to terminal parasitic resistances can be improved by using the presented parasitic impedance reduction technique. SPICE simulations show that the presented inductor employing CFOAs in a voltage-mode (VM) band-pass and high-pass filter application has lower parasitic effects at low frequencies. In addition to simulation results, experimental test results are given to verify the theory.

Grounded Inductor Simulators With Improved Low-Frequency Performances

In this paper, the nonideality effects such as non-ideal gain and parasitic-impedance effects on the low-frequency performance of two new grounded inductor simulators are investigated in great depth. In addition, some low-frequency-performance improvement methods for grounded inductor simulators are discussed. Both of the grounded simulated inductors derived from the previously published ones employ a minimum number of grounded passive components and plus-type second-generation current conveyors. Four second-order voltage-mode universal-filter topologies, three of which are novel, are derived from newly and previously developed simulated inductors as application examples. Computer simulations with SPICE program including ideal and experimental test results are drawn to verify theoretical ones.

Universal current-mode filters and parasitic impedance effects on the filter performances

In this letter, two universal current-mode (CM) filters for simultaneously realizing low-pass, band-pass and high-pass characteristics are proposed. Both of the presented filters can also realize n...

Negative Impedance Converter With Reduced Nonideal Gain and Parasitic Impedance Effects

In this paper, two novel negative impedance converter (NIC) structures are proposed. One of the introduced NICs exhibits the property of both simultaneously reduced nonideal gain and parasitic impedance effects. Also, the other one shows the property of reducing only parasitic impedance effects and employs only second-generation current conveyors; accordingly, it can be realized with commercially available active devices such as AD844s. In order to show the performance of the introduced NICs, a versatile circuit employing a minimum number of active and passive elements for all the analog filters and lossy inductor simulators is developed. The proposed topology with appropriate component and input port selections gives four kinds of lossy grounded simulated inductors as well. Further, the presented multipurpose circuit is the first one that provides both of the current-mode and voltage-mode standard universal filter responses as well as synthetic inductors from the same topology. The developed topology employing only grounded capacitors can also realize transimpedance-mode low-pass and bandpass responses simultaneously; thus, it is convenient for integrated circuit (IC) realization. Likewise, positive lossy inductor simulators consist of a grounded capacitor. Nevertheless, the realized circuit requires a single resistive component-matching condition. Simulation results using SPICE program and experimental results are included to verify the theoretical ones.

Design of a Simple Current-Mode Multiplier Topology Using a Single CCCII+

In this paper, an analog current-mode (CM) multiplier circuit employing a single plus-type second-generation current-controlled conveyor (CCCII+) and a grounded resistor is proposed. The developed circuit can provide two-quadrant multiplication, four-quadrant multiplication, and frequency doubling all from the same topology with the selection of the applied input currents. In addition to the signal limitations of the multiplier configuration, the nonideality effects of the CCCII+ and the nonideal gain and parasitic impedance effects on the proposed circuit are investigated. The realized circuit is simulated with SPICE to exhibit its performance. In addition, a CM multiplier derived from the proposed multiplier is set up with commercially available active components to easily perform its experimental test.

Universal current‐mode filters and parasitic impedance effects on the filter performances

AbstractIn this letter, two universal current‐mode (CM) filters for simultaneously realizing low‐pass, band‐pass and high‐pass characteristics are proposed. Both of the presented filters can also realize notch and all‐pass responses with interconnection of the relevant output currents. They employ second‐generation current‐controlled conveyors (CCCIIs) and only grounded capacitors. They also have low active and passive element sensitivities along with electronically adjustable angular resonance frequency (ω0) and quality factor (Q). Based on the first developed filter, the parasitic impedance effects of the conveyors on the filter performances are investigated in detail. Simulation results using SPICE simulation program are included to verify the theory. Copyright © 2007 John Wiley & Sons, Ltd.

Complex impedance measurements of calorimeters and bolometers: Correction for stray impedances

Impedance measurements provide a useful probe of the physics of bolometers and calorimeters. We describe a method for measuring the complex impedance of these devices. In previous work, stray impedances and readout electronics of the measurement apparatus have resulted in artifacts in the impedance data. The technique allows experimenters to find an independent Thevenin or Norton equivalent circuit for each frequency. This method allows experimenters to easily isolate the device impedance from the effects of parasitic impedances and frequency dependent gains in amplifiers.

On the realization of the floating simulators using only grounded passive components

In this paper, two novel circuits for realizing floating inductance, floating capacitance, floating frequency dependent negative resistance (FDNR) and grounded to floating admittance converter depending on the passive component selection are proposed. Both of the proposed simulators employ second-generation current controlled conveyors (CCCIIs) and only grounded passive elements. The non-ideal current and voltage gain as well as parasitic impedance effects on the first proposed circuit are investigated. Also, simulation results using SPICE program are given for the first introduced floating simulator to verify the theory and to exhibit the performance of the circuit.