The channel mobility, $\mu _{0}$ , parasitic source/drain resistances, ${R}_{S}/{R}_{D}$ , and virtual gate length, $\Delta $ , due to surface traps, at low drain–source bias, ${V}_{\text {DS}}$ , are important parameters of high-electron mobility transistors (HEMT’s). DC methods are available to extract these parameters from drain-current, ${I}_{D}$ , versus gate-source voltage, ${V}_{\text {GS}}$ , measurements. We report a comparative study of two such methods based on the linear ${I}_{D}-{V}_{\text {GS}}$ approximation, from the viewpoint of device modeling, process monitoring, and physical understanding. One method yields constant values of $\mu _{0}$ and ${R}_{S}+ {R}_{D}$ averaged over the ${V}_{\text {GS}}$ range, while the other yields variations of $\mu _{0}$ , ${R}_{S}$ , ${R}_{D}$ , and $\Delta $ with ${V}_{\text {GS}}$ . The study reveals some new details of these methods, and discusses their results on a range of GaAs and GaN HEMTs.
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