Parallel Processing Networks Research Articles

On a class of recursive network topologies

Abstract For the interconnection of the nodes of massively parallel processor networks, concepts are required, which are extendable. In this paper, a ‘recursive network’ is described. With a basic building block, essentially with a fixed number of links, arbitrarily large systems can be configured. At all levels, the interconnection topology is the same. Hence, a simple routing algorithm can be applied. The recursive network is described and compared with hypercube and mesh networks (with respect to the system diameter and the efficient use of the links).

On a class of recursive network topologies

For the interconnection of the nodes of massively parallel processor networks, concepts are required, which are extendable. In this paper, a ‘recursive network’ is described. With a basic building block, essentially with a fixed number of links, arbitrarily large systems can be configured. At all levels, the interconnection topology is the same. Hence, a simple routing algorithm can be applied. The recursive network is described and compared with hypercube and mesh networks (with respect to the system diameter and the efficient use of the links).

A Predictive Monitoring and Diagnosis System for Manufacturing

A systematic approach to the monitoring and diagnosis of machine tools and manufacturing processes is presented. This approach leads to a design methodology and a generic system structure for shop-floor applications. The essential components of this structure are discussed. Selected results obtained during several years of research illustrate crucial elements of the methodology. A modular and expandable system, whose design is based on the proposed methodology, is presented. This system, developed for a large car manufacturing company, has a hybrid structure composed of a traditional computer and a distributed parallel processing network.

Notes on termination of OCCAM processes

A typical problem of concurrent programming is to ensure the correct termination of the concurrent processes which implement a program. The concurrent language Occam 2 does not provide explicit mechanisms to handle the program termination. This paper describes how to implement the distributed termination of Occam programs expressed as a network of parallel processes, avoiding deadlock situations or never-ending execution. The technique is based on the propagation of a termination message down the network of processes. Some Occam 2 programs which use this technique are described.

Browsing parallel process networks

A hypertext is a non-linearly organized, linked information structure, designed to be interactively browsed. In this report we demonstrate the use of a hypertext system for visualization and simulation of the parallel control flow and message network of concurrent programs. Instead of constructing code browsers as special-purpose window systems that understand the syntax and semantics of particular languages, we present a general approach that relies on the (usually extensive) browsing facilities of a hypertext system. Language-specific browsers can be realized by generating filters to convert program text into hypertext documents. We demonstrate our filter approach specifically with the parallel language CSP and the α Trellis hypertext system. α Trellis employs the dual nature of Petri nets to express formally in one structure both the linked information elements of a document and the reader/document interactions during browsing. α Trellis is especially appropriate for parallel program browsing because Petri nets are a natural concurrency model, and because it offers state-space analysis for deadlocks and other program properties. α Trellis-based program browsers for other parallel languages can be produced by designing appropriate Petri net translations.

Implementation of a transputer-based flight controller

Increasingly, as flight-control laws become more complex and sample times shorten, implementation requirements are outstripping the capacity of general-purpose single-processor systems. This has prompted this investigation of the feasibility of using a parallel-processing transputer-based network, programmed in occam, for the implementation of an aircraft-flight-control algorithm. Although the problems of flight-control implementation motivated the study, the research findings have wider applicability. Three techniques to generate the concurrent realisation of a typical flight-control law are described and illustrated together with some indications of their strengths and weaknesses. On the basis of this preliminary study, one of these approaches is suggested as a practical way to tackle the problem. Software tools have been used and developed to automate the mapping of control laws onto transputerbased systems. These have proved to be effective and convenient aids, supporting real-time simulation and implementation.

Distributed finite element analysis using a transputer network

Relatively recent innovations in chip level processing architectures have resulted in a family of powerful, low cost devices, specifically designed for concurrent, parallel computation—the transputers. An innovative parallel software research effort is described which has resulted in an impressive demonstration of the low cost potential that distributed parallel algorithms and transputer networks offer specifically to finite element structural analysis—and by relatively direct extension to other compute intense engineering and scientific problems. The principal objective of the research was to demonstrate the cost effective acceleration of real world finite element structural analysis problems using a transputer-based parallel processing network. This objective was accomplished in the form of a parallel processing workstation. The resulting workstation is a desktop size, low maintenance computing unit capable of supercomputer performance at approximately two orders of magnitude lower cost. The demonstration capability implemented permits linear static structural analysis equivalent to commercially available NASTRAN. Finite element model files, using an on-line pre-processing module or external pre-processing packages, are downloaded to a network of 32 transputers for accelerated solution. The system currently executes at about one third CRAY X-MP24 speed but additional acceleration potential exists. Results are presented for a NASA selected demonstration problem of a space shuttle main engine turbine blade model with 1500 nodes and 4500 independent degrees of freedom. The NASA CRAY X-MP24 required 23.9 s to obtain the solution while the transputer network, operated from an IBM PC-AT host, required 71.7 s. Innovative parallel sparse solution techniques and supporting hardware configuration features are the principal topics discussed.

Computational chemistry with transputers: a direct SCF program

By using transputers it is possible to build up networks of parallel processors with varying topology. Due to the architecture of the processors it is appropriate to use the MIMD (multiple instruction multiple data) concept of parallel computing. The most suitable programming language is OCCAM. We investigate the use of transputer networks in computational chemistry, starting with the direct SCF method. The most time consuming step, the calculation of the two electron integrals is executed parallelly. Each node in the network calculates whole batches of integrals. The main program is written in OCCAM. For some large-scale arithmetic processes running on a single node, however, we used FORTRAN subroutines out of standard ab-initio programs to reduce the programming effort. Test calculations show, that the integral calculation step can be parallelized very efficiently. We observe a speed-up of almost 8 using eight network processors. Even in consideration of the scalar part of the SCF iteration, the speed-up is not less than 7.1.

The optic lobe of Drosophila melanogaster. I. A Golgi analysis of wild-type structure

Golgi studies of the neurons in the optic lobes of Drosophila melanogaster reveal a large number of neuronal cell types. These can be classified as either columnar or tangential. Columnar elements establish the retinotopic maps of the lamina, medulla, and lobula-complex neuropiles. They are classified according to the position of their cell bodies, the number, width, and level of their arborizations, and their projection areas. Tangential elements are oriented perpendicularly to the columns. The arborizations of different tangential neurons are restricted to different layers of the optic neuropiles, within such layers their dendritic fields may span the entire retinotopic field or only part of it. The abundance of cell types inside each of the columnar units of the optic lobe is discussed with regard to its possible functional significance. By means of their stratified arborizations the columnar neurons form what appear to be multiple sets of retinotopically organized parallel information processing networks. It is suggested that these parallel networks filter different kinds of visual information and thus represent structurally separated functional subunits of the optic lobe. Such a parallel organization of visual functions increases the sites for function-specific gene actions and may explain the behavioral phenotypes of recently isolated structural mutants of the optic lobe.

Adapting shuffle-exchange like parallel processing organizations to work as systolic arrays

In this paper, parallel algorithms for tree computations and linear recurrence systems of the form y i = a i y i−1 + b i are presented. The algorithms are designed to be executed on a network of parallel processors connected using the shuffle-exchange or cube-connected cycles patterns, where the number of processors is possibly much smaller than the size of the problem being solved. They are the result of illustrating that a graph representing the computation being performed can be restructured to match the given number of processors being employed and the pattern by which the processors are connected. By accepting inputs in a systolic fashion, the algorithms make efficient use of the resources of parallel time and number of processors. Their time performance is T = O( n/ P + log P) when P processors connected by the above mentioned networks are employed, which is the maximum possible speedup for P = O( n/log n). Thus, the shuffle-exchange and the cube-connected cycles parallel processing organizations can be adapted to work as general systolic systems for the solution of an important class of computational problems.

The de Bruijn multiprocessor network: a versatile parallel processing and sorting network for VLSI

It is shown that the binary de Bruijn multiprocessor network (BDM) can solve a wide variety of classes of problems. The BDM admits an N-node linear array, an N-node ring, (N-1)-node complete binary trees, ((3N/4)-2)-node tree machines, and an N-node one-step shuffle-exchange network, where N (=2/sup k/, k an integer) is the total number of nodes. The de Bruijn multiprocessor networks are proved to be fault-tolerant as well as extensible. A tight lower bound of the VLSI layout area of the BDM is derived; a procedure for an area-optimal VLSI layout is also described. It is demonstrated that the BDM is more versatile than the shuffle-exchange and the cube-connected cycles. Recent work has classified sorting architectures into (1) sequential input/sequential output, (2) parallel input/sequential output, (3) parallel input/parallel output, (4) sequential input/parallel output, and (5) hybrid input/hybrid output. It is demonstrated that the de Bruijn multiprocessor networks can sort data items in all of the abovementioned categories. No other network which can sort data items in all the categories is known.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Parallel running of a modular simulation scheme

The idea of modularity in simulation is discussed in relation to parallel processing. A mathematical model for parallel simulation is presented. In this model a possibly nonlinear set of consistency conditions is satisfied in between time steps. Two examples are given which are fundamental to HVAC simulation: (1) heat flow in networks of heat paths and thermal capacitors, and (2) inertialess flow of fluid in networks of pipes and other components. These examples present in abstract from many of the difficulties encountered in thermal simulation of buildings with heating and ventilating plants. The question of convergence of networks of parallel processes is discussed, convergence is proved for the two examples, and a general theorem which implies unconditional convergence is developed. This theorem applies in many cases in which the processes represent physical components, and each process resets some variables to attain local steady state with its neighbors, so the sum of the local distances from steady state is at least not increased by any process.

Preface to the Special Issue on Parallel Distributed Processing and Neural Networks

This and the next issue of Computer Music Journal are largely given over to music research of a nature that is difficult to classify but which can be labeled variously as parallel distributed processing, connectionism, and neural networks. While there are distinctions that can be drawn among these subjects, it is what they share in common-their promise for music research-that warrants attention here. These disciplines model cognitive phenomena using massively interconnected communications among a number of simple processing elements, called artificial neural networks. This approach is well suited to many problems in music, as will be made clear below and in the following articles.

Hierarchical poly tree computer architectures defined by computational multidisciplinary mechanics

This paper will develop an alternative computer architecture called the Poly Tree. Based on the requirements of computational mechanics and the concept of hierarchical substructuring, the paper will explore the development of problem-dependent parallel networks of processors which will enable significant, often superlinear, speed enhancements; provide a logical/efficient framework for linear/nonlinear and transient structural mechanics problems; and provide a logical framework from which to apply model reduction procedures. In addition, the paper will explore optimal processor arrangements which define the overall system granularity. Consideration will also be given to system I/O requirements.

The modified Kanerva model for automatic speech recognition

A parallel processing network derived from Kanerva's associative memory theory Kanerva 1984 is shown to be able to train rapidly on connected speech data and recognize further speech data with a label error rate of 0·68%. This modified Kanerva model can be trained substantially faster than other networks with comparable pattern discrimination properties. Kanerva presented his theory of a self-propagating search in 1984, and showed theoretically that large-scale versions of his model would have powerful pattern matching properties. This paper describes how the design for the modified Kanerva model is derived from Kanerva's original theory. Several designs are tested to discover which form may be implemented fastest while still maintaining versatile recognition performance. A method is developed to deal with the time varying nature of the speech signal by recognizing static patterns together with a fixed quantity of contextual information. In order to recognize speech features in different contexts it is necessary for a network to be able to model disjoint pattern classes. This type of modelling cannot be performed by a single layer of links. Network research was once held back by the inability of single-layer networks to solve this sort of problem, and the lack of a training algorithm for multi-layer networks. Rumelhart, Hinton & Williams 1985 provided one solution by demonstrating the “back propagation” training algorithm for multi-layer networks. A second alternative is used in the modified Kanerva model. A non-linear fixed transformation maps the pattern space into a space of higher dimensionality in which the speech features are linearly separable. A single-layer network may then be used to perform the recognition. The advantage of this solution over the other using multi-layer networks lies in the greater power and speed of the single-layer network training algorithm.

PAVE PACE: system avionics for the 21st century

The PAVE PACE Initiative has been established to validate system avionics concepts for advanced military aircraft. The author presents the rationale of why the advanced architecture established by the PAVE PILLAR program should be continued under PAVE PACE to achieve: practical and affordable airborne versions of modular parallel processing network architectures for many applications currently beyond real-time implementation, readily available avionics for use in all avionics and, greatly improved techniques to reduce the cost of software development and support. An approach to the overall design structure for future avionics is also presented that entails: the use of CAD (computer-aided design) tools to assist in the development of system, hardware and software requirements, the use of replicated hardware modules (some at the wafer level), the use of reuseable software modules and the use of CAD tools to tailor hardware/software modules for specific application requirements. Continued use of the PAVE PILLAR high-speed data bus and operating system is recommended as the means to integrate and control the data input and output of physically and functionally separate parallel networks.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Honeycomb optical-waveguide networks for parallel signal processing

A honeycomb waveguide network for parallel signal processing, consisting of single-mode symmetrical Y junctions, is proposed. In this waveguide network, input guided-wave amplitudes are divided and then combined with the amplitudes of the adjacent waveguides. It is shown that the operations of spatial filtering, such as smoothing, edge extraction, and edge enhancement, can be performed. An example of the honeycomb waveguide network is discussed.

Parallel processing, distributed systems and local area networks

This paper puts forward some of the principal approaches used to implement parallel architectures, and provides models illustrating these approaches.

A Real-Time Digital Simulation of Synchronous Machines: Stability Considerations and Implementation

The study of the transient behavior of a large power system has been difficult and time consuming even on mainframe computers. One way to obtain real-time studies is to configure digital simulation modules in a parallel processing network that corresponds to the physical system. The focus of this work is on the creation of a generator module that is compatible with such a digital simulation network. To approach operation in real time, a fast and accurate state equation integrator is required. Investigation has revealed that the load imposed on the simulated generator plays a major role in the stability of the integration routines. The linearized stability limits of forward difference, modified Euler, fourth-order Runge-Kutta and Adams-Bashforth-Moulton integration methods were calculated for an impedance terminated generator. These were found to agree closely with the corresponding experimentally determined nonlinear limits. The TMS32010 digital signal processor was chosen as the heart of the generator simulator module, and fixed-point arithmetic routines were developed to make it a high-speed state equation integrator. Operation in real time was achieved for an infinite bus-type termination, but an impedance load led to a somewhat slower simulation.

Guest Editor's Introduction Interconnection Networks for Parallel and Distributed Processing

Presents the guest editorial for this issue of the publication.