Parallel Loops Research Articles

CFD investigation of maldistribution in a full-loop circulating fluidized bed with double parallel cyclones

In this work, the characteristics of the maldistribution phenomenon in a symmetrical dual-side refeed circulating fluidized bed is numerically studied. The influence of maldistribution on the performance of different sections is discussed. The results show that the maldistribution lowers the total performance of parallel cyclones and the L-valve has a self-balancing to lower the degree of maldistribution. Moreover, the effects of gas inlet velocity, total solid inventory and wall function on the degree of maldistribution are explored. The simulation results confirm that the maldistribution can be captured in the system. The degree of the maldistribution in parallel external loops decreases with the increase of gas inlet velocity and total solid inventory; however, it is not sensitive to the wall roughness. This work provides insight of the cause of gas-solid maldistribution and the influence of different operation conditions on the degree of maldistribution.

A fast three-phase synchronization technique with parallel structure

For many grid-connected equipment, the phase and frequency of grid voltage are crucial synchronization information. A phase-locked loop (PLL) is usually employed to obtain the information. In distorted grid, adding additional filter is a convenient and effective approach to enhance the harmonic rejection capability of the PLL. Most filters cannot simultaneously block the inter-harmonics, sub-harmonics and other order harmonics. Adaptive notch filter (ANF) can accomplish such task, since multiple ANFs can be flexibly cascaded. Generally, ANFs works as an in-loop filter in a PLL. When the notch frequency of an ANF is very low or multiple ANFs are cascaded in the control loop, the slowing down of the PLL response speed may be unacceptable in some applications. To deal with this problem, this paper proposes a parallel structure for the ANF-PLL to improve the response speed. In the proposed structure, a group of ANFs are placed in a front-stage synchronous reference frame and work as a prefilter, and a conventional ANF-PLL is used as a parallel frequency feedback loop (FFL). The effectiveness of this technique is verified through experimental results.

Parallel fast and slow recurrent cortical processing mediates target and distractor selection in visual search

Visual search has been commonly used to study the neural correlates of attentional allocation in space. Recent electrophysiological research has disentangled distractor processing from target processing, showing that these mechanisms appear to operate in parallel and show electric fields of opposite polarity. Nevertheless, the localization and exact nature of this activity is unknown. Here, using MEG in humans, we provide a spatiotemporal characterization of target and distractor processing in visual cortex. We demonstrate that source activity underlying target- and distractor-processing propagates in parallel as fast and slow sweep from higher to lower hierarchical levels in visual cortex. Importantly, the fast propagating target-related source activity bypasses intermediate levels to go directly to V1, and this V1 activity correlates with behavioral performance. These findings suggest that reentrant processing is important for both selection and attenuation of stimuli, and such processing operates in parallel feedback loops.

Alternating directions parallel hybrid memory iGRM direct solver for non-stationary simulations

The three-dimensional isogeometric analysis (IGA-FEM) is a modern method for simulation. The idea is to utilize B-splines or NURBS basis functions for both computational domain descriptions and the engineering computations. Refined isogeometric analysis (rIGA) employs a mixture of patches of elements with B-spline basis functions, and $C^0$ separators between them. It enables a reduction of the computational cost of direct solvers. Both IGA and rIGA come with challenging sparse matrix structure, that is expensive to generate. In this paper, we show a hybrid parallelization method to reduce the computational cost of the integration phase using hybrid-memory parallel machines. The two-level parallelization includes the partitioning of the computational mesh into sub-domains on the first level (MPI), and loop parallelization on the second level (OpenMP). We show that hybrid parallelization of the integration reduces the contribution of this phase significantly. Thus, alternative algorithms for fast isogeometric integration are not necessary.

Fault-Tolerant Control of Coil Inter-Turn Short-Circuit in Five-Phase Permanent Magnet Synchronous Motor

In the five-phase permanent magnet synchronous motor (PMSM) control system, the torque ripple caused by coil inter-turn short-circuit (ITSC)fault will make the motor performance worse. Due to the existence of the short-circuit current in the faulty phase and the third harmonic component in the permanent magnet flux linkage, the electromagnetic torque will contain even-order ripple components when the faulty phase is removed. Torque ripple also cause speed ripple. In this paper, the repetitive controller (RC) is used to perform proportional gain compensation for speed ripple. By designing the RC and connecting RC and proportional integral (PI) controller in parallel for the speed loop, the torque ripple amplitude can be reduced. It can be seen from the simulation and experimental results that the torque ripple suppression strategy based on RC can effectively suppress the torque ripple under ITSC fault.

Anomaly Detection in Discrete Manufacturing Systems by Pattern Relation Table Approaches.

Anomaly detection for discrete manufacturing systems is important in intelligent manufacturing. In this paper, we address the problem of anomaly detection for the discrete manufacturing systems with complicated processes, including parallel processes, loop processes, and/or parallel with nested loop sub-processes. Such systems can generate a series of discrete event data during normal operations. Existing methods that deal with the discrete sequence data may not be efficient for the discrete manufacturing systems or methods that are dealing with manufacturing systems only focus on some specific systems. In this paper, we take the middle way and seek to propose an efficient algorithm by applying only the system structure information. Motivated by the system structure information that the loop processes may result in repeated events, we propose two algorithms—centralized pattern relation table algorithm and parallel pattern relation table algorithm—to build one or multiple relation tables between loop pattern elements and individual events. The effectiveness of the proposed algorithms is tested by two artificial data sets that are generated by Timed Petri Nets. The experimental results show that the proposed algorithms can achieve higher AUC and F1-score, even with smaller sized data set compared to the other algorithms and that the parallel algorithm achieves the highest performance with the smallest data set.

Simultaneous polydirectional transport of colloidal bipeds

Detailed control over the motion of colloidal particles is relevant in many applications in colloidal science such as lab-on-a-chip devices. Here, we use an external magnetic field to assemble paramagnetic colloidal spheres into colloidal rods of several lengths. The rods reside above a square magnetic pattern and are transported via modulation of the direction of the external magnetic field. The rods behave like bipeds walking above the pattern. Depending on their length, the bipeds perform topologically distinct classes of protected walks. We design parallel polydirectional modulation loops of the external field that command up to six classes of bipeds to walk on distinct predesigned paths. Using such loops, we induce the collision of reactant bipeds, their polymerization addition reaction to larger bipeds, the separation of product bipeds from the educts, the sorting of different product bipeds, and also the parallel writing of a word consisting of several letters. Our ideas and methodology might be transferred to other systems for which topological protection is at work.

Robust control and optimized parallel control double loop design for mobile robot

Robots have been used in many applications in the past few decades. Moreover, due to high nonlinearity behavior of these systems, an optimal and robust control design approaches have been considered to stabilize and improve their performance and robustness. The uncertainties of the time delay on the output states of the mobile robot system have a significant influence on the system nominal performance. As a result, the work becomes here to address the influence of these uncertainties on the robot system performance. In order to achieve this objective, the nonlinear controller via sliding mode control (SMC) is designed by selecting a suitable sliding surface dynamics in which the considered robot displacement and tilt angle are sliding on. The lyapunov function is considered here to accomplish the design of the sliding control signals for robot stabilization. Furthermore, the stability of the considered system is guaranteed due to convergence of the lyapunov functions into zero when the state trajectories tend to desired set points. In addition, we consider the trajectory tracking and stabilization of TWBMR system using parallel double loop PID controllers whose controllers gains are tuning via linear quadratic regulator (LQR) approach. Finally, to demonstrate the effectiveness of SMC and PID-LQR design methods, the comparison is carried out when the nominal and uncertain conditions.

Автоматизоване проектування та розпаралелювання програм для гетерогенних платформ із використанням алгебро-алгоритмічного інструментарію

Methods and software tools for automated design and generation of OpenCL programs based on the algebra of algorithms are proposed. OpenCL is a framework for developing parallel software that executes across heterogeneous platforms consisting of general-purpose processors and/or hardware accelerators. The proposed approach consists in using high-level algebra-algorithmic specifications of programs represented in natural linguistic form and rewriting rules. The developed software tools provide the automated design of algorithm schemes based on a superposition of Glushkov algebra constructs that are considered as reusable components. The tools automatically generate code in a target programming language on the basis of the specifications. In most computing problems, a large part of hardware resources is utilized by computations inside loops, therefore the use of automatic parallelization of cyclic operators is most efficient for them. However, the existing automatic code parallelizing tools, such as Par4All, don’t account the limited amount of accelerator’s onboard memory space while real-life problems demand huge amounts of data to be processed. Thus, there is a need for the development of a parallelization technique embracing the cases of massive computational tasks involving big data. In the paper, a method and a software tool for semi-automatic parallelization of cyclic operators based on loop tiling and data serialization are developed. The parallelization technique uses rewriting rules system to transform programs. The framework for parallelization of loops for optimization of computations using graphics processing units allows semi-automatic parallelization of sequential programs. The approach is illustrated on an example of developing a parallel OpenCL image convolution program.

Parallel Mechanisms with Group Kinematic Decoupling Ensured by Multiloop Power Transmission in Kinematic Chains

Parallel manipulation mechanisms are multiloop systems in which the parallel arrangement of the kinematic chains allows for the load capacity to be increased, the size and weight of every component to be reduced, and the movable links to be relieved of the gravity force of the actuators by locating them on a fixed base. In this article, the synthesis of a new parallel mechanism with an increased number of parallel loops for transmitting the power from the actuators to the output link is considered. A workspace has been constructed for the mock-up of the mechanism developed equipped with actuators of the translational and rotational movements of the output link. Dynamic analysis of the parallel mechanism with three kinematic chains has been performed considering the weights of the intermediate links.

AceMesh: a structured data driven programming language for high performance computing

Asynchronous task-based programming models are gaining popularity to address the programmability and performance challenges of contemporary large scale high performance computing systems. In this paper we present AceMesh, a task-based, data-driven language extension targeting legacy MPI applications. Its language features include data-centric parallelizing template, aggregated task dependence for parallel loops. These features not only relieve the programmer from tedious refactoring details but also provide possibility for structured execution of complex task graphs, data locality exploitation upon data tile templates, and reducing system complexity incurred by complex array sections. We present the prototype implementation, including task shifting, data management and communication-related analysis and transformations. The language extension is evaluated on two supercomputing platforms. We compare the performance of AceMesh with existing programming models, and the results show that NPB/MG achieves at most 1.2X and 1.85X speedups on TaihuLight and TH-2, respectively, and the Tend_lin benchmark attains more than 2X speedup on average and attain at most 3.0X and 2.2X speedups on the two platforms, respectively.

AFCL: An Abstract Function Choreography Language for serverless workflow specification

Serverless workflow applications or function choreographies (FCs), which connect serverless functions by data- and control-flow, have gained considerable momentum recently to create more sophisticated applications as part of Function-as-a-Service (FaaS) platforms. Initial experimental analysis of the current support for FCs uncovered important weaknesses, including provider lock-in, and limited support for important data-flow and control-flow constructs. To overcome some of these weaknesses, we introduce the Abstract Function Choreography Language (AFCL) for describing FCs at a high-level of abstraction, which abstracts the function implementations from the developer. AFCL is a YAML-based language that supports a rich set of constructs to express advanced control-flow (e.g. parallelFor loops, parallel sections, dynamic loop iterations counts) and data-flow (e.g multiple input and output parameters of functions, DAG-based data-flow). We introduce data collections which can be distributed to loop iterations and parallel sections that may substantially reduce the delays for function invocations due to reduced data transfers between functions. We also support asynchronous functions to avoid delays due to blocking functions. AFCL supports properties (e.g. expected size of function input data) and constraints (e.g. minimize execution time) for the user to optionally provide hints about the behavior of functions and FCs and to control the optimization by the underlying execution environment. We implemented a prototype AFCL environment that supports AFCL as input language with multiple backends (AWS Lambda and IBM Cloud Functions) thus avoiding provider lock-in which is a common problem in serverless computing. We created two realistic FCs from two different domains and encoded them with AWS Step Functions, IBM Composer and AFCL. Experimental results demonstrate that our current implementation of the AFCL environment substantially outperforms AWS Step Functions and IBM Composer in terms of development effort, economic costs, and makespan.

Performance optimization for parallel systems with shared DWM via retiming, loop scheduling, and data placement

Abstract Domain Wall Memory (DWM) as an ideal candidate for replacing traditional memories especially in parallel systems, has many desirable characteristics such as low leakage power, high density and low access latency. However, due to the tape-like architecture of DWM, shift operations have vital impact on performance. Considering data-intensive applications with massive loops and arrays, increasing parallelism of loops, appropriate loop scheduling and data placement on DWM will significantly improve the performance of parallel systems. This paper explores optimizing performance of parallel systems through retiming, loop scheduling and data placement especially when the data are arrays. It proposes Integer Linear Programming (ILP) formulation and Scheduling While Placing (SWP) algorithm to generate optimal or nearly optimal loop scheduling and data placement with minimum execution time. The experimental results show that SWP and ILP can effectively reduce execution time when compared with greedy List Scheduling First Access First Place (LF) algorithm. Besides, this paper proposes Threshold Retiming Repetition (TRR) algorithm to combine retiming technique with SWP or ILP to improve performance. The experimental results show that SWP+TRR and ILP+TRR can further reduce the execution time when compared to results without retiming.

Experimental analysis of four parallel single-phase natural circulation loops with small inner diameter

In this paper, results from a new experimental setup consisting of four rectangular natural circulation loops are presented. The loops are vertically oriented, parallel and connected at the bottom; each one has an independent heat source of variable power and a common heat sink, and are studied under different configurations with varying parameters. The loops are symmetrical with 7 mm inner diameter, using distilled water as the working fluid transporting heat from the source to the heat sink by means of natural circulation. The experimental data are compared with the Vijayan’s correlation showing a good agreement.

PFACC: An OpenACC‐like programming model for irregular nested parallelism

SummaryOpenACC is a directive‐based programming model which allows programmers to write graphic processing unit (GPU) programs by simply annotating parallel loops. However, OpenACC has poor support for irregular nested parallel loops, which are natural choices to express nested parallelism. We propose PFACC, a programming model similar to OpenACC. PFACC directives can be used to annotate parallel loops and to guide data movement between different levels of memory hierarchy. Parallel loops can be arbitrarily nested or be placed inside functions that would be (possibly recursively) called in other parallel loops. The PFACC translator translates C programs with PFACC directives into CUDA programs by inserting runtime iteration‐sharing and memory allocation routines. The PFACC runtime iteration‐sharing routine is a two‐level mechanism. Thread blocks dynamically organize loop iterations into batches and execute the batches in a depth‐first order. Different thread blocks share iterations among one another with an iteration‐stealing mechanism. PFACC generates CUDA programs with reasonable memory usage because of the depth‐first execution order. The two‐level iteration‐sharing mechanism is implemented purely in software and fits well with the CUDA thread hierarchy. Experiments show that PFACC outperforms CUDA dynamic parallelism in terms of performance and code size on most benchmarks.

Single crystal martensitic phase of structural properties-related magnetic behaviour of FeCrNi thin films: in-plane magnetic anisotropy under different substrate rotation speeds

Ternary FeCrNi thin films were sputtered on polyimide substrates from the source (austenitic AISI 304 stainless steel) under the substrate rotation speeds of 0, 15, 30 and 45 rpm, respectively. The films with 50 nm thickness were sputtered at 0.9 nm/s. To the elemental measurements, while the Fe content slightly varied, Ni increased and Cr content decreased as the rotation speed increased. And, all films have a single crystal of (110) peak at the angle of 2θ ≈ 44.7° which is body-centred tetragonal (bct) martensitic α′-phase. Also, the peak intensity of (110) slightly varied as a result of changes of FeCrNi martensitic alloy contents in the films. Moreover, increasing substrate rotation speed resulted in a decrease in grain size. The morphologic analysis by a scanning electron microscope and an atomic force microscopy displayed a more homogenous structure and the decrease of film roughness parameters with increasing of rotation speed, respectively. For magnetic measurements, the saturation magnetisation, Ms increased from 995 to 1172 emu/cm3 and the coercivity, Hc decreased from 88 to 52 Oe with the increase of rotation speed. In the films, the increases of the martensitic structure formations and the decrease of the grain size were observed to have probably caused the increase of the MS values and the decrease of the HC values, respectively. As observed from the XRD results, ferromagnetic behaviour of the films may be due to the martensitic phase since austenitic phase has a weak paramagnetic behaviour as a source material at room temperature. From the parallel and perpendicular hysteresis loops, the films can also be obtained to have uniaxial in-plane anisotropy with increasing rotation speed. It is seen that the film properties can be easily varied by changing rotation speed for potentially new device applications such as spintronics, magnetic hetero-structures, magnetic separators, etc. on flexible substrates.

A comparative study of high-productivity high-performance programming languages for parallel metaheuristics

Parallel metaheuristics require programming languages that provide both, high performance and a high level of programmability. This paper aims at providing a useful data point to help practitioners gauge the difficult question of whether to invest time and effort into learning and using a new programming language. To accomplish this objective, three productivity-aware languages (Chapel, Julia, and Python) are compared in terms of performance, scalability and productivity. To the best of our knowledge, this is the first time such a comparison is performed in the context of parallel metaheuristics. As a test-case, we implement two parallel metaheuristics in three languages for solving the 3D Quadratic Assignment Problem (Q3AP), using thread-based parallelism on a multi-core shared-memory computer. We also evaluate and compare the performance of the three languages for a parallel fitness evaluation loop, using four different test-functions with different computational characteristics. Besides providing a comparative study, we give feedback on the implementation and parallelization process in each language.

Design and online calibration methods of pressure-independent intelligent regulating valve based on hydrodynamic resistance characteristics

In the district heating system, hydraulic maladjustment led to uneven heating and severe energy consumption. The existing valves cannot be accurately adjusted in the pipe networks and the complex structures of some valves weaken the energy-saving potential, failing to meet the demand of smart heating development. Considering these problems, the hydrodynamic resistance characteristics of regulating valves are studied, and the design and online calibration methods of the pressure-independent intelligent valve based on it are proposed. Among them, a) A hybrid optimization algorithm combining the particle swarm optimization algorithm and Elman neural network trained by Levenberg-Marquardt algorithm in identifying hydrodynamic resistance characteristics of regulating valves quickly and accurately with the least amount of experimental data is studied. b) For valves of the same type with different sizes, similitude principle provides a theoretical basis in expanding hydrodynamic resistance characteristics. c) An online calibration method of the pressure-independent intelligent regulating valve applied in the heating system based on the principles of room temperature prediction and mass conservation is proposed which avoids the inconvenience of field calibration. The pressure-independent intelligent regulating valve is worth researching and developing which provides a novel idea for decoupling the hydraulic conditions in parallel loops and reducing energy consumption.

Impedance-Based Fault Location Algorithm for Double-Circuit Transmission Lines Using Single-End Data

Locating a fault in double-circuit transmission lines is a challenging task due to the mutual coupling effects between adjacent circuits of the line. Also, performance of impedance-based fault location schemes for double-circuit lines is adversely affected by fault resistance. Accurate fault location in double-circuit lines can be achieved if fault location schemes utilize reliable communication links. However, the communication links are not available or enabled in all transmission lines. To overcome such difficulty in fault location in double-circuit lines, a new fault location scheme is proposed for double-circuit transmission lines by using voltages and currents data extracted from single-end of the line. Only the negative-sequence current and voltage phasors during the fault are processed for calculating the fault location. The proposed fault location formula is derived by applying the Kirchhoff’s voltage law around the parallel circuits and shunt capacitances loops. Obtained formula is applicable for all types of unbalanced faults and accordingly classification of fault types and phase selection are not required. The proposed scheme is immune to the fault resistance and insensitive to mutual coupling effects. Evaluation results verify that the accuracy of the proposed algorithm is very high under various fault resistances, fault locations, and fault types.

Experimental analysis on the loop heat pipes with different microchannel evaporators

Thoroughly understanding the influence of evaporator design on the characteristics of loop heat pipes (LHPs) is of great significance to develop optimal microchannel structures for high-power microprocessors. In the current work, the parallel microchannel loop heat pipe (PMLHP) and the self-similar fractal microchannel loop heat pipe (SFMLHP) were designed, fabricated and experimentally analyzed from the aspects of filling ratio and inclined angle, and then the heat transfer performances were compared with the dendritic bionic microchannel loop heat pipe (DBMLHP) under the same experimental conditions. The results show that PMLHP had four operation phenomena similar to DBMLHP while SFMLHP only had two operation phenomena. The start-up performances of PMLHP and SFMLHP were the best when the inclined angle was 90°. When the inclined angle was fixed at 90°, the optimal filling ratios for PMLHP and SFMLHP to yield the optimal thermal resistance were rather different. Through comparative analysis, it can be concluded that the overall heat transfer characteristic of DBMLHP was the best of the three under specified conditions. However, the average temperature fluctuation range in DBMLHP evaporator was the largest in the stable operation. The results provide valuable guidance on the choice of better and more suitable evaporator structure for microchannel loop heat pipes.