Parallel Capacitor Research Articles

Thermosensitive double-membrane neurons and their network dynamics

Abstract Cell membrane of biological neurons has distinct geometric structure, and involvement of diffusive term is suitable to estimate the spatial effect of cell membrane on neural activities. The gradient field diversity between two sides of the cell membrane can be approached by using a double-layer membrane model for the neuron. Therefore, two capacitive variables and diffusive terms are used to investigate the neural activities of cell membrane, and the local kinetics is described by a functional circuit composed of two capacitors. The voltages for the two parallel capacitors describe the inner and outer membrane potentials, and the diffusive effect of ions is considered on the membrane surface. The results reveal that neural activities are relative to the capacitance ratio between the inside and outside of the membrane and diffusive coefficient. High-energy periodic external stimulation induces the target waves to spread uniformly, while low-energy chaotic stimulation results in wave fragmentation. Furthermore, when the capacitance ratio exhibits exponential growth under an adaptive control law, the resulting energy gradient within the network induces stable target waves. That is, energy distribution affects the wave propagation and pattern formation in the neuron. The result indicates that the spatial diffusive effect and capacitance diversity between outer and inner cell membranes are important for selection of firing patterns and signal processing during neural activities. This model is more suitable to estimate neural activities than using generic oscillator-like or map neurons without considering the spatial diffusive effect.

VCII‐Based Immittance Simulators: Generalized Parallel Configurations

ABSTRACTIn this paper, four new generalized configurations of grounded parallel‐type immittance simulators are proposed. These circuits implement parallel resistor–inductor (RL), parallel resistor–capacitor (RC), parallel capacitor–frequency‐dependent negative resistance (CD), and capacitance multiplier configurations utilizing only two second‐generation voltage conveyors (VCII±) as active elements along with three impedances, without the need for specific matching conditions. The applicability of the proposed parallel RL and capacitance multiplier configurations as a second‐order high‐pass filter (HPF) and a first‐order low‐pass filter (LPF), respectively, is also demonstrated. These applications illustrate the versatility and utility of the proposed structures. Frequency, transient, and Monte Carlo analysis utilizing the CMOS VCII± in the SPICE simulation tool have also been performed to validate the feasibility of the presented circuits. Further validation is carried out through layout design in Cadence Virtuoso, employing 0.18‐μm CMOS technology. Both presimulation and postsimulation results are presented for a thorough assessment of the proposed circuits. Also, the claimed theory is verified by experimental results based on the VCII implementation with commercially available IC AD844.

A study on GaN-based high-efficiency class E power amplifier circuits at medium-low frequencies

Abstract In this paper, a high-power amplifier is designed to address the challenges of low transmission power and poor efficiency in wireless energy transmission technology at low frequencies. The design is based on a class E power amplifier circuit. The theoretical analysis is conducted to determine transistor selection and the static DC operating point. Load traction technology is employed to match the load impedance of the power amplifier, ensuring highly efficient and unified power additional efficiency, and output power. To enhance system stability and feedback compensation, gate series resistance and parallel capacitors are incorporated. Simulation results demonstrate that the designed power amplifier achieves an output power of 48 dBm with a power additive efficiency (PAE) of 85%. Furthermore, the third-order intermodulation component reaches 70 dBm, indicating concentrated output energy and high linearity in the amplifier system. Experimental results validate the consistency between theoretical analysis and model simulation, confirming the stability of the designed power amplifier circuit, and successfully achieving energy-efficient, high-power transmission.

A Wide Range Zero‐Voltage Switching Phase‐Shifted Full‐Bridge Converter With No Duty Cycle Loss and Low Rectifier Oscillation

ABSTRACTThe phase‐shifted full‐bridge (PSFB) converter has been widely used in DC/DC converters due to its soft‐switching characteristics. However, it still has many drawbacks. In order to solve the shortcomings of the PSFB converter, such as limited soft‐switching range, high loss of duty cycle, and high oscillating voltage of the secondary rectifier, a PSFB converter based on parallel variable inductor and series blocking capacitor is proposed in this study. A wide range of soft switching, low rectifier oscillation voltage, and no duty cycle loss can be realized by the auxiliary current‐controlled variable inductor and reasonable blocking capacitor design. In this study, the mechanism of soft switching and suppression of oscillation is discussed and some of the designs are given. Finally, the experimental results of a 200 W/50 kHz prototype are constructed in the laboratory to verify the feasibility and effectiveness of the proposed converter.

Accuracy improvement of resonant sensor by an additional electrode in the measurement of liquid density and viscosity

Purpose In the measurement of liquid density and viscosity, the change of resonance parameters due to the parasitic parallel capacitance of resonator affects the measurement accuracy. To improve the accuracy, a method was proposed to compensate the parasitic parallel capacitance of resonator by adding an electrode. Design/methodology/approach The new electrode (compensation electrode) was added into resonant sensor to make compensation capacitance. The closer the compensation capacitance was to the parasitic parallel capacitance, the better compensation was. The structural parameters of resonant sensor with the compensation electrode were determined by the simulation and experiment. Findings The effect of this method was examined by the experiment. The relative errors of density and viscosity were less than 0.15, 0.5 % and standard deviations were less than 0.0004 g/cm3 and 0.005 mPas, respectively. Practical implications The experimental results show that this method is valuable for the parasitic parallel capacitance compensation of immersed resonant sensor. Originality/value This paper has not been published in other journals.

Convolution of Analyte-Electrode Interactions over Distinct Time-Scales Leading to Taste Discrimination in Single Response Electroplated Metal Microwires-Based Microfluidic Electronic Tongue

A microfluidic electronic tongue (MET) is demonstrated via analyzing a single equivalent admittance spectrum derived from stainless-steel microwires electroplated with copper, nickel, iron, and zinc, all interconnected in parallel. These microwires were integrated into a microfluidic chip composed of polydimethylsiloxane (PDMS). A single admittance response for taste analytes, passing through micro-channels, was measured by short-circuiting the ends of multi-wire MET chip. The resulting admittance response from the MET was processed via principal component analysis (PCA) for visualization of clustering according to the taste groups. The performance of MET was assessed in terms of cluster analysis and Silhouette coefficient (SC).This analytical method effectively clusters four primary taste samples based on their distinct flavor profiles, showcasing notable differentiation with a Silhouette coefficient surpassing 0.71. The elucidation provided by the biplot reveals that electronic and ionic interaction at analyte-electrode interactions over distinct time scales contribute synergistically towards discrimination of taste in dimensionally reduced 2-D PCA space. Real admittance responses at lower and higher frequency range contribute majorly in the composition of first and second principal components respectively. The equivalent electric circuit (EEC) was fitted to the developed MET to gain better understanding of response mechanism. A capacitor (C) in parallel to a series combination of resistor (R) and inductor (L), is (C[RL]) kind of EEC fitted to the admittance spectra. Interestingly, when relying on fitted equivalent electric circuit data, the taste discriminability of the MET is notably diminished as not all EEC elements are able to capture signature response specific to each taste. This observation critically evaluates the strategy of suitable data selection towards accurate and efficient taste discrimination as the admittance response over complete frequency range are pivotal contributors to the MET's impressive taste discrimination capabilities.A pivotal aspect of the MET's functionality lies in deploying a single admittance response, a convolution of the responses of multiwire configurations integrated into the MET. This approach ensures global selectivity by utilizing copper, nickel, iron, and zinc electrodeposited stainless-steel microwires. These functionalization-free sensing units exhibit the ability to discriminate sweet, sour, bitter, and salty taste groups with remarkable clarity, boasting a Silhouette coefficient value of 0.77.The MET's adaptability is further underscored by its electroplating modification, which is both expandable and enables clean room-free fabrication methods. This capability paves the way for the widespread manufacturing of MET chips featuring readily interchangeable and reusable calibration-free electrodes.Looking ahead, the MET holds promise for future applications in quality control, particularly in the assessment of real food and beverage samples such as milk and soft drinks. The efficiency demonstrated in discriminating between tastes suggests that the MET could offer a cost-efficient and simplified solution for taste and quality assessments across diverse commercial applications. This potential extends to scenarios where clean room facilities are not readily available.In summary, the MET's unique approach, utilizing a single equivalent admittance spectrum from electroplated metal wires in a microfluidic context, showcases robust taste discrimination capabilities. Integrating PDMS microfluidic chips and employing principal component analysis add layers of sophistication to the methodology. The MET's global selectivity, functionalization-free sensing units, and adaptability in manufacturing advocate its potential for revolutionizing taste and quality assessment in various industries, providing a glimpse into a future where simplicity and cost-efficiency are paramount considerations in analytical methodologies.

Semi-cylindrical and cylindrical cross-capacitive sensors for micro-droplet detection

In drug delivery systems, the demand for precise microdroplet detection has prompted the utilization of flexible capacitive sensors. Traditional capacitive sensor structures, including coplanar electrodes and parallel plate capacitance, exhibit inherent geometric properties that significantly impact accuracy, sensitivity, and stability. This study explores the semi-cylindrical and cylindrical cross-capacitance sensor designs to enhance these performance metrics for microdroplet detection applications. This research work encompasses the development, analysis, simulation studies, fabrication process, and experimental investigations of these sensor designs. It was observed that they demonstrate notable changes in capacitance values for variations in the volume of liquid droplets, alterations in the relative permittivity of liquid samples, and the change in the velocity of free-flying liquid. The sensor structures are systematically examined across a range of liquid droplet sizes and liquids with varying dielectric constants. The response of the semi-cylindrical capacitive sensor proves to be accurate, significant, and fast, yielding high repeatability of ±0.032% and an impressive sensitivity of 0.7409 fF/μL. These findings position the presented sensor as an ideal candidate for microdroplet detection in drug delivery applications, which showcases its suitability for medical field.

A simple miniaturized sub‐6‐GHz bandpass filter with wide upper stopband in gallium arsenide‐based integrated passive device process

AbstractA very compact three‐pole bandpass filter with wide upper stopband is proposed and implemented by gallium arsenide integrated passive device technology. By organizing inductor and capacitor in parallel with an LC series network, a dual‐frequency bandstop structure is constructed in the first step to achieve transmission zeros (TZs). Then, the lowpass capacitor network and highpass inductor network are wisely cascaded with the bandstop structure, thus to the realization of three‐pole bandpass filter with a wide upper stopband. Based on the even‐/odd‐mode analysis, theoretical equations for the in‐band resonances and out‐of‐band TZs are given. Then, one filter prototype centered at 4.4 GHz with 3‐dB fractional bandwidth of 45.5% is designed, fabricated, and measured. Both simulated and measured results indicate that the proposed filter exhibits a wide stopband rejection of 25 dB from 6.4 to 22.8 GHz as well as a very compact size about 0.026λg × 0.031λg.

A 46% PAE, 2.4-GHz Two-Stage Class E Power Amplifier Utilizing CMOS 0.13-µm Technology

A wireless device with a long battery life and great sensitivity becomes difficult to develop since there is a huge demand for low-power, low-cost wireless gadgets. The power amplifier (PA) is the most crucial part of radio frequency (RF) transceivers because of its massive power consumption. Consequently, in order to minimize power loss, a very effective and low-power consumption PA is needed. In this paper, high efficiency two-stage CMOS PA designed in 0.13-μm process for 2.4 GHz IoT transmitter applications is presented. The driver stage and power stage are the two stages that make up the two-stage topology of the proposed CMOS PA. To attain high efficiency and great power gain, a class E PA is used at the power stage. The LC matching network at the output is used for harmonic rejection filter at 2.4 GHz with an additional parallel capacitor helps for better harmonic rejection. In addition, a layout has been successfully designed and optimized. All the components in the proposed PA are designed on-chip. The pre-layout and post-layout simulations have been conducted to verify the proposed PA's performance. The pre-layout simulation of the proposed PA can deliver 19.19 dBm output power and 45.2% PAE at 2.0 V power supply into a 50-Ω load. On the other hand, the proposed PA produced an output power of 17.33 dBm and 46% PAE, according to the results of the post-layout simulation with a similar power supply of 2.0 V. The chip area for the proposed layout design is 1.05 mm2.

Modeling Charging Current Dynamics at Microelectrodes and their Interfaces with Electrolyte and Insulators with a Focus on Microfabricated Gold Microband Electrodes on an SU-8 Substrate

The suitability of electrochemical methods for quantitative measurements at microdevices is influenced by the relatively large electrode-insulator interface-to-electrode area ratio, greatly impacting charging dynamics due to interactions among electrolyte, conductor material, and insulator layers. The resulting charging current can overwhelm the faradaic current from redox chemistry. The device studied here features a 70 μm × 100 μm electroactive window, hosts gold coplanar microband electrodes, and is insulated by SU-8, which serves as both overlayer and substrate. The overlayer defines the electroactive length and isolates the leads of the electrodes from the sample solution. Cyclic voltammetry in 0.10 M KCl yields an unexpected, nonlinear dependence of current on scan rate, which can be explained with two empirical approaches. The first employs an equivalent circuit model, involving leakage resistance and double-layer capacitance in parallel, to address both background processes and electrode imperfections as a function of scan rate. The second associates the enhanced current to a changing-chargeable area resulting from interface irregularities. Prior publications on alternative conductor-insulator materials are benchmarked in this study. The comparison of the materials shows that the charging dynamics for devices made with SU-8 lead to more favorable electrochemical performance than for those constructed with glass, epoxy, and silicon nitride, and under certain circumstances, polyimide.

Optimization Design of Temperature Field Distribution for AC High Voltage Parallel Capacitors

Abstract With the change in the overall harmonic working background of the system, the harmonic current spectrum borne by high-voltage AC shunt capacitors becomes increasingly complex, particularly with a gradual increase in high-frequency harmonic content. The wide frequency band, large value range, and long duration of harmonic current lead to increased heating of the capacitor. In this paper, a thermal field physical model is established for an AC parallel filter capacitor based on the skin effect, and trends are analysed in the current distribution of the capacitor plate under the skin effect. Furthermore, based on this established model, it is analysed how harmonic order and capacitor placement mode affect temperature field distribution within the capacitor, and it is concluded that these factors impact temperature rise release. This research lays a theoretical foundation for designing capacitor unit structures.

Study of equivalent circuit of GaN based laser chip and packaged laser.

High-speed GaN-based lasers play a pivotal role in visible light communication (VLC) systems; however, the causes of the limited modulation response of our fabricated laser diode (LD) are not fully understood. Accordingly, we constructed an equivalent circuit model for both the LD and its packaging. This model enabled us to analyze the series resistance and parallel capacitance of the LD at different injection currents. Experiments and simulations were performed to investigate the intrinsic responses of the LD. The series resistance and parallel capacitance are responsible for S21 roll-off at low frequencies. Determination of the packaging design parameters on the modulation response of a transistor outline (TO)-can packaged LD was investigated which is important to achieve the impedance match in the future. The value of each discrete component was determined by fitting the scattering parameters of the equivalent circuit model to the packaged LD. Reducing the series resistance and parallel capacitance improved the modulation response. Our study firstly illustrates the design and manufacture of violet-blue-green laser transmitters with a large modulation bandwidth for ultra-high-speed VLC from the point of the impedance influence.

A super-compact wideband bandpass filter using capacitor-loaded coupled lines

Abstract A wideband bandpass filter (BPF) using capacitor-loaded coupled lines is proposed with super-compact circuit size and very simple structure. By loading three lumped capacitors in parallel to three same pairs of coupled lines, three transmission poles and four transmission zeros can be achieved and they can be calculated by input admittance derivation. To verify the design, a wideband BPF prototype with center frequency at 1.34 GHz is fabricated, whose measured 3-dB fractional bandwidth is 98.5 % (0.68–2 GHz), in-band insertion loss is less than 0.5 dB, return loss is greater than 17.5 dB, and circuit size is only 0.24 λ g × 0.02 λ g (λ g: guided wavelength at the center frequency).

The Mechanism of Short-Circuit Oscillations in Automotive-Grade Multi-Chip Parallel Power Modules and an Effective Mitigation Approach.

This paper presents an in-depth analysis of the oscillation phenomenon occurring in multi-chip parallel automotive-grade power modules under short-circuit conditions and investigates three suppression methods. We tested and analyzed two commercial automotive-grade power modules, one containing two chips and the other containing a single chip, and found that short-circuit gate oscillations were more likely to occur in multi-chip parallel packaged modules than in single-chip packaged modules. Through experimental and simulation analyses, we observed that gate oscillations were mainly caused by the interaction between internal parasitic parameters of the module and the external drive circuit, and we found that high drive resistance and low common emitter inductance between parallel chips could effectively suppress gate voltage oscillations. We also analyzed the two mainstream suppression schemes, increasing the drive gate resistance and placing the drive capacitors in parallel. Unfortunately, we found that these suppression schemes were not ideal solutions because both schemes changed the switching characteristics of the power module. As an alternative, we propose a simple and effective solution that involves adding parallel connections between the parallel chips. Simulation calculations showed that this optimized method reduced the emitter inductance between parallel chips in the upper bridge arm by about 30% and in the lower bridge arm by 35%. Through short-circuit experiments conducted at different DC bus voltages, it has been verified that the new optimized solution effectively resolves gate oscillation issues without affecting the switching characteristics of the power module.

27 MHz constant field dielectric warming of kidneys cryopreserved by vitrification

Organs cryopreserved by vitrification are exposed to the lowest possible concentration of cryoprotectants for the least time necessary to successfully avoid ice formation. Faster cooling and warming rates enable lower concentrations and perfusion times, reducing toxicity. Since warming rates necessary to avoid ice formation during recovery from vitrification are typically faster than cooling rates necessary for vitrification, warming speed is a major determining factor for successful vitrification. Dielectric warming uses an oscillating electric field to directly heat water and cryoprotectant molecules inside organs to achieve warming that's faster and more uniform than can be achieved by heat conduction from the organ surface. This work studied 27 MHz dielectric warming of rabbit kidneys perfused with M22 vitrification solution. The 27 MHz frequency was chosen because its long wavelength and penetration depth are suitable for human organs, because it had an anticipated favorable temperature of maximum dielectric absorption in M22, and because it's an allocated frequency for industrial and amateur use with inexpensive amplifiers available. Previously vitrified kidneys were warmed from −100 °C by placement in a 27 MHz electric field formed between parallel capacitor plates in a resonant circuit. Power was varied during warming to maintain constant electric field amplitude between the plates. Maximum power absorption occurred near −70 °C, with a peak warming rate near 150 °C/min in 50 mL total volume with approximately 500 W power. After some optimization, it was possible to warm ∼13 g vitrified kidneys with unprecedentedly little injury from medullary ice formation and a favorable serum creatinine trend after transplant. Distinct behaviors of power absorption and system tuning observed as a function of temperature during warming are promising for non-invasive thermometry and future automated control of the warming process at even faster rates with user-defined temperature dependence.

Comprehensive study of Class‐‐E/F2 and inverse Class‐‐F power amplifiers for mm‐Wave systems utilizing 130 nm CMOS process

AbstractThis paper presents a comprehensive study of Class‐‐E/F2 and inverse Class‐‐F power amplifiers (PAs) designed for 35–42 GHz millimeter‐wave applications, utilizing a 130 nm CMOS process. The proposed RF PAs are well suited for wide frequency‐band millimeter‐wave and 5G radio transmitters. A comprehensive study of limiting factors in amplifier efficiency is presented in this paper. The study encompasses an analysis of all the factors that restrict the efficiency of the switched power amplifier. The first proposed power amplifier is based on the Class E/F2 architecture, comprising a parallel capacitor, second harmonic resonance circuit, and output matching network. Conversely, the second suggested power amplifier is constructed using the inverse Class‐‐F topology, which includes harmonic termination and matching networks. The harmonic termination circuit incorporates a second harmonic resonance network and utilizes a parasitic capacitor to control the harmonic components. Both the proposed Class E/F2 and inverse Class‐‐F architectures are employed to reshape the drain current and voltage waveforms, aiming to reduce the overlap between them and, consequently, improve efficiency. The suggested power amplifiers comprise a driver Class‐‐AB stage and a power stage constructed based on either the Class E/F2 architecture or inverse Class‐‐F topology, utilizing harmonic termination networks at the output load. Two new designs of high‐Q factor on‐chip finger capacitors have been implemented to improve efficiency and radio frequency performance. Achieving input matching and inter‐stage matching is facilitated by employing two novel on‐chip transformers designed for maximum power transfer. Additionally, an inter‐stage matching inductor is utilized in a cascode configuration to enhance the overall RF performance. The on‐chip transformers, inductors, and finger capacitors are designed using the HFSS software program. S‐parameter files (SNP files) of the designed on‐chip components are extracted and inserted into the simulation tool to ensure accurate results. The proposed Class E/F2 power amplifier achieves a constant power of 14.9 dBm, an extreme power added efficiency (PAE) of 11.7%, and a maximum gain of 13.74 dB. In contrast, the suggested inverse Class‐‐F power amplifier attains a constant power of 15.4 dBm, a peak PAE of 12.6%, and a maximum gain of 14.8 dB. The DC power consumption is 73 and 66 mW for the proposed Class E/F2 and inverse Class‐‐F PAs, respectively, while their active sizes are 0.14 and 0.2 mm2.

Current Sharing Analysis and Evaluation of Parallel DC-Link Capacitors in Vehicle Motor Drive

In electric vehicle inverter systems, the DC-link capacitor bank becomes a critical obstacle to high power density due to its large volume. DC-link capacitor bank commonly adopts a multi-core parallel structure. The challenges exist in the current sharing of parallel capacitor cores because of the imbalance of stray parameters in the busbars. A current sharing analysis method aiming at thermal stress for capacitor banks in high-power-density inverters based on the characteristic matrix is proposed in this paper. First, the design basis of DC-link capacitors is given theoretically. Then, the complex coupling impedance model between multiple ports on capacitor busbars is mathematically derived by the matrix method, revealing the current resonance phenomenon of parallel capacitor cores affected by stray parameters. Next, three capacitor banks are evaluated by the proposed current sharing model. The influence of capacitor core arrangement and terminal position on current sharing is explored, which can guide capacitor banks’ high-power-density structure and heat dissipation design. Finally, an experimental platform is built with customized capacitor samples. The experimental results are consistent with the analysis results of the model, verifying the proposed method.

Impedance Bandwidth Enhancement Using Capacitor-Controlled Series Resonance in an Antenna’s Feeding Structure

This paper introduces a feeding structure that employs a series capacitor and a parallel capacitor to control input impedance. Accordingly, a wide impedance bandwidth was achieved in a simulation. A comparative analysis of the characteristics of the reference antenna and the proposed antenna was conducted to demonstrate the proposed antenna’s improved bandwidth and enhanced efficiency. According to the simulation and measurement data, the bandwidth of the proposed antenna was approximately 400 MHz (range, 680–1,080 MHz) under a 3:1 voltage standing wave ratio. Moreover, the efficiency improved from 43% to 59% (range, 690–960 MHz), and the radiation pattern showed satisfactory performance. The proposed technology thus offers promising development prospects for the antenna designs of low-frequency systems for mobile communication.

Study of Problem and Effect Mitigation Technique of Unbalance Capacitance in 500 kV Single Phase Transformers

This article presents the study of the effect of unbalanced stray capacitance in single-phase 500 kV power transformers and establishes the mitigation technique. The power transformers were operated in Wang Noi Substation for transmitting the electrical power. There are 3 units of single-phase power transformer. Previously, a transformer of phase B failed after being serviced for several years. Thus, the new power transformer was ordered instead of the failed one. However, once the new system had been operated, the hotspots at the surge arrester of tertiary winding (22 kV) were found and the unbalance of phase voltages was observed, resulting in overvoltage as a root cause of the problem. Once a thorough investigation was done, it was found that there was an effect of unbalanced stray capacitance between tertiary winding and ground core since the new power transformer has some different designs compared with the remaining. Hence, the mitigation technique was performed by adding the capacitor parallel to the tertiary winding until the voltage balance was achieved. Simulation with the PSCAD program was performed to determine the optimum value for additional capacitors, i.e., voltage balance, using an iterative method. In this article, the capacitors used for additional were capacitor voltage transformers, which have been installed. As a result of the troubleshooting, the voltage at the 22 kV bus was more balanced as well as not causing overvoltage, and the hotspots at the surge arrester of tertiary winding were not detected resulting in gaining the stability and reliability of using these transformers.

Electrophysiological Recording from a "Model" Cell.

The muscle cell or neuron membrane is functionally equivalent to a resistor-capacitor (RC) circuit with the membrane resistance and capacitor in parallel. Once inserted inside the membrane, an electrode introduces a serial resistance and small capacitance to the RC circuit. Through a narrow opening at its tip (∼0.1-μm), current can pass through the electrode, into the cell, and back to the outside (ground) across the membrane to complete the circuit. This arrangement enables a voltage difference between the outside and inside of the cell membrane to be recorded. To determine cell membrane properties, a current can be injected into the cell through the electrode. One complication with this approach, however, is that the voltage difference measured with the electrode includes the voltage drop across the cell membrane and that across the electrode. Furthermore, a small amount of current is drawn by the electrode capacitor, thereby slowing the current flow across the membrane. Fortunately, most amplifiers are equipped with bridge balance and capacitance compensation functions so that the effects of the electrode on cell membrane properties can be canceled out or minimized. This protocol describes the basics of setting up and conducting electrophysiological experiments using a model cell. For the novice, a model cell provides a way to learn the operation of electrophysiology equipment and software without the anxiety of damaging living cells. This protocol also illustrates passive membrane properties such as the input resistance, capacitance, and time constant.