Packaging Related Issues Research Articles

Thickness Effect of Copper Clips on Power Module Packaging Design

The superior switching performance of SiC MOSFETs compared to Si devices is limited by packaging-related issues. High electromagnetic parasitics which lead to high voltage overshoots, and higher power losses are the main challenges of high frequency operation. Hence, packaging design modification and optimisation are necessary to accommodate faster switching. Copper clips replacing the bonding wires show promising results in reducing stray inductances, while enhancing the current conduction and heat dissipation since the clip are in contact with a larger area of the semiconductor chip. Silver sintering instead of soldering further improves the electrothermal behaviour. This paper investigates numerically various thicknesses of the copper clips and their effect on double-sided silver sintering, half-bridge 1200V/400A SiC MOSFET power module. Moreover, the silver layer thickness is varied to reduce th maximum stresses on the chip - silver interface.

Linking microbial contamination to food spoilage and food waste: the role of smart packaging, spoilage risk assessments, and date labeling.

Ensuring a safe and adequate food supply is a cornerstone of human health and food security. However, a significant portion of the food produced for human consumption is wasted annually on a global scale. Reducing harvest and postharvest food waste, waste during food processing, as well as food waste at the consumer level, have been key objectives of improving and maintaining sustainability. These issues can range from damage during processing, handling, and transport, to the use of inappropriate or outdated systems, and storage and packaging-related issues. Microbial growth and (cross)contamination during harvest, processing, and packaging, which causes spoilage and safety issues in both fresh and packaged foods, is an overarching issue contributing to food waste. Microbial causes of food spoilage are typically bacterial or fungal in nature and can impact fresh, processed, and packaged foods. Moreover, spoilage can be influenced by the intrinsic factors of the food (water activity, pH), initial load of the microorganism and its interaction with the surrounding microflora, and external factors such as temperature abuse and food acidity, among others. Considering this multifaceted nature of the food system and the factors driving microbial spoilage, there is an immediate need for the use of novel approaches to predict and potentially prevent the occurrence of such spoilage to minimize food waste at the harvest, post-harvest, processing, and consumer levels. Quantitative microbial spoilage risk assessment (QMSRA) is a predictive framework that analyzes information on microbial behavior under the various conditions encountered within the food ecosystem, while employing a probabilistic approach to account for uncertainty and variability. Widespread adoption of the QMSRA approach could help in predicting and preventing the occurrence of spoilage along the food chain. Alternatively, the use of advanced packaging technologies would serve as a direct prevention strategy, potentially minimizing (cross)contamination and assuring the safe handling of foods, in order to reduce food waste at the post-harvest and retail stages. Finally, increasing transparency and consumer knowledge regarding food date labels, which typically are indicators of food quality rather than food safety, could also contribute to reduced food waste at the consumer level. The objective of this review is to highlight the impact of microbial spoilage and (cross)contamination events on food loss and waste. The review also discusses some novel methods to mitigate food spoilage and food loss and waste, and ensure the quality and safety of our food supply.

Applications of infrared microscopy to IC and MEMS packaging

A high sensitivity, infrared (IR) microscope operating in the wavelength range 800 to 2500 nm has been applied to a variety of packaging related issues. Applications can be divided into three categories. 1) For flip chip devices the advantage of the IR microscope is that most silicon is effectively transparent at wavelengths greater than 1100 nm. This enable defects such as voids, delamination cracks and corrosion to be investigated while the chip is mounted on the substrate. 2) The IR microscope enables thermal images of devices to be obtained with a temperature resolution of approximately 1 K and spatial resolution of 2-3 /spl mu/m. 3) The transparency of silicon to IR radiation has proved particularly valuable for characterising micro-electro-mechanical systems (MEMS) devices such as microphones, at various stages of packaging, e.g., after die bonding and wire bonding.

Three-dimensionally interconnected bidirectional optical backplane

The concept of a three-dimensionally interconnected bidirectional optical backplane for a high performance system containing multichip module boards is introduced. The backplane reported here employs one-dimensional (1-D) and two-dimensional (2-D) vertical-cavity surface-emitting laser (VCSEL), and photodetector arrays as transceivers. By integrating VCSEL, lens, doubly multiplexed holographic gratings, and photodetector arrays, we have demonstrated this architecture while using the third dimension as the signal propagating direction. Packaging related issues such as misalignment, crosstalk, and signal-to-noise ratio are studied. The frequency response of our device shows a bandwidth of 2.5 THz. Eye diagrams for a single bus line up to 1.5 GHz are demonstrated with clear eyes. An aggregate bandwidth of 6 GHz is thus confirmed with 2/spl times/2 bus lines.

Bi-directional optical backplane bus for general purpose multi-processor board-to-board optoelectronic interconnects

We report for the first time a bidirectional optical backplane bus for a high performance system containing nine multi-chip module (MCM) boards, operating at 632.8 and 1300 nm. The backplane bus reported here employs arrays of multiplexed polymer-based waveguide holograms in conjunction with a waveguiding plate, within which 16 substrate guided waves for 72 (8/spl times/9) cascaded fanouts, are generated. Data transfer of 1.2 Gbt/s at 1.3-/spl mu/m wavelength is demonstrated for a single bus line with 72 cascaded fanouts. Packaging-related issues such as transceiver size and misalignment are embarked upon to provide a reliable system with a wide bandwidth coverage. Theoretical treatment to minimize intensity fluctuations among the nine modules in both directions is further presented and an optimum design rule is provided. The backplane bus demonstrated, is for general-purpose and therefore compatible with such IEEE standardized buses as VMEbus, Futurebus and FASTBUS, and can function as a backplane bus in existing computing environments.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>