Overmodulation Region Research Articles

Control of Three-to-Five-Phase Matrix Converter Using Carrier-Based PWM Algorithm

Abstract - This paper proposes a simple Carrier-Based PWM (CBPWM) technique to control the three- to five-phase Direct Matrix Converter (3×5 DMC). The proposed technique uses the indirect modulation approach to control the 3×5 DMC such as a three-phase bidirectional rectifier followed by five-phase voltage source inverter (VSI). Based on this approach, it is possible to synthesize the desired five-phase output voltages with sinusoidal three-phase input currents and unity input power factor. A CBPWM method is suggested for each stage independently including both linear and overmodulation operating modes. By the proposed technique, in both operating modes, the maximum possible overall Voltage Transfer Ratio (VTR) are achieved. Moreover, this technique allows the input power factor to be controlled by controlling the input current displacement angle. The feasibility of the proposed technique has been verified by a series of simulation and experimental results based on Matlab/Simulink and dSPACE-DS1104 platform. The results show that, a sinusoidal output and input waveforms can be achieved with a maximum possible VTR in the linear region. However, in the overmodulation region, a maximum possible VTR is achieved at the cost of some distortion of output and input waveforms. Therefore, this technique can be used for the application where a higher VTR is essential.

PWM Strategy With Minimum Harmonic Distortion for Dual Three-Phase Permanent-Magnet Synchronous Motor Drives Operating in the Overmodulation Region

This study presents a novel overmodulation strategy for a six-phase voltage source inverter (VSI)-fed dual three-phase permanent-magnet synchronous motor. The proposed strategy can achieve minimum harmonic injection in the overmodulation region. Four-vector space vector pulse width modulation (SVPWM) renders mathematic foundations for this given method. However, the classical four-vector SVPWM used in six-phase VSI has asymmetrical pulse width modulation waveform, which makes it difficult for hardware implementation. In this paper, the modulation algorithms in both linear and overmodulation regions have been unified and implemented with the double zero-sequence injection PWM strategy. This strategy is able to overcome the inherent shortcomings of the four-vector SVPWM, and it achieves smooth transitions from linear to overmodulation region. Simulation analysis and experimental results demonstrate the effectiveness and feasibility of the proposed strategy.

A novel over-modulation strategy for dual three-phase induction motor drive system

In this article, a novel strategy for dual three-phase converter operating in the over-modulation region is proposed. The strategy enables the magnitude of inverter output voltage a linear output with modulation index varying in both fundamental and harmonic components. In the proposed algorithm, the functional relationship between modulation index and the fundamental or harmonic voltage magnitude can be described by equations. It is a single-mode over-modulation strategy avoiding storing massive correlation data between modulation index and hold angle, which indicates the proposed algorithm is suitable for digital implementation. Furthermore, this strategy extends the range of operation of the power converter from linear-modulation range to 12-step operation with a smooth and linear transition characteristic, while stator harmonic current is suppressed based on a vector decomposition technique.

Duty cycle‐based three‐level space‐vector pulse‐width modulation with overmodulation and neutral‐point balancing capabilities for three‐phase neutral‐point clamped inverters

In this study, a duty cycle-based space-vector pulse-width modulation (SVPWM) with overmodulation and capacitor voltage balance control for three-phase three-level neutral-point clamped (NPC) inverters is presented. On the basis of simple linear calculations of three-phase reference voltages, the proposed SVPWM can be derived, which avoids the trigonometry operation required by the conventional SVPWM. The modulation region can also be smoothly extended from the linear region to the overmodulation region through re-synthesising the three-phase reference voltages. This avoids the conventional non-linear function and look-up table. The neutral-point voltage balancing control is achieved via changing the duty cycle of the redundant small vectors in each switching period, which can be easily embedded into the proposed duty cycle-based SVPWM. The dynamic and steady-state performances of the proposed SVPWM are eventually verified by both simulation and experimental results.

Space-Vector-Quantized Dithered Sigma–Delta Modulator for Reducing the Harmonic Noise in Multilevel Converters

Power converters using deterministic switching frequency schemes have switching noise concentrated at harmonic frequencies, resulting in enhanced electromagnetic emission. To suppress the harmonic spikes in three-phase multilevel voltage source converters, a digital control scheme based on dithered sigma-delta modulation (SDM) is proposed in this paper. Introducing a dithered sequence in an SDM varies the switching frequency randomly, resulting in the suppression of the spurious harmonic spikes in the output spectrum even with a regular control input. Although the switching frequency varies randomly, the minimum pulsewidth of the proposed scheme is the sampling time period, avoiding the minimum pulsewidth problem. Instead of a conventional scalar quantizer, the quantizer in the proposed dithered sigma-delta converter uses the principle of space vector quantization. The proposed scheme is experimentally verified on a constant v/f open-loop induction motor drive for a three-level inverter realized by cascading two two-level inverters. The performance of the proposed scheme is compared with different pulsewidth modulation schemes in the entire modulation index, including the overmodulation region.

A Quad Two-Level Inverter Configuration for Four-Pole Induction-Motor Drive with Single DC Link

A multilevel inverter topology for a four-pole induction-motor drive is presented in this paper, which is constructed using the induction-motor stator winding arrangement. A single dc source with a less magnitude when compared with conventional five-level inverter topologies is used in this topology. Therefore, power balancing issues (which are major challenges in conventional multilevel inverters) are minimized. As this configuration uses a single dc source, it provides a path for zero-sequence currents because of the zero-sequence voltages present in the output, which will flow through the motor phase winding and power electronic switches. To minimize these zero-sequence currents, sine-triangle pulsewidth modulation (SPWM) is used, which will shift the lower order harmonics near to switching frequency in the linear modulation region. However, in the case of overmodulation, harmonic voltages will be introduced close to the fundamental frequency. In this regard, a modified SPWM technique is proposed in this paper to operate the drive in the overmodulation region up to the modulation index of 2/√3. The proposed quad two-level inverter topology is experimentally verified with a laboratory prototype on a four-pole 5-hp induction motor. Experimental results show the effectiveness of the proposed topology in the complete linear modulation region and the overmodulation region.

Evaluation and minimization of low-order harmonic torque in low-switching-frequency inverter fed induction motor drives

A low-order harmonic pulsating torque is a major concern in high-power drives, high-speed drives, and motor drives operating in an overmodulation region. This paper attempts to minimize the low-order harmonic torques in induction motor drives, operated at a low pulse number (i.e., a low ratio of switching frequency to fundamental frequency), through a frequency- domain (FD) approach as well as a synchronous reference frame (SRF) based approach. This paper first investigates FD-based approximate elimination of harmonic torque as suggested by classical works. This is then extended into a procedure for minimization of low-order pulsating torque components in the FD, which is independent of machine parameters and mechanical load. Furthermore, an SRF-based optimal pulsewidth modulation (PWM) method is proposed to minimize the low-order harmonic torques, considering the motor parameters and load torque. The two optimal methods are evaluated and compared with sine-triangle (ST) PWM and selective harmonic elimination (SHE) PWM through simulations and experimental studies on a 3.7-kW induction motor drive. The SRF-based optimal PWM results in marginally better performance than the FD-based one. However, the selection of optimal switching angle for any modulation index $(M)$ takes much longer in case of SRF than in case of the FD-based approach. The FD-based optimal solutions can be used as good starting solutions and/or to reasonably restrict the search space for optimal solutions in the SRF-based approach. Both of the FD-based and SRF-based optimal PWM methods reduce the low-order pulsating torque significantly, compared to ST PWM and SHE PWM, as shown by the simulation and experimental results.

Vector based dead-time compensation for three-level T-type converters

This paper proposes a new vector-based dead-time compensation method for three-level T-type converters. The origins and effects of the dead-time voltage errors are analyzed in detail for different switching commutations and load conditions. In order to eliminate the dead-time distortion in each phase, a dead-time error voltage vector is introduced to adjust the reference voltage vector depending on load current polarity. The proposed vector-based dead-time compensation scheme has several advantages. First, it can be applied to multilevel converters with any number of voltage levels using any modulation schemes. Second, the pulse loss issue which is common in conventional pulse-based compensation strategies can be eliminated. In addition, the pulse saturation can be mitigated by operating the converters in overmodulation regions. All of these advantages and effectiveness of the proposed vector-based dead-time compensation method are verified through both simulation and experimental studies.

Advanced Static Over-modulation Scheme using Offset Voltages Injection for Simple Implementation and Less Harmonics

In this paper, a novel static overmodulation scheme (OVM) for space-vector PWM (SVPWM) is proposed. The proposed static OVM scheme uses the concept of adding offset voltages in linear region as well as overmodulation region to fully utilize DC-link voltage. By employing zero sequence voltage injection, the proposed scheme reduces procedures for achieving SVPWM such as complicated gating time calculation. In addition, this paper proposes a stepwise discontinuous angle movement in high modulation region in order to reduce Total Harmonic Distortion (THD). The validity of the proposed scheme is verified through theoretical analysis and experimental results.

Research on Limit-Trajectory Over-Modulation Strategy of Two Stage Matrix Converter

Aim at solving the problem is poor quality of waveforms and that of complicated modulation strategy in two stage matrix converter. The method is that Limit-Trajectory over-modulation strategy is adopted in inverter to ensure linear modulation in all over-modulation regions and space vector pulse width modulation is adopted in rectifier. This simpler control algorithm reduces memory space and linear calculation is instead of look-up table. Simulation show that the voltage transfer ratio can be improved from 0.866 to 0.95 and the quality of output waveforms is greatly enhanced.

Space-Vector-Based Synchronized Three-Level Discontinuous PWM for Medium-Voltage High-Power VSI

The high-power voltage source inverters are switched at low frequency to reduce the losses in the inverter. The discontinuous pulsewidth-modulation (PWM) sequences reduce the switching frequency to two-thirds compared to the conventional continuous PWM sequences. At low switching frequency, the output will be rich in harmonics, and synchronization is a must to avoid subharmonics. This paper presents four basic types of synchronized discontinuous PWM (DPWM) sequences that ensure synchronization, three-phase symmetry, and half-wave symmetry. The proposed synchronized DPWM sequences are verified through simulation and experiment on a constant- v/f open-loop induction motor drive. The performance of the proposed DPWM algorithms is studied in the entire modulation region, including the overmodulation region, and is compared with that of the conventional synchronized space vector PWM. A different type of DPWM with low common-mode voltage is suggested for low-modulation region and verified experimentally.

Comprehensive Mathematical Description and Harmonic Analysis of Hybrid Two-Dimensional–Three-Dimensional Space Vector Modulation

This paper presents the mathematical and harmonic analyses of output phase voltages of three-phase voltage source inverters which employ a hybrid two-dimensional-three-dimensional (2-D-3-D) space vector modulation (SVM) voltage control algorithm. The explicit time-domain representation of the harmonic components in addition to the total harmonic distortion (THD) of the output phase voltages is given in terms of system and control parameters. This paper also investigates the harmonic characteristics and THD performance against the linearity of the modulation region which helps in the harmonic performance and design studies of such inverters employing the hybrid 2-D-3-D SVM. The fundamental component of the output voltages follows the reference with lower THD in the linear modulation region rather than the overmodulation region. Experimental results are used to validate these analyses as well as the effectiveness of the hybrid 2-D-3-D SVM algorithm for generating balanced and low THD phase voltages.

FPGA Implementation of a PWM for a Three-Phase DC–AC Multilevel Active-Clamped Converter

With the aim to implement a suitable controller for a three-phase dc–ac multilevel active-clamped converter to enable its use in practice, and as a first step toward a full closed-loop converter control implementation into a single field-programmable gate array (FPGA) device, this paper presents the structure and features of an FPGA implementation of an appropriate pulsewidth modulation (PWM) strategy. The selected PWM strategy guarantees dc-link capacitor voltage balance in every switching cycle, and covers both the undermodulation and overmodulation regions. A flexible implementation is conceived, allowing the variation of important operating parameters, such as the modulation index and switching frequency, through a simple user interface. The key aspects to achieve an efficient and robust FPGA implementation are discussed. Experimental results in a four-level converter prototype controlled with an Altera Cyclone III device under different operating conditions match fairly well with the expected results obtained through simulation, thus verifying the accurate performance of the FPGA-based modulator.

SVM Procedure for $n$-Phase VSI With Low Harmonic Distortion in the Overmodulation Region

Space vector modulation (SVM) technique has become a standard method for the impression of voltage references in conventional three-phase voltage source inverters. The method is nowadays used in multiphase (more than three) drives, where linear and overmodulation regions are covered only for the five-phase case. This work proposes a general SVM procedure for linear and overmodulation regions in <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$n$</tex></formula> -phase drives (being <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$n$</tex></formula> any odd number, <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$n &gt; 3$</tex></formula> ) and simplifies the extension of SVM to the multiphase case. The proposed method achieves the reference voltage at the fundamental frequency while reducing introduced harmonic components in the overmodulation region compared to previous proposals.

Relationship between two‐level space‐vector pulse‐width modulation and carrier‐based pulse‐width modulation in the over‐modulation region

For low voltage motor drive applications, in order to enhance the utilisation rate of dc bus voltage and extend the operating boundary of induction motors, the modulation index is often extended from the linear modulation region to the over-modulation region. The relationship between two-level space-vector pulse-width modulation (SVPWM) and carrier-based pulse-width modulation (CBPWM) in the linear modulation region has been widely investigated and it was shown that the conventional SVPWM is a special type of CBPWM algorithm with zero sequence components injection. On the basis of that, this study focuses on investigating their relationship in the over-modulation region. Firstly, the superposition principle is adopted to analyse the features of SVPWM algorithm in the over-modulation region. Second, the modulating functions of CBPWM equivalent to SVPWM in the over-modulation modes I and II are derived, respectively, which are on the basis of the CBPWM regular sampling rule. Theoretical analysis shows that SVPWM is a special type of CBPWM algorithm not only in the linear modulation region but also in the over-modulation region, which provides a bidirectional bridge for the transformation between SVPWM and CBPWM in the full modulation region. Finally, the validity and effectiveness of the theoretical analysis are verified by simulation and experimental results.

A Neural Network Based Space-Vector PWM Controller for Motor Drive

This paper proposed an artificial neural network (ANN) based space vector pulse width modulation (SVPWM) for motor drive which fully covers the undermodulation and overmodulation regions. A neural network has the advantage of very fast implementation of an SVPWM algorithm that can increase the converter switching frequency, particularly when a dedicated application-specific integrated circuit chip is used in the modulator. Finally, in the environment of MATLAB/Simulink with the Neural Network Toolbox builds the simulation model of system with proposed ANN-SVPWM controller. The simulation results show that the performances of the motor drive with artificial-neural-network-based SVPWM are excellent.

Nearly Constant Switching Frequency Hysteresis Current Controller with Fast Online Computation of Boundary for a 2-Level Induction Motor Drive

A nearly constant switching frequency current hysteresis controller for a 2-level inverter fed induction motor drive is proposed in this paper. The salient features of this controller are fast dynamics for the current, inherent protection against overloads and less switching frequency variation. The large variation of switching frequency as in the conventional hysteresis controller is avoided by defining a current-error boundary which is obtained from the current-error trajectory of the standard space vector PWM. The current-error boundary is computed at every sampling interval based on the induction machine parameters and from the estimated fundamental stator voltage. The stator currents are always monitored and when the current-error exceeds the boundary, voltage space vector is switched to reduce the current-error. The proposed boundary computation algorithm is applicable in linear and over-modulation region and it is simple to implement in any standard digital signal processor. Detailed experimental verification is done using a 7.5 kW induction motor and the results are given to show the performance of the drive at various operating conditions and validate the proposed advantages.

A Nine-Level Inverter Topology for Medium-Voltage Induction Motor Drive With Open-End Stator Winding

A new scheme for nine-level voltage space-vector generation for medium-voltage induction motor (IM) drives with open-end stator winding is presented in this paper. The proposed nine-level power converter topology consists of two conventional three-phase two-level voltage source inverters powered by isolated dc sources and six floating-capacitor-connected $H$ -bridges. The $H$ -bridge capacitor voltages are effectively maintained at the required asymmetrical levels by employing a space vector modulation (SVPWM) based control strategy. An interesting feature of this topology is its ability to function in five- or three-level mode, in the entire modulation range, at full-power rating, in the event of any failure in the $H$ -bridges. This feature significantly improves the reliability of the proposed drive system. Each leg of the three-phase two-level inverters used in this topology switches only for a half cycle of the reference voltage waveform. Hence, the effective switching frequency is reduced by half, resulting in switching loss reduction in high-voltage devices. The transient as well as the steady-state performance of the proposed nine-level inverter-fed IM drive system is experimentally verified in the entire modulation range including the overmodulation region.

Space Vector PWM With Reduced Common-Mode Voltage for Five-Phase Induction Motor Drives Operating in Overmodulation Zone

This study presents a space vector pulsewidth modulation algorithm for five-phase converters operating in the overmodulation region that forbids the use of zero vectors, covering the whole overmodulation range and providing minimum <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</i> - <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">y</i> voltages. Avoiding zero vectors reduces the content of low-order current harmonics and, at the same time, reduces the common-mode voltage (CMV) by 40%. The method is first implemented using medium and large voltage space vectors, showing good performance in terms of current harmonic content. Then, the algorithm is applied to the case when four large vectors are used, further reducing the peak-to-peak CMV by 80% and still demonstrating a satisfactory performance. Both methods are experimentally compared to existing overmodulation algorithms obtaining better current quality and lower peak-to-peak CMV.

Vector-Quantized Space-Vector-Based Spread Spectrum Modulation Scheme for Multilevel Inverters Using the Principle of Oversampling ADC

A generalized space-vector-based spread spectrum modulation scheme for multilevel inverters is proposed in this paper. The proposed scheme uses the principle of sigma-delta modulation as applied to analog-to-digital converters (ADCs), based on the view that a multilevel converter could be interpreted as an oversampling ADC. The principle of vector quantization is utilized for quantizing the instantaneous reference voltage space vector in the proposed space-vector-based sigma-delta converter. The switching vectors of the inverter are naturally selected without sector identification, ensuring optimum switching sequence under all conditions including the overmodulation region. As the sigma-delta converter results in a randomly varying switching frequency, the proposed scheme has spread spectrum characteristics. To avoid fractional arithmetic, a 60° coordinate system is used to represent the space vector in this paper. The proposed scheme can be used for any general n -level inverter, and experimental results are presented for four-, five-, and six-level inverters, driving a 2-hp three-phase induction motor in an open-end winding configuration. The experimental results of the proposed scheme are compared with the space-vector pulsewidth modulation (PWM) scheme and random PWM scheme.