Owing to the various challenges looming over the integrated circuit (IC) supply chain for the sub-nm technology nodes, researchers are looking into emerging devices to design the next generation of high performance and low-power chips. The magnetoelectric spin-orbit (MESO) switch, developed by Intel™, is a front-runner in this search and is currently in a state of advanced experimental research. To ensure faster time-to-market and reap the existing supply chain’s benefits, it is envisioned that the upcoming MESO devices will be coupled and hybridized with the existing complementary metal-oxide-semiconductor (CMOS) industrial framework. However, adopting the existing CMOS framework and incorporating it’s outsourced supply chain increases exposure to various security threats such as design intellectual property (IP) piracy, overproduction of ICs, and insertion of hardware Trojans (HT) to leak information or cause denial-of-service. This article proposes and investigates a stealthy HT insertion technique, <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PolyWorm</i> , leveraging the polymorphic capabilities of MESO gates in hybrid MESO-CMOS architectures. We evaluate the efficacy of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PolyWorm</i> on ITC-99 benchmarks and demonstrate two use-case scenarios, viz., corrupting the intended design functionality and leaking the secret key from a cryptographic core. We also present a low-footprint domain wall-based trigger for our polymorphic Trojan to evade structural and power-based testing.
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