Channel Estimator plays an important role in reducing the error rate in wireless communication system. Conventional channel Estimators consumed high power consumption due to their complex design architectures. In this paper, a simple low power and high efficient channel Estimator for multi input multi output-orthogonal frequency division multiplexing system has been designed in order to reduce the error rate in the receiver side of the communication system. The performance of the proposed channel Estimator is analyzed interms of signal to noise ratio, bit error rate, power and current consumptions. The proposed low power channel Estimator architecture had been tested with different very large scale integration processors to validate their performance.
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