Output Load Conditions Research Articles

Hybrid-Mode PFM Control for LLC Resonant Converter

This article presents a new hybrid-mode pulse-frequency-modulation control method for an <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> resonant converter. In the proposed control method, the primary-side resonant current sensing signal of the current-mode control variable is combined with a ramp signal of the voltage-mode control variable to determine an operating frequency. Then, the proposed control method mainly modulates the ramp signal in accordance with the output load condition. Therefore, the control-to-output voltage transfer function has both the current <bold xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-</b> mode control and voltage-mode control characteristics that provide fast frequency response and stable output voltage regulation in a light-load condition. In addition, since the ramp signal is also used for slope compensation of the resonant current sensing signal, an external slope compensation circuit is not required. A small-signal ac modeling and loop analysis of the proposed method verify the advantages. The proposed control method is implemented into a field programmable gate array (FPGA) board with an analog front-end board. An experiment is carried out on a 288-W <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> resonant converter. The result shows that the proposed control method provides fast dynamic performance and stable operation under a light-load condition without an additional slope compensation circuit.

Improved dynamic performance of photovoltaic panel using fuzzy Logic-MPPT algorithm

The nonlinear characteristics and intense credence dependence of photovoltaic (PV) panel on the solar irradiance and ambient temperature demonstrate important challenges for researchers in the PV panel topic. To overcome these problems, the maximum power point tracking (MPPT) controller is needed which can improve the PV panel efficiency. In other words, for maximum efficiency, the MPPT controller can help to extract the optimal and overall available output power from the PV panel at different output load conditions. Fuzzy logic (FL) is one of the strongest techniques in the extracting of MPP in the PV panel since it has several advantages; robust; no requirement to have an accurate mathematical model, and works with imprecise inputs. Therefore, in this paper, fuzzy logic (FL-MPPT) has been designed and simulated to improve dynamic performance PV panel at different solar irradiance and then increased the efficiency. Therefore, "MATLAB/Simulink software" has been used to build the proposed algorithm and the simulation results have been adequate as well. Besides, a robust FL-MPPT algorithm has been presented with high dynamic performance under different weather conditions. Finally, the proposed algorithm has a quicker response and less oscillatory comparison of the conventional algorithms in the subject of extracting the maximum PV power.

An Improved Efficiency of Photovoltaic Panel Based on Fuzzy Logic Maximum Power Point Tracking Algorithm

The nonlinear characteristics and intense credence dependence of photovoltaic (PV) panel on the solar radiation and ambient temperature demonstrate important challenges for researchers in PV panel topic. To overcome these problems, the maximum power point tracking (MPPT) controller is needed which can improve the PV panel efficiency. In other words, for maximum efficiency, the MPPT controller can help to extract the optimal and overall available output power from PV panel at different output load condition. In this paper, fuzzy logic (FL-MPPT) has been designed and simulated to increase the PV panel efficiency. FL is one of the strongest technique in the extracting of MPP in PV panel since it has several advantages; robust; no require to have accurate mathematical model, and works with imprecise inputs. However, MATLAB/Simulink is used to build the proposed algorithm and the simulation results are adequate as well. Therefore, a robust FL-MPPT algorithm has been achieved under different weather condition for the solar radiation and ambient temperature. Finally, the proposed algorithm has a quicker response and less oscillatory comparison the conventional algorithms in extracting the maximum PV power.

Design of Stage-Selective Negative Voltage Generator to Improve On-Chip Power Conversion Efficiency for Neuron Stimulation

Dedicated to neuron stimulation circuits, a stage-selective negative voltage generator is proposed to enhance the overall power efficiency. Since the supplied voltage of the stimulus driver is subject to applications and treatments, an extensive output requirement of supply is demanded to achieve energy-efficient stimulation. The charge pump is implemented as a negative voltage generator for on-chip design. In a limited area, excess power loss is eliminated by reconfiguring the cascaded architecture and clocks. Digitally programmable voltage levels can be outputted by varying the number of stages dynamically. The function of stage selection is achieved by the proposed stage-selective scheme. With appreciate control, the stage-selective negative voltage generator can maintain higher power efficiency under different output voltage levels and loading conditions. The technique improves 40% power conversion ratio at most but only leads to an increment of 8% in area occupation. The measured output voltage covers from -0.3 V to -9.3 V within a maximum 5.5-mA output current, which is verified in a 0.25-μm BCD process.

Tunable High-Power Multilayer Piezoelectric Transformer

Piezoelectric transformers (PTs) have been conventionally used in step-up high-voltage low-power applications such as liquid crystal display (LCD) backlighting for portable electronic devices. PTs have also been considered for step-down applications such as battery chargers for portable devices. In these applications, adapting the output impedance of the PT to meet the requirements of lower output voltages and higher output currents implies the design of PTs with larger number of output layers. Furthermore, these step-down applications require efficient operation of PT under a variety of output load conditions to meet the conditions of battery charging. Thus, strategies to adapt the PT to the variation of the output load are being pursued. In this article, a novel tunable piezoelectric transformer (TPT) for ac–dc and dc–dc high-power converters is presented. This TPT is designed to operate in the radial mode and is fabricated using cofired multilayer process. By introducing control layers into the design, the TPT is shown to provide desired features that include adjustable frequency response and flexible transfer ratio. Fabricated TPT exhibits high efficiency over 96% with an output power capability of 40 W when operating under its nominal load conditions.

Coordinated mechanical loads and power optimization of wind energy conversion systems with variable-weight model predictive control strategy

For wind energy conversion systems operating above the rated wind speed, the frequent pitch actions regulate the mechanical power as the rated one with the cost of blade and drive shaft loads. It is meaningful to maintain the desired power with appropriate pitch sensitivity related to the wind speed fluctuations, which can further reduce the mechanical loads of wind turbines with a longer service life. To quantify the blade pitch sensitivity, the blade pitch standard deviation is introduced to connect the pitch actions with the blade and drive shaft loads. Within a variable-weight model predictive control (MPC) strategy, both generator power output quality and load conditions are optimized through the pitch/torque participation coordination based on the Pareto analysis. Moreover, the MPC-weight matrix could be updated adaptively through the wind status assessment. The comparisons between the proposed strategy and the traditional gain scheduling PI one show the effectiveness. Several suggestions are also concluded for industrial wind turbines with MPC implementations.

High-Efficiency Input and Output Harmonically Engineered Power Amplifiers

This paper presents an in-depth, systematic study of the impact of input and output harmonics in the design of high-efficiency power amplifiers (PAs). The study evaluates the performance of harmonically tuned amplifiers, tackling concurrently both input and output harmonics. The proposed theory starts with deriving an altered input voltage waveform under the impact of input nonlinearity. Intrinsic drain voltage and drain current components are formulated as a function of the conduction angle $\alpha $ considering both source and load terminations. Output power and drain efficiency are then computed as a function of input nonlinearity, $\alpha $ , and output loading conditions. The derived formulations allow to investigate the design sensitivity to input nonlinearity and its impact on fundamental design space. The impact of source harmonics is evaluated using harmonic source pull under different output loading conditions. Thereafter, PA design and implementation has been carried out using NXP 1.95 mm die to confirm the distinctive behavior of class GF and GF−1 amplifiers with respect to the input harmonic terminations. For practical validation, four different design cases with different second harmonic source impedances are investigated. At 2.6 GHz, drain efficiencies ranging between 76% and 83% were exhibited depending on the source and load harmonic tuning for each design case. Measurement results confirm the theoretical findings reported in this paper.

Unified control of DC-DC buck converter using dynamic adaptive controller for battery operated devices

The problem considered in this paper is improving the dynamic response of DC-DC converter system with internal parameter uncertainties. The methodology of sliding mode control in existing works is based on Proportional Integral and Derivative Controller (PID).The present work addresses various issues on a unified approach for design and application of pulse-width modulation (PWM) based Digital Adaptive Sliding Mode equivalent (ASM) control technique to buck converter for mobile phones operating in continuous conduction mode (CCM) and discontinuous conduction mode (DCM). The controller is gain scheduled to monitor the output loading condition, and adaptively changes the control parameters to give optimal dynamic performance corresponding to any load variations. Further stability is analytically verified using Lyapunov stability criterion and system is proved to be globally asymptotically stable. Finally effectiveness of proposed method is verified by simulation and experiment. Stable steady state response with reduced ripple is obtained.

PI kontrolcü tabanlı yeni bir kontrol yapısının yükseltici DA-DA çevirici için tasarımı

In this paper, a new approach is proposed for control of DC-DC boost converter. In the proposed approach, open-loop control law based on the converter input voltage and the reference converter output voltage that supports the control structure based on PI controller is developed. Open loop PWM (Pulse Width Modulation) switching duty ratio is derived for the DC-DC boost converter by the control law. The control law provides to obtain the converter output voltage in a healthy and efficient manner with various system parameters through supporting the conventional PI controller. The proposed approach has been tested in MATLAB-Simulink environment as simulation. The obtained simulation results have shown that the proposed approach has provided to obtain high quality output voltage of the boost converter in different input voltage, reference output voltage and load conditions.

Conductance Modulation Techniques in Switched-Capacitor DC-DC Converter for Maximum-Efficiency Tracking and Ripple Mitigation in 22 nm Tri-Gate CMOS

Switch conductance modulation techniques are demonstrated in a fully integrated multi-ratio switched-capacitor voltage regulator with hysteretic control, in 22 nm tri-gate CMOS with high-density MIM capacitor. We present (i) an adaptive switch-size scaling scheme for maximum efficiency tracking across a wide range of voltages and currents, governed by a frequency-based control law that is experimentally validated across multiple dies and temperatures and, (ii) a simple active ripple mitigation technique that modulates the gate drive of select MOSFET switches effectively in all conversion modes. Efficiency improvements up to 15% are measured under low output voltage and load conditions. Load-independent output ripple of $ 50 mV is achieved, enabling reduced interleaving. Test chip implementations and measurements demonstrate ease of integration in SoC designs, power efficiency benefits and EMI/RFI improvements.

Efficiency Improvement in Photovoltaic-Assisted CMOS Rectifier with Symmetric and Voltage-Boost PV-Cells

Efficiency of the photovoltaic-assisted UHF CMOS rectifier, which is one example realization of the synergistic ambient energy harvesting concept, has been improved by symmetric PV cell structure. Balanced biasing for the n-channel and p-channel diode-connected MOSFETs realized by the symmetric PV cells effectively compensates Vths and prevents useless leakage current, resulting in the improved efficiency of the rectifier under low input power conditions. In addition, by extending the balanced biasing concept, output-voltage-boosted PV cell structure was proposed and found to be effective for further improving the efficiency of the rectifier. As a result, under a typical indoor lighting condition of 300lx, power conversion efficiency of 25.4% was achieved at -20dBm of 920MHz RF input and 47kΩ output loading conditions, being 3.6 times larger than a conventional rectifier without PV assistance.

Improved Synchronous Rectifier Driving Strategy for Primary-Side Regulated (PSR) Flyback Converter in Light-Load Mode

Based on the concept derivation, this paper proposes an improved synchronous rectifier (SR) driving strategy focusing on the quasi-resonant primary-side regulation (QR-PSR) Flyback converter, for the applications of dc-dc front-end converter and ac-dc PFC converter both, to prevent reverse energy flowing in light-load/standby mode. Three different implementation candidates are exhibited and analyzed. This proposed driving strategy is programmable for the practical design with input voltage feedforward effect and helpful for achieving the rigorous target of low power loss under light output load condition presented by the U.S. Department of Energy (DoE). Two 60 W (12 V/5 A) lab-made prototypes of synchronous rectified QR-PSR Flyback ac-dc PFC converter and dc-dc front-end converter are built up, respectively, to verify the feasibility of this proposed driving strategy. In the lab-made prototype of ac-dc PFC converter, it improves the overall conversion efficiency more than 3% in light-load mode; in the lab-made prototype of dc-dc front-end converter, it saves the light load power loss up to 0.5 W, especially with 110 Vac input. Reliable operation is achieved when the proposed SR driving strategy is practically designed with enough margin; however, too large design margin could decrease the average conversion efficiency.

Improving the Reliability of Series Resonant Inverters for Induction Heating Applications

This paper analyzes a high-power (100-kW) high-frequency (50-kHz) voltage-fed inverter with a series resonant load circuit for industrial induction heating applications which is characterized by a full-bridge inverter composed of isolated-gate bipolar transistors and a new power control based on phase-shift (PS) control. This power control circuit incorporates a load-adaptive variable-frequency controller and automated blanking time management in order to allow the inverter to work in zero-voltage switching for all output power levels and load conditions. An important improvement of the inverter reliability is achieved by choosing an appropriate and novel switching sequence for the PS inverter. The results are verified experimentally using a prototype for induction hardening applications. A comparative study between the proposed and standard PS power control will be made.

High-Efficiency Wideband Rectifier for Single-Chip Batteryless Active Millimeter-Wave Identification (MMID) Tag in 65-nm Bulk CMOS Technology

This paper presents the development and demonstration of a high-efficiency rectifier for millimeter-wave-to-dc energy conversion. It is a critical circuit block that renders possible the use of a single CMOS chip die with no substrate and wiring, as the implementation of a batteryless, yet active tag for next-generation high data-rate millimeter-wave identification technologies. We also propose an architecture of a reader-tag system that addresses the underlying technical challenges. The rectifier is based on a differential drive cross-coupled topology that has been shown to work at UHF frequencies only so far. In this paper, we investigate significant challenges in implementing this topology at millimeter-wave frequencies with good power conversion efficiency (PCE). The analyses, design, and results presented in this work demonstrate the feasibility of achieving this by minimizing simultaneously the small on-resistance and the reverse leakage current in the MOS transistors, and by reducing losses and parasitic capacitances through proper transistor sizing and layout optimization. Using a standard 65-nm bulk CMOS process, a chip was designed, fabricated, and tested under different input and output loading conditions. The rectifier exhibits an overall PCE of 20% at 24 GHz, 18% at 35 GHz, and 11% at 60 GHz under RF available driving power of 6, 6, and 3 dBm, respectively, and output load resistance of 1, 1, and 2 kΩ, respectively. These PCE performances at millimeter-wave frequencies have never been reported in the literature.

Boundary Control of Full-Bridge ZVS: Natural Switching Surface for Transient and Steady-State Operation

This paper presents the use of a high-performance boundary controller for the full-bridge zero-voltage-switching topology. An enhanced dynamic response is obtained by employing the natural switching surface (SS), which is thoroughly derived in the normalized geometrical domain. The advantages of the normalization are the simple graphical representation, the generality for any combination of parameters, and the mathematical simplicity. Recently, nonisolated basic topologies have benefited from advancements in boundary control. The analysis and derivation in this work bring the benefit of outstanding dynamic performance to this isolated topology. As demonstrated in this work, the relationship between the leakage and output filter inductances makes the formulation of the natural trajectories for isolated converters possible. The resulting SS provides an excellent dynamic response during start-up, reference change, and sudden output loading conditions. Experimental results are presented to illustrate the characteristics and advantages of the control scheme and the converter operation with fixed switching frequency.

A current-mode DC—DC buck converter with adaptive zero compensation

To achieve fast transient response for a DC—DC buck converter, an adaptive zero compensation circuit is presented. The compensation resistance is dynamically adjusted according to the different output load conditions, and achieves an adequate system phase margin under the different conditions. An improved capacitor multiplier circuit is adopted to realize the minimized compensation capacitance size. In addition, analysis of the small-signal model shows the correctness of the mechanism of the proposed adaptive zero compensation technique. A current-mode DC—DC buck converter with the proposed structure has been implemented in a 0.35 μm CMOS process, and the die size is only 800 × 1040 μm2. The experimental results show that the transient undershoot/overshoot voltage and the recovery times do not exceed 40 mV and 30 μs for a load current variation from 100 mA to 1 A.

Fast transient DC–DC converter with adaptive compensation zero technique

This letter is to present an adaptive compensation zero circuit to achieve good transient response in current-mode DC---DC buck converter. The proposed structure introduces an adaptive resistance dynamically adjusted according to the different output load conditions, which achieves an adequate system phase margin. A monolithic DC---DC buck converter using the proposed structure was fabricated with 0.35 μm CMOS process. Measurement results show that the transient undershoot/overshoot voltage and the recovery time do not exceed 60 mV and 20 μs for a load current variation from 0 to 1 A.

Improved transient response based adaptive compensation zero for DC–DC buck converter

An adaptive compensation zero circuit for a DC–DC buck converter is presented. The compensation resistance of the proportional compensator is dynamically adjusted according to the different output load conditions, and achieves an adequate system phase margin under different load conditions. In the experimented load-transient response, the dip voltage of 50 mV and a maximum settling time of 25 µs are observed with the proposed circuit for a load current variation from 0 to 1 A.

An Adaptive Sliding Mode Controller for High Power Factor Boost Rectifier in Continuous Conduction mode

This paper presents a new Adaptive Sliding Mode Control for high power factor boost rectifier operating in the continuous conduction mode. Through gain scheduling, the controller is designed to monitor the output loading condition, and adaptively changes its control parameters to give optimal dynamic performances corresponding to any loading variations. Simulations have been carried out to verify the idea. The results show faster transient response and reduced steady state error during over-loaded operation, and improved controller’s reliability during under loaded operation, under the adaptive controller. The general features are no input voltage sensing, and no use of multiplier. Control complexity is the same as that of standard current-mode controls. Simulation is done by using mathematical model of boost rectifier in MATLAB/SIMULINK environment. Index terms Modeling of Boost Rectifier, CCM, VSCS and SMC, Adaptive SMC

Simple implementation of control gate signals for the interleaved LLC resonant converter for high current application

AbstractA novel method of the gate signal generation for the interleaved LLC converter is proposed, which is based on the relationship between the output signal of a toggle flip‐flop having the double period of the input clock signal and the output gate signal of the LLC controller having almost half‐duty cycle. The gate signals for the master and slave converters are generated using the rising and falling edge instants from the original control gate signal of the controller, respectively. Therefore, the required 90° phase difference between two signals can be always kept at any instant and at any output load condition. Copyright © 2010 John Wiley &amp; Sons, Ltd.