A new depletion MOS transistor is proposed. The structure uses anisotropic etching to define the channel in an n/ p epitaxial silicon slice. A simple planar model is developed to explain the characteristics of the devices and is verified by measurements on experimental structures. Power devices are fabricated to illustrate the power capability of the structure. Parameters measured for this structure include: junction temperature, d.c. power dissipation, distortion, ac output power, efficiency. The devices were found to be capable of delivering up to 12W with a cutoff frequency of 80 MHz.