Oscillation-test Strategy Research Articles

Postbond Test of Through-Silicon Vias With Resistive Open Defects

Through-silicon vias (TSVs) technology has attracted industry interest as a way to achieve high bandwidth, and short interconnect delays in nanometer three-dimensional integrated circuits (3-D ICs). However, TSVs are critical elements susceptible to undergoing defects at steps, such as fabrication and bonding or during their lifetime. Resistive open defects have become one of the most frequent failure mechanisms affecting TSVs. They include microvoids, underfilling, misalignment, pinholes in the oxide, or misalignment during bonding, among others. Although considerable research effort has been made to improve the coverage of TSV testing, little attention has been paid to weak (resistive) open defects causing small delays. In this work, a postbond oscillation test strategy to detect such small delay defects is proposed. Variations in the duty cycle of transmitted signals after unbalanced logic gates are shown to help in the detection of weak open defects in TSVs. HSPICE simulations, including process parameter variations, have been considered, and results show the effectiveness of the method in the detection of weak open defects above 1 $\text{k}\Omega $ . Experimental work on a 65-nm IC also corroborates the detection capability of the proposal.

New OBIST Using On-Chip Compensation of Process Variations Toward Increasing Fault Detectability in Analog ICs

A new on-chip oscillation test strategy for analog and mixed-signal circuits is presented. In the proposed method, onchip Schmitt trigger is used as the on-chip frequency reference to compensate the influence of process parameter variations. Furthermore, this solution also brings the possibility to implement Oscillation-based Built-In Self-Test (OBIST) for analog and mixed-signal integrated circuits. The proposed OBIST strategy has been experimentally applied to active analog integrated filters, and its efficiency in detecting hard-detectable catastrophic faults is presented. To demonstrate applicability of the proposed method also in nanoscale technologies, the method has been used to test a noninverting amplifier designed in 90 nm CMOS technology. Consequently, the impact of scaling was analyzed and the method efficiency in covering catastrophic faults achieved for 0.35 μm and 90 nm CMOS technology were compared.

Oscillation Test Strategy for Analog Filters by Monitoring Output Voltage and Supply Current

A test strategy for analog filters was proposed. The output voltage and supply current of the circuit were monitored when using the oscillation test technique. The frequency, average value, maximum value and amplitude of both output voltage and supply current were taken as test parameters. Tolerance bands of test parameters were analyzed. Fault detectabilities of test parameters were compared and combined, and optimal parameter sets were derived. Experimental results show that both the output voltage and supply current give significant contribution to fault detection. Considering catastrophic, single and double parametric faults, the fault coverage in testing the benchmark circuit can be raised from 90.6% for traditional voltage-only oscillation test strategy to 97.2% by monitoring both output voltage and current parameters.

Oscillation Test Strategy: A Case Study

In this paper is proposed as a case study the test of a folded cascode operational amplifier using the Oscillation Test Strategy (OTS). This Operational Amplifier (OPA) is chosen in order to evaluate the ability of OTS to test a more complex amplifier than those previously reported. To obtain comparative results, three different types of single-OPA oscillators are employed. A catastrophic-fault injection procedure is carried out using SPICE. In all oscillators, simulation results show that the fault coverage obtained is lower than those previously obtained by many researchers for simpler amplifiers. This fact suggests that OTS might be inconvenient for applications using the OPA targeted in this work and requiring high fault coverage.

Oscillation-test methodology for low-cost testing of active analog filters

The oscillation-test strategy is a low cost and robust test method for mixed-signal integrated circuits. Being a vectorless test method, it allows one to eliminate the analog test vector generator. Furthermore, as the oscillation frequency is considered to be digital, it can be precisely analyzed using pure digital circuitry and can be easily interfaced to test techniques dedicated to the digital part of the circuit under test (CUT). This paper describes the design for testability (DFT) of active analog filters based on oscillation-test methodology. Active filters are transformed to oscillators using very simple techniques. The tolerance band of the oscillation frequency is determined by a Monte Carlo analysis taking into account the nominal tolerance of all circuit under test components. Discrete practical realizations and extensive simulations based on CMOS 1.2 /spl mu/m technology parameters affirm that the test technique presented for active analog filters ensures high fault coverage and requires a negligible area overhead. Finally, the DFT techniques investigated are very suitable for automatic testable filter synthesis and can be easily integrated in the tools dedicated to automatic filter design.

Testing analog and mixed-signal integrated circuits using oscillation-test method

A new low-cost test method for analog integrated circuits, called the oscillation test, is presented. During the test mode, the circuit under test (CUT) is converted to a circuit that oscillates. Faults in the CUT which deviate the oscillation frequency from its tolerance band can be detected. Using this test method, no test vector is required to be applied. Therefore, the test vector generation problem is eliminated, and the test time is very small because only a single output frequency is evaluated for each CUT. The oscillation frequency may be considered as a digital signal and therefore can be evaluated using pure digital circuitry. These characteristics imply that the oscillation-test strategy is very attractive for wafer-probe testing as well as final production testing. In this note, the validity of the proposed test method has been verified throughout various examples such as operational amplifiers, amplifiers, filters, and analog-to-digital converters (ADCs). The simulations and practical implementation results affirm that the presented method assures a high fault coverage.