Optimization Of Quantum Circuits Research Articles

A Study of Optimal 4-Bit Reversible Toffoli Circuits and Their Synthesis

Optimal synthesis of reversible functions is a non-trivial problem. One of the major limiting factors in computing such circuits is the sheer number of reversible functions. Even restricting synthesis to 4-bit reversible functions results in a huge search space (16! {\approx} 2^{44} functions). The output of such a search alone, counting only the space required to list Toffoli gates for every function, would require over 100 terabytes of storage. In this paper, we present two algorithms: one, that synthesizes an optimal circuit for any 4-bit reversible specification, and another that synthesizes all optimal implementations. We employ several techniques to make the problem tractable. We report results from several experiments, including synthesis of all optimal 4-bit permutations, synthesis of random 4-bit permutations, optimal synthesis of all 4-bit linear reversible circuits, synthesis of existing benchmark functions; we compose a list of the hardest permutations to synthesize, and show distribution of optimal circuits. We further illustrate that our proposed approach may be extended to accommodate physical constraints via reporting LNN-optimal reversible circuits. Our results have important implications in the design and optimization of reversible and quantum circuits, testing circuit synthesis heuristics, and performing experiments in the area of quantum information processing.

A fault tolerant, area efficient architecture for Shor's factoring algorithm

We optimize the area and latency of Shor's factoring while simultaneously improving fault tolerance through: (1) balancing the use of ancilla generators, (2) aggressive optimization of error correction, and (3) tuning the core adder circuits. Our custom CAD flow produces detailed layouts of the physical components and utilizes simulation to analyze circuits in terms of area, latency, and success probability. We introduce a metric, called ADCR, which is the probabilistic equivalent of the classic Area-Delay product. Our error correction optimization can reduce ADCR by order of magnitude or more. Contrary to conventional wisdom, we show that the area of an optimized quantum circuit is not dominated exclusively by error correction. Further, our adder evaluation shows that quantum carry-lookahead adders (QCLA) beat ripple-carry adders in ADCR, despite being larger and more complex. We conclude with what we believe is one of most accurate estimates of the area and latency required for 1024-bit Shor's factorization: 7659 mm 2 for the smallest circuit and 6 x 10 8 seconds for the fastest circuit.

Quantum Circuit Architecture

We present a method for optimizing quantum circuits architecture, based on the notion of a quantum comb, which describes a circuit board where one can insert variable subcircuits. Unexplored quantum processing tasks, such as cloning and storing or retrieving of gates, can be optimized, along with setups for tomography and discrimination or estimation of quantum circuits.

Towards optimization of quantum circuits

Abstract Any unitary operation in quantum information processing can be implemented via a sequence of simpler steps — quantum gates. However, actual implementation of a quantum gate is always imperfect and takes a finite time. Therefore, searching for a short sequence of gates — efficient quantum circuit for a given operation, is an important task. We contribute to this issue by proposing optimization of the well-known universal procedure proposed by Barenco et al. [Phys. Rev. A 52, 3457 (1995)]. We also created a computer program which realizes both Barenco’s decomposition and the proposed optimization. Furthermore, our optimization can be applied to any quantum circuit containing generalized Toffoli gates, including basic quantum gate circuits.

Quantum Computation as Geometry

Quantum computers hold great promise for solving interesting computational problems, but it remains a challenge to find efficient quantum circuits that can perform these complicated tasks. Here we show that finding optimal quantum circuits is essentially equivalent to finding the shortest path between two points in a certain curved geometry. By recasting the problem of finding quantum circuits as a geometric problem, we open up the possibility of using the mathematical techniques of Riemannian geometry to suggest new quantum algorithms or to prove limitations on the power of quantum computers.

Optimal two-qubit quantum circuits using exchange interactions

We give the optimal decomposition of a universal two-qubit circuit using Heisenberg exchange interactions and single qubit rotations. Tuning the strength and duration of the Heisenberg exchange allows one to implement ${(\mathrm{SWAP})}^{\ensuremath{\alpha}}$ gates. Our optimal circuit is constructed from only three ${(\mathrm{SWAP})}^{\ensuremath{\alpha}}$ gates and six single qubit gates. We show that three ${(\mathrm{SWAP})}^{\ensuremath{\alpha}}$ gates are not only sufficient, but necessary. Since six single-qubit gates are already known to be necessary, our implementation is optimal in gate count.

Realizing ternary quantum switching networks without ancilla bits

This paper investigates the synthesis of quantum networks built to realize ternary switching circuits in the absence of ancilla bits. The results we established are twofold. The first shows that ternary Swap, ternary Not and ternary Toffoli gates are universal for the realization of arbitrary $n\times n$ ternary quantum switching networks without ancilla bits. The second result proves that all $n\times n$ quantum ternary networks can be generated by Not, Controlled-Not, Multiply-Two, and Toffoli gates. Our approach is constructive. key words: ternary quantum logic synthesis, quantum circuit optimization, group theory.

Representation of Boolean quantum circuits as reed–Muller expansions

In this paper we show that there is a direct correspondence between Boolean quantum operations and certain forms of classical (non-quantum) logic known as Reed–Muller expansions. This allows us to readily convert Boolean circuits into their quantum equivalents. A direct result of this is that the problem of synthesis and optimization of Boolean quantum circuits can be tackled within the field of Reed–Muller logic.

Optimal quantum circuit synthesis from controlled-unitary gates

From a geometric approach, we derive the minimum number of applications needed for an arbitrary Controlled-Unitary gate to construct a universal quantum circuit. A new analytic construction procedure is presented and shown to be either optimal or close to optimal. This result can be extended to improve the efficiency of universal quantum circuit construction from any entangling gate. Specifically, for both the Controlled-NOT and Double-CNOT gates, we develop simple analytic ways to construct universal quantum circuits with three applications, which is the least possible.

Optimal quantum circuits for general two-qubit gates

In order to demonstrate nontrivial quantum computations experimentally, such as the synthesis of arbitrary entangled states, it will be useful to understand how to decompose a desired quantum computation into the shortest possible sequence of one-qubit and two-qubit gates. We contribute to this effort by providing a method to construct an optimal quantum circuit for a general two-qubit gate that requires at most 3 controlled-NOT (CNOT) gates and 15 elementary one-qubit gates. Moreover, if the desired two-qubit gate corresponds to a purely real unitary transformation, we provide a construction that requries at most 2 CNOT and 12 one-qubit gates. We then prove that these constructions are optimal with respect to the family of CNOT, $y$-rotation, $z$-rotation, and phase gates.

ACCELERATION OF QUANTUM ALGORITHMS USING THREE-QUBIT GATES

Quantum-circuit optimization is essential for any practical realization of quantum computation, in order to beat decoherence. We present a scheme for implementing the final stage in the compilation of quantum circuits, i.e. for finding the actual physical realizations of the individual modules in the quantum-gate library. We find that numerical optimization can be efficiently utilized in order to generate the appropriate control-parameter sequences which produce the desired three-qubit modules within the Josephson charge-qubit model. Our work suggests ways in which one can in fact considerably reduce the number of gates required to implement a given quantum circuit, hence diminishing idle time and significantly accelerating the execution of quantum algorithms.

QUANTUM SOFTWARE REUSABILITY

The design of efficient quantum circuits is an important issue in quantum computing. It is in general a formidable task to find a highly optimized quantum circuit for a given unitary matrix. We propose a quantum circuit design method that has the following unique feature: It allows to construct efficient quantum circuits in a systematic way by reusing and combining a set of highly optimized quantum circuits. Specifically, the method realizes a quantum circuit for a given unitary matrix by implementing a linear combination of representing matrices of a group, which have known fast quantum circuits. We motivate and illustrate this method by deriving extremely efficient quantum circuits for the discrete Hartley transform and for the fractional Fourier transforms. The sound mathematical basis of this design method allows to give meaningful and natural interpretations of the resulting circuits. We demonstrate this aspect by giving a natural interpretation of known teleportation circuits.

Physical optimization of quantum error correction circuits

Quantum error correcting codes have been developed to protect a quantum computer from decoherence due to a noisy environment. In this paper, we present two methods for optimizing the physical implementation of such error correction schemes. First, we discuss an optimal quantum circuit implementation of the smallest error-correcting code (the three bit code). Quantum circuits are physically implemented by serial pulses, i.e. by switching on and off external parameters in the Hamiltonian one after another. In contrast to this, we introduce a new parallel switching method that allows faster gate operation by switching all external parameters simultaneously. These two methods are applied to electron spins in coupled quantum dots subject to a Heisenberg coupling H=J(t) S_1*S_2 which can generate the universal quantum gate `square-root-of-swap'. Using parallel pulses, the encoding for three-bit quantum error correction in a Heisenberg system can be accelerated by a factor of about two. We point out that parallel switching has potential applications for arbitrary quantum computer architectures.