In this paper, a 25 Gbps inductorless optical receiver analog front-end is presented. The inverter-based modified Cherry-Hooper amplifier is proposed and adopted as main stage of the optical receiver to extend the bandwidth by alleviating Miller capacitance. The optimization of shunt-feedback transimpedance amplifier is implemented by improving the gain bandwidth product of main amplifier. In multi-stage limiting amplifier, the staggered active feedback technique is used to boost the deteriorated bandwidth. Fabricated in a 55 nm CMOS technology, the whole chip occupies an area of 770 μm × 800 μm, and core area is only 100 μm × 400 μm. The measured 3-dB bandwidth reaches 21.7 GHz, sufficient for 25-Gbps operation. For an input voltage of 3 mVp-p, the chip achieves a BER = 10−12 at 25-Gbps PRBS7, and 320 mV differential output voltage is delivered. From the supply voltage of 1.2 V, the test chip consumes the power of 56 mW and exhibits the power efficiency of 2.3 pJ/s.