Optical Interconnection Networks Research Articles

On the Minimization of Crosstalk Conflicts in a Destination Based Modified Omega Network

In a parallel processing system, Multi-stage Interconnection Networks (MINs) play a vital role in making the network reliable and cost effective. The MIN is an important piece of architecture for a multiprocessor system, and it has a good impact in the field of communication. Optical Multi-stage Interconnection Networks (OMINs) are the advanced version of MINs. The main problem with OMINs is crosstalk. This paper, presents the (1) Destination Based Modified Omega Network (DBMON) and the (2) Destination Based Scheduling Algorithm (DBSA). DBSA does the scheduling for a source and their corresponding destination address for messages transmission and these scheduled addresses are passed through DBMON. Furthermore, the performance of DBMON is compared with the Crosstalk-Free Modified Omega Network (CFMON). CFMON also minimizes the crosstalk in a minimum number of passes. Results show that DBMON is better than CFMON in terms of the average number of passes and execution time. DBSA can transmit all the messages in only two passes from any source to any destination, through DBMON and without crosstalk. This network is the modified form of the original omega network. Crosstalk minimization is the main objective of the proposed algorithm and proposed network.

An Energy-Efficient Optically Connected Memory Module for Hybrid Packet- and Circuit-Switched Optical Networks

Demands on future data centers and high-performance computing systems will require processor-memory interconnects with greater performance and flexibility than can be provided by existing electronic interconnects. The bandwidth density and bit-rate transparency offered by optical systems are uniquely suited to address these challenges facing memory interconnects. We, thus, investigate a hybrid packet- and circuit-switched optical interconnection network linking microprocessors with their associated main memory, which can simultaneously reduce memory access latency and improve energy efficiency performance. This novel hybrid approach allows low-bandwidth memory control data and small memory transactions to be efficiently transmitted as wavelength-striped optical packets, while long bursts of memory accesses are optically circuit switched. In this study, we experimentally demonstrate an optically connected memory system in which a microprocessor accesses multiple 80-Gb/s memory modules all-optically across a hybrid packet- and circuit- switched optical network. Error-free communication between the microprocessor and main memory is confirmed (bit-error rates less than 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> ) with the optical network providing low-memory access latencies. The overall memory system reduces energy consumption by 28%.

A Cost-Effective Architecture For Optical Multistage Interconnection Network

In this paper a new architecture for Optical Multistage Interconnection Networks (OMINs) has been proposed to avoid crosstalk problem. At the same time, the probablity of losing pass through an optical long connection path is reduced in this architecture. The new architecture is inherent form the standard OMIN by converting two switches of the network to one switch in each row. By reducing the number of switches in new architecture, the reduction in the execution time is considered. The modifying in the number of passes via the same low stage transformation is negligible. The ability of the new architecture to decrease cost and avoid crosstalk has been validated through simulations that show improvement in the network performance in terms of approximately 30% reduction in the execution time.

Optical interconnection networks with time slot routing

We propose the time slot routing, a novel routing scheme that allows for a simple design of interconnection networks. The simulative results show that the proposed scheme demonstrates optimal performance at the maximal uniform network load, and for uniform loads the network throughput is greater than for defl ection routing.

ONE-DIMENSIONAL PHOTONIC CRYSTAL SELECTIVE FILTERS DESIGN USING SIMULATED ANNEALING OPTIMIZATION TECHNIQUE

During the last decade, selective photonic crystal fllters have received much research interest in the flelds of nanotechnology and optical interconnection network. The main focus of this paper consists of an analysis and a synthesis of one-dimensional photonic crystal selective fllters. The optimization is performed by employing the simulated annealing algorithm. The fllters synthesis is obtained by acting on the Bragg grating layer widths. Simulated annealing is applied to solve the PhC-1D fllters synthesis problem in order to reduce the quadratic error and to obtain a desired transmission according to a Gaussian function deflned in advance by the user. Starting from the Maxwell's equations for dielectric nonmagnetic structure, we show the derivation of the Helmholtz equation and flnd its solution for 1D layered structure. In addition, the boundary conditions and equation transformation to set of linear equations which are solved using Cramer's method are described thoroughly. This mathematical technique is then applied for computation of the transmission spectra of 1D perfectly periodic structure and structures with difierent defects. These results can be easily applied for design of selective fllters.

ZeroX Algorithms with Free crosstalk in Optical Multistage Interconnection Network

Multistage interconnection networks (MINs) have been proposed as interconnecting structures in various types of communication applications ranging from parallel systems, switching architectures, to multicore systems and advances. Optical technologies have drawn the interest for optical implementation in MINs to achieve high bandwidth capacity at the rate of terabits per second. Crosstalk is the major problem with optical interconnections; it not only degrades the performance of network but also disturbs the path of communication signals. To avoid crosstalk in Optical MINs many algorithms have been proposed by many researchers and some of the researchers suppose some solution to improve Zero Algorithm. This paper will be illustrated that is no any crosstalk appears in Zero based algorithms (ZeroX, ZeroY and ZeroXY) in using refine and unique case functions. Through simulation modeling, the Zero based algorithm approach yields the best performance in terms of minimal routing time in and number of passes comparison to the previous algorithms tested for comparison in this paper.

Resilient Optically Connected Memory Systems Using Dynamic Bit-Steering [Invited

Resilience is becoming an increasingly critical performance requirement for future large-scale computing systems. In data center and high-performance computing systems with many thousands of nodes, errors in main memory can be a significant source of failures. As a result, large-scale memory systems must employ advanced error detection and correction techniques to mitigate failures. Memory devices are primarily designed for density, optimizing memory capacity and throughput, rather than resilience. A strict focus on memory performance instead of resilience risks undermining the overall stability of next-generation computers. In this work, we leverage an optically connected memory system to optimize both memory performance and resilience. A multicast-capable optical interconnection network replaces the traditional electronic bus between a processor and its main memory, allowing for a novel error-correction technique based on dynamic bit-steering. As compared to an electronically connected approach, we demonstrate significantly higher memory bandwidths and reduced latencies, in addition to a 700× improvement in resilience.

Energy-aware routing in hybrid optical network-on-chip for future multi-processor system-on-chip

With the development of Multi-Processor System-on-Chip (MPSoC) in recent years, the intra-chip communication is becoming the bottleneck of the whole system. Current electronic network-on-chip (NoC) designs face serious challenges, such as bandwidth, latency and power consumption. Optical interconnection networks are a promising technology to overcome these problems. In this paper, we study the routing problem in optical NoCs with arbitrary network topologies. Traditionally, a minimum hop count routing policy is employed for electronic NoCs, as it minimizes both power consumption and latency. However, due to the special architecture of current optical NoC routers, such a minimum-hop path may not be energy-wise optimal. Using a detailed model of optical routers we reduce the energy-aware routing problem into a shortest-path problem, which can then be solved using one of the many well known techniques. By applying our approach to different popular topologies, we show that the energy consumed in data communication in an optical NoC can be significantly reduced. We also propose the use of optical burst switching (OBS) in optical NoCs to reduce control overhead, as well as an adaptive routing mechanism to reduce energy consumption without introducing extra latency. Our simulation results demonstrate the effectiveness of the proposed algorithms.

Crosstalk Analysis for Microring Based Optical Interconnection Networks

Recently a new approach was proposed to tackle the wavelength non-uniformity problem of the silicon photonic ring technology. By lowering the Q value of the ring, the likelihood of finding a common operating wavelength can be significantly increased. But lowering Q will increase the crosstalk level in such a network. This crosstalk problem can be tackled with a generalized space dilation technique. Since crosstalk is a central issue of this approach, computing the crosstalk level accurately is critical for a microring-based photonic interconnect. Prior work on crosstalk analysis for interconnects based on directional couplers assumed that the extinction ratios are the same for the two switching states. But this is usually not the case for silicon photonic microrings. In this paper, we develop an analytical model for analyzing the crosstalk level in a microring-based optical interconnection network. The analytical approach presented in the paper can be used for studying the crosstalk problem in optical networks based on other optical switching technologies.

Optical Interconnection Networks Based on Microring Resonators

Optical microring resonators can be integrated on a chip to perform switching operations directly in the optical domain. Thus they become a building block to create switching elements in on-chip optical interconnection networks, which promise to overcome some of the limitations of current electronic networks. However, the peculiar asymmetric power losses of microring resonators impose new constraints on the design and control of on-chip optical networks. In this work, we study the design of multistage interconnection networks optimized for a particular metric that we name the degradation index, which characterizes the asymmetric behavior of microrings. We also propose a routing control algorithm to maximize the overall throughput, considering the maximum allowed degradation index as a constraint.

A Data Rate- and Modulation Format-Independent Packet-Switched Optical Network Test-Bed

Adopting high data rates and advanced modulation formats in optical interconnection networks will enable future computing systems to achieve greater performance and scalability. We experimentally demonstrate the data rate and modulation format independence of a 4 × 4 optical packet-switched network test-bed. Leveraging wavelength-division multiplexing, we show the transmission of multiwavelength 320-Gb/s optical packets, using 8 × 40-Gb/s wavelength-striped payloads. Both on-off keying (OOK) and differential-phase-shift-keying (DPSK) modulation formats are investigated. Optical packets are correctly routed through the network, and error-free operation is confirmed for all wavelengths with bit-error rates less than 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> . Best-case power penalties of 1 dB for OOK data and 0.52 dB for DPSK streams are obtained.

Guest Editorial

Guest Editorial

Power and scalability analysis of multi-plane optical interconnection networks

The scalability of current electrical interconnection networks will be soon limited by their power consumption and dissipation. To overcome such an issue, multi-plane optical interconnection networks have been proposed. Multi-plane networks are composed of a number of cards, each of them supporting a number of ports, interconnected through a passive optical backplane. Two switching domains are envisioned to be exploited allowing for flexible switching of data packets across all ports and cards. This study considers three different implementations that are representative of the multi-plane optical interconnection networks based on space and wavelength switching. The implementations differ from each other in the switching domain used. The aim of the work is to investigate the power consumption and scalability of the three implementations, based on state-of-the-art 40 Gb/s technology. The physical layer analysis and the power consumption assessment including both electronic and optical components indicate that the implementation can impact on the scalability as well as the power consumption. The arrayed waveguide gratings (AWG)-based implementation is found to suffer from scalability and power consumption issues. On the other hand, an implementation based on active switches shows an energy efficiency similar to the coupler-based implementation, but a four-fold scalability increase.

Trinary arithmetic and logic unit (TALU) using savart plate and spatial light modulator (SLM) suitable for optical computation in multivalued logic

Arithmetic logic unit (ALU) is the most important unit in any computing system. Optical computing is becoming popular day-by-day because of its ultrahigh processing speed and huge data handling capability. Obviously for the fast processing we need the optical TALU compatible with the multivalued logic. In this regard we are communicating the trinary arithmetic and logic unit (TALU) in modified trinary number (MTN) system, which is suitable for the optical computation and other applications in multivalued logic system. Here the savart plate and spatial light modulator (SLM) based optoelectronic circuits have been used to exploit the optical tree architecture (OTA) in optical interconnection network.

The Optical Chained-Cubic Tree interconnection network: Topological structure and properties

Interconnection networks with optical communication links outperform others using electronic communication links when the distance is long in terms of speed and power consumption. However, for short distances, electronic network topologies are preferred due to lower material cost requirements. As a result, hybrid network topologies were constructed to combine the benefits of both types of network topologies, such as Optical Transpose Interconnection System (OTIS). This paper presents a new hybrid interconnection network topology, which is constructed using both optical and electronic links, called the Optical Chained-Cubic Tree (OCCT). This new OCCT topology is based on the Chained-Cubic Tree (CCT) interconnection network and is designed to cope with both types of binary trees; full and complete. Also, the topological properties of OCCT in terms of diameter, connectivity, degree, bisection width, and cost are presented and compared with OTIS-Mesh and CCT interconnection networks.

A Challenge for Routing Algorithms in Optical Multistage Interconnection Networks

Problem statement: A class of dynamic interconnection networks is Multistage Interconnection Networks (MINs) that connects input devices to output devices through a number of switch stages. MINs have assumed importance in recent years; because of their cost-effectiveness. Optical MINs are one type of MINs that have large transmission capacity in the communication networks. There is a major problem in Optical MIN that is crosstalk, which is caused by coupling two signals within a switching element. Approach: To avoid crosstalk in Optical MINs many algorithms have been proposed by many researchers that we review applying five routing algorithms and scheduling them in the Optical MINs. Results: The comparative results of routing algorithms show affective of avoiding crosstalk in number of passes and execution time for different algorithm. Conclusion: The challenge between these routing algorithms is thoroughly investigated, by applying them on Optical MIN and showing which algorithm has better performance to avoid crosstalk.

Component Reducing and Routing Algorithm of Double-Layer Network with Rearranging the Channel Allocation

Recently, there has been a growing demand for communication systems. The implementation of optical multistage interconnection networks (MINs) is more and more noticed. In our previous study, we have presented a modified version of holographic optical switches (HOSs). The double-layer network constructed by the modified version of HOSs and rearranged the channels allocation, the number of electro-optic halfwave plates (EOHWPs) could be significantly decreased from 2N^2-2N to 2Nlog2N. We propose a routing algorithm for the novel DLN and the time complexity of the routing algorithm is O (1).

Building Data Centers With Optically Connected Memory

Future data centers will require novel, scalable memory architectures capable of sustaining high bandwidths while still achieving low memory access latencies. Electronic interconnects cannot meet the challenges presented by the need for multi-terabit off-chip memory data paths. In this work, the electronic bus between main memory and its host processor is replaced with a circuit-switched optical interconnection network. We investigate the impact of our optically connected memory system on large-scale architectures and experimentally validate the protocol using field-programmable gate array based processor nodes and a custom-designed memory controller. The processor communicates all-optically with multiple synchronous dynamic random access memory nodes using 4 × 2.5-Gb/s wavelength-striped payloads, operating error free with bit-error rates less than 10-12.

Energy-Efficient Error Control for Tightly Coupled Systems Using Silicon Photonic Interconnects

Future computer systems will require new levels of computing power and hence new levels of core and chip densities. Because of constraints on power and area, optical interconnection networks will play a critical role in these new systems. In this paper, we describe the macrochip, a multi-chip node with an embedded silicon photonic interconnection network that consists of thousands of optical links. For such a large-scale wavelength division multiplexing optical network, we show how to use an energy-efficient error control scheme employing variable-length cyclic redundancy check codes to achieve a desirable residual bit error rate (BER) of 10−23 for reliable system operation with the individual link BER at 10−12 or higher. We use a discrete-event network simulation of the macrochip using uniform random traffic to show that our scheme incurs minimal impact on performance compared to a perfect system with no error control. Using link level energy efficiency and network throughput analysis, we estimate and report network level energy efficiency using the metric of energy per useful bit.

A Scalable Space–Time Multi-plane Optical Interconnection Network Using Energy-Efficient Enabling Technologies [Invited

This paper presents an energy-efficient multi-plane optical interconnection network to interconnect servers in a data center. The novel architecture uses the time domain to individually address each port within a card and the space domain to address each card. Optical enabling technologies passively time-compress serial packets by exploiting the wavelength domain and perform a broadcast-and-select to a destination card with minimum power dissipation. Scalability of both the physical layer and the overall power dissipation of the architecture is shown to be enhanced with respect to the existing interconnection network architectures based on space and wavelength domains. The space-time network architecture is scalable up to 216 ports with space-switches exhibiting energy efficiency of the order of picojoules per bit, thanks to the self-enabled semiconductor-optical-amplifier-based space-switches.