Integer Operations Research Articles

THE CONCEPT OF PERFORMING THE ADDITION OPERATION IN THE SYSTEM OF RESIDUAL CLASSES

The subject of the article is the development of a method for implementing the arithmetic operation of adding the residuals of numbers, which are represented in the system of residual classes (RNS). This method is based on the use of positional binary adders. The purpose of the article is to improve the performance of computer systems (CS) and their components by introducing new ways of organizing calculations based on the use of RNS. Tasks: to analyze and identify the shortcomings of the existing number systems that are used in the construction of computer systems and components; explore possible ways to eliminate the identified deficiencies; explore the structure of binary positional adders, taking into account the scheme for adding two residues of numbers modulo RNS; to develop a method for constructing adders modulo RNS, which is based on the use of a set of binary single-digit positional adders. Research methods: methods of analysis and synthesis of computer systems, number theory, coding theory in RNS. The following results are obtained. The paper shows that one of the promising ways to improve the performance of the CS is the use of RNS. The mathematical basis of RNS is the Chinese remainder theorem, which states that an integer operation on one large modulus can be replaced by a set of operations on coprime small modules. This opens up broad prospects for optimizing calculations. On the one hand, it is possible to significantly simplify the performance of complex and cumbersome calculations, including on low-resource computing platforms. On the other hand, calculations for different modules can be performed in parallel, which increases the performance of the CS. Conclusions. The article considers the operation of adding two numbers. This operation is the basis for both traditional positional number systems and RNS, i.e. forms the computational basis of all existing CS components. A new method for calculating the sum of the residuals of numbers modulo an arbitrary is proposed, and examples are given that clearly demonstrate the effectiveness of the proposed method. This method can be used in various computer applications, including for improving computing performance, ensuring fault tolerance, etc.

Non-digital card game and year 8 students’ performance in integers

Understanding integers is fundamental in enhancing students’ performance in other mathematical concepts. However, the majority of year 8 students in the government schools in Brunei Darussalam have inadequate understanding leading to unsatisfactory performance in the operations of integers. Despite this challenge, there has not been any systematic empirical attempt to provide an intervention to enhance students’ performance. In this action research study, we provided a non-digital card game intervention to assess its efficacy in improving the performance of year 8 students in the operations of integers. A total of 39 students were purposively selected. Data were collected through pre-test and post-test and analyzed with the Wilcoxon-signed rank test and the paired sample t-test. By comparing pre-test and post-test scores, the non-digital card game intervention significantly improved the performance of students in the operations of integers. Approximately 18.8% of students’ performance was accounted for by the non-digital card game intervention provided. This study concluded that a non-digital card game can be a helpful tool in teaching and learning of the operations of integers.

A Low-Latency Divider Design for Embedded Processors

Division is generally regarded as a low-frequency, high-latency operation in integer operations. Division is also the operation that stalls the processor pipeline most frequently. In order to improve the overall performance of embedded processors, a low-delay divider for embedded processors was designed. Based on the non-restoring algorithm, the divider uses a compound adder to execute addition and subtraction simultaneously and reduces the iteration path delay. By shifting the operands to align the most effective bits, the divider dynamically adjusts the number of iteration cycles to reduce the average number of cycles in the division process. The divider design was simulated by Modelsim and implemented on a FPGA board for verification. Synthesized in a Semiconductor Manufacturing International Corporation (SMIC) 65 nm Low Leakage process, the achieved frequency of the design was up to 500 MHz and the area cost was 5670.36 μm2. Compared with other dividers, the proposed divider design can reduce the delay of single iteration by up to 45.3%, save the average number of iteration cycles by 20–50%, and save the area by 23.3–86.1%. Compared with other dividers implemented on FPGA, it saves LUTs by 36.47–59.6% and FFs by 67–84.28%, runs 2–6.36 times faster. Therefore, the proposed design is suitable for embedded processors that require low power consumption, low resource consumption, and high performance.

Capturing Strategies and Difficulties in Solving Negative Integers: A Case Study of Instrumental Understanding

Background : Many elementary school students have made mistakes in solving negative integer problems, especially for students with instrumental understanding. Studies that focus on strategies and difficulties faced by students can be a solution to finding student weaknesses so that they achieve a better level of understanding. Objectives : The objective of this study was to classify cases of fifth-grade elementary school students with instrumental understanding in solving negative integer tasks with a focus on strategies and difficulties faced with number line models. Design : This study uses a case study research design. Setting and Participants : Fifth-grade elementary school students who have studied the material on negative integer operations in Sukodono, Indonesia, were included. One of the students with the most varied instrumental understanding and representation strategy was chosen as a case study. Data collection and analysis : Qualitative data collection was done by providing a number line model task and interview instructions. Data analysis was performed by comparative analysis, namely, by comparing all data collected, including the transcribed audio and video recordings. Results : Researchers found various types of strategies that experienced difficulties to cognitive completion by students with instrumental understanding, along with difficulties in solving number problems. Conclusions : The implications of this study are very useful for further research and lifelong learning practices, especially in dealing with elementary school students who have difficulty constructing knowledge and the concept of negative integer arithmetic operations.

Learner-generated drawings by students with mathematical learning difficulties in finishing open number sentences

Although MLD students do not have good mathematical performance in completing addition and subtraction operations of integers, MLD students have suggestive ideas in the form of drawings produced in solving open number sentences questions. This study aims to classify the types and identify changes in the drawing produced by MLD students in solving open number sentences questions. This research method is qualitative with a micro generic study approach to understand students' thinking individually and explore drawing changes in solving open number sentences questions between sessions. The research subjects were 2 out of 20 MLD grade 5 elementary school students who produced the most varied drawings in solving open number sentences questions. Data collection techniques used are giving questions and interviews. The results showed that MLD students produced: discrete object drawings by focusing on the cardinality of the quantity of a number; transitions from objects to the number line by focusing on the magnitude of numbers; partitioning the number line using magnitude reasoning; number sentences; and others using verbal reasoning. Changes in the drawings produced by MLD students between sessions indicate the development of students' understanding towards a better direction in interpreting symbolic representations to visual representations. The results of this study contribute to the theory that although MLD students have low mathematical performance. However, MLD students can produce variations and changes in drawings with rich mathematical idea information representing integer operations.

Comparative analysis of <i>DDA algorithm</i> and <i>Bresenham algorithm</i>

The straight line segment is the basic graphic element, and its generation algorithm has a great influence on the generation speed of complex graphics. In the past, the efficiency of integer operation is higher than that of floating-point operation, and the complexity of DDA algorithm is mainly floating-point addition and rounding operation, and the complexity of Bresenham algorithm is mainly integer operation through further improvement. Therefore, it is clearly explained in the existing computer graphics textbooks that the efficiency of Bresenham algorithm is higher than that of DDA algorithm. Through experiments, endpoints of 1,000 to 10,000 straight line segments are randomly generated, and the runtime of Bresenham algorithm and DDA algorithm is compared. It is found that the efficiency of DDA algorithm is higher than that of Bresenham algorithm. Then, by combining the comparison of the efficiency of modern CPU for addition, multiplication and division of integer and floating point with the improvement of floating-point computing hardware and instruction set in modern CPU, the computer's floating-point computing capabilities have been greatly improved, thus making the DDA algorithm more efficient than the Bresenham algorithm.

A Low-Cost Fully Integer-Based CNN Accelerator on FPGA for Real-Time Traffic Sign Recognition

Traffic sign recognition (TSR) technology allows the vehicle to recognize road signs through a camera and use it for driving. For traffic safety, TSR is one of the core technologies constituting advanced driver assistance systems (ADAS), and several researches have been studied. The advent of convolutional neural networks (CNNs) has opened up new possibilities in automotive environments, especially for ADAS. However, deploying a real-time TSR application in resource-constrained ADAS is challenging because most CNNs require high computing resources and memory usage. To address this problem, some works have been studied to consider optimization in embedded platforms, but existing works used many hardware resources or showed low computation performance. In this paper, we propose a low-cost CNN-based real-time TSR hardware accelerator. Firstly, we extend a novel hardware-friendly quantization method to reduce computational complexity. The quantization method can reconstruct the CNN so that all operations, including the skip connection path of residual blocks, use only integer arithmetic and reduce the computational overhead by replacing the quantization affine mapping process with a shift operation. Secondly, the proposed hardware accelerator applied two parallelization strategies to balance real-time inference and resource consumption. In addition, we present a simple and effective hardware design scheme that handles the skip connection path of residual blocks. This design scheme can optimize the dataflow of the skip connection path and reduce additional internal memory usage. Experimental results show that the reconstructed fully integer-based CNN only requires 24M integer operations (IOPs) and possesses a model size of 0.17MB. Compared with the previous work, the proposed CNN model size was reduced by ×105, and the number of operations was reduced by ×58. In addition, the proposed CNN can achieve a TSR accuracy of 99.07%, which is the highest accuracy among CNN-based TSR works implemented on embedded platforms. The proposed hardware accelerator achieves a computation performance of 960 MOPS and a frame rate of 40 FPS when implemented on a Xilinx ZC706 SoC. Consequently, this work improves by ×11.87 and ×36.7 on computation performance and frame rate compared to the previous work.

Elementary school students reflection: Didactical design analysis on integer and fraction operations on mathematical concepts with Sundanese ethnomathematics learning

Elementary school students reflection: Didactical design analysis on integer and fraction operations on mathematical concepts with Sundanese ethnomathematics learning

Accelerating Convolutional Neural Network-Based Hyperspectral Image Classification by Step Activation Quantization

Convolutional neural networks (CNNs) have achieved excellent feature extraction capabilities in remotely sensed hyperspectral image (HSI) classification. This is due to their ability to learn representative spatial and spectral features. However, it is difficult for conventional computers to classify HSIs quickly enough for practical use in many applications, mainly because of the large number of calculations and parameters needed by deep learning-based methods. Although several weight quantization methods achieved remarkable results in network compression, the network acceleration effect is still not significant because a full exploration of the potential of network acceleration brought by network weight quantization is still absent from the literature. In this article, a new step activation quantization method is proposed to constrain the input of the network layer of the CNN so that the data can be represented by low-bit integers. As a result, floating-point operations can be replaced with integer operations to greatly accelerate the forward (inference) step of the network. Specifically, nonlinear uniform quantization is adopted in this work to restrain the input of the CNN in the forward inference of the step activation quantization layer, and two functions (constant and tanh-like) are used in the backpropagation step to avoid gradient vanishing and noise. Our newly proposed step activation quantization acceleration method is applied to a CNN for HSI with two well-known benchmark data sets and the experimental results demonstrate that the proposed method is very effective in terms of both memory savings and computation acceleration, with only a slight decrease in classification accuracy. Specifically, our method reduces memory requirements in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$13.6\times $ </tex-math></inline-formula> and obtains around <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10\times {}$ </tex-math></inline-formula> speedup with regard to the original real-valued network version.

An Analysis of the Ability to Understand Mathematical Concepts of Middle School Students in Completing Integer Operations

Understanding mathematical concepts is a crucial skill for students to possess because it will make it easier for students to learn and master concepts in mathematics. This study aimed to describe the ability to understand mathematical concepts of junior high school students in solving integer arithmetic operations. This type of research was descriptive qualitative. The subjects in this study were seventh-grade students in one of the public junior high schools in Purworejo district in the 2020/2021 academic year with a good understanding. The technique of selecting the subject was purposive and snowball. The data analysis technique employed was the analysis technique of Miles &amp; Huberman; data reduction, data presentation, and conclusion drawing. The results of this study indicated that students' understanding of mathematical concepts in completing arithmetic operations were as follows; students could restate a concept in writing, students could provide examples and not examples of a concept they have learned, students could use and choose certain operations in solving mathematical problems, students could not present concepts in the form of mathematical representations in the form of pictures, students could not classify objects according to certain properties according to the concept, and students could not apply the concept algorithmically to problem-solving.

Peningkatan Kemampuan Operasi Hitung Siswa Melalui Bimbingan Belajar dan Lomba Cerdas Cermat Di Desa Simandraolo

The COVID-19 outbreak had a major impact on the world of education, so the government decided to conduct online learning as an effort to break the chain of the spread of Covid-19. Online learning involves elements of technology and experiences obstacles when learning, including the network is not smooth, lack of knowledge, to the lack of student participation when learning online. This has an impact on student learning outcomes. Elementary schools in Simandraolo Village conduct online learning, especially mathematics, most students have difficulty in performing arithmetic operations such as addition, subtraction, multiplication and division of integers and fractions. Based on these problems, it is necessary to conduct tutoring activities for students so that students can be helped in overcoming the problems they experience and carry out Smart Contest activities so that students are more motivated in learning. This activity is divided into several stages as follows: preliminary stage, action stage, final stage. Based on the tutoring activities and the quiz competition, it can be concluded that students' difficulties can be overcome by conducting tutoring and quiz competitions. Based on this service activity, it is recommended that students be more active in learning. Doing exercises that are continuous and repeated so that the concepts of integer and fractional operations can be permanently embedded in the mind.

Assignment Methods Accompanied by Feedback on Students' Mathematics Learning Outcomes in Solving Integer Operation Problems

The purpose of this study was to determine the difference in the average learning outcomes of students who were taught the assignment method with feedback and those taught the assignment method without feedback in solving integer operations for class VII students of SMP Negeri 7 Baubau. This research is a quasi-experimental research (quasy experimental) with a quantitative approach. The population used in this study were all Grade VII students of SMP Negeri 7 Baubau who were spread in 3 parallel classes with a total of 93 people. To determine which class is the experimental class and the control class, the three classes are drawn by lot. Selected as the experimental class is class VII B and class VII A as control class. This research was conducted in the odd semester of the 2019/2020 school year. The instrument in this study was a test of mathematics learning outcomes. Data were analyzed by prerequisite test which consisted of normality test and data homogeneity test. The results showed that there was a difference in the average learning outcomes of students who were taught the assignment method with feedback and those taught the assignment method without feedback in solving integer operations for class VII students of SMP Negeri 7 Baubau. This is indicated by the value of t_count = 4.310 and the value of sig. (2-tailed) 0.000 &lt; 0.05, meaning that H0 is rejected.

Formal verification of high-level synthesis

High-level synthesis (HLS), which refers to the automatic compilation of software into hardware, is rapidly gaining popularity. In a world increasingly reliant on application-specific hardware accelerators, HLS promises hardware designs of comparable performance and energy efficiency to those coded by hand in a hardware description language such as Verilog, while maintaining the convenience and the rich ecosystem of software development. However, current HLS tools cannot always guarantee that the hardware designs they produce are equivalent to the software they were given, thus undermining any reasoning conducted at the software level. Furthermore, there is mounting evidence that existing HLS tools are quite unreliable, sometimes generating wrong hardware or crashing when given valid inputs. To address this problem, we present the first HLS tool that is mechanically verified to preserve the behaviour of its input software. Our tool, called Vericert, extends the CompCert verified C compiler with a new hardware-oriented intermediate language and a Verilog back end, and has been proven correct in Coq. Vericert supports most C constructs, including all integer operations, function calls, local arrays, structs, unions, and general control-flow statements. An evaluation on the PolyBench/C benchmark suite indicates that Vericert generates hardware that is around an order of magnitude slower (only around 2× slower in the absence of division) and about the same size as hardware generated by an existing, optimising (but unverified) HLS tool.

The Use of Number Tower Media to Improve Intelligence Count Operation Ability in Deaf Students

The purpose of this study was to determine the use of the Tower of Numbers media in improving the ability to count integer operations for deaf students. The research method used is classroom action research or abbreviated as CAR. The subjects in this study were 4 students with hearing impairments at the Special School, in Subang Indonesia. The results of using the Integer Tower media are very easy and helpful for students in solving math questions in addition and subtraction of integers with results below 15. It can be seen that the average result of the first cycle is 43.75, the second cycle is 56.67, and the third cycle is 66.67. There is an increase of 20.75% from cycle I to cycle III which indicates an increase in the ability to count integer operations through number tower media for deaf students. This is because using the Number Tower media makes it easier for students to complete arithmetic operations on integers. The number tower media is considered by teachers to be used in learning mathematics with integer arithmetic operations and can be used for normal students and students with special needs.

Complex dynamics of multi strain TB model under nonlocal and nonsingular fractal fractional operator

Researchers have recently begun to use fractal fractional operators in the Atangana–Baleanu sense to analyze complicated dynamics of various models in applied sciences, as the Atangana–Baleanu operator generalizes the integer and fractional order operators. To analyze the complex dynamics of the multi-strain TB model, we use the AB-fractal fractional operator. We use the Banach fixed point theorem to ensure that at most one solution exists to the model. Further, the Ulam–Hyers type stability of the model is investigated with the help of functional analysis. The Adams–Bashforth approach is used to get numerical results for the proposed model. The analysis of the chaotic behavior of the proposed TB model was missing in the literature. Therefore, for different values of fractional and fractal order, we study the nonlinear dynamics and chaotic behavior of the obtained results of the proposed model.

Analisis Hambatan Belajar Pada Materi Pecahan

The basic concepts that students have in mathematics need more attention because these basic concepts will have an influence in understanding other mathematical concepts at a higher level. One of the basic concepts in mathematics is the concept of fractions. The concept of fractions was chosen in this study because of several things, first, fractions are an important concept in mathematics, second, the concept of fractions is one of the first abstract concepts that students learn in mathematics, and third, there are still many students who make mistakes when working on problems related to fractions. This study used a qualitative method with a case study design and involved 31 students of grade 7 junior high school in Bandung district. The triangulation technique used in this study is observation, tests, and interviews. The results showed that three were learning obstacle that was found by students including, 1) Ontogenic obstacle which is psychological, where students had weak motivation when learning the concept of fractions, 2) didactical obstacle, where students only gathered on procedural knowledge when learning the concept of fraction, and 3) epistemological obstacle, where there is a limited understanding of students regarding the operations of counting integers with fractions

Two-Server Delegation of Computation on Label-Encrypted Data

Catalano and Fiore propose a scheme to transform a linearly-homomorphic encryption into a homomorphic encryption scheme capable of evaluating quadratic computations on ciphertexts. Their scheme is based on the linearly-homomorphic encryption (such as Goldwasser-Micali, Paillier and ElGamal) and need to perform large integer operation on servers. Then, their scheme have numerous computations on the servers. At the same time, their scheme cannot verify the computations and cannot evaluate more than degree-4 computations. To solve these problems, we no longer use linearly-homomorphic encryption which based on number theory assumptions. We use label and pseudorandom function to encrypt message, which significantly reduce the computations on the servers and enable us to use homomorphic MACs technology to realize verifiable computations naturally. We also extend the method to construct $d$-server schemes, which allow the client to delegate degree-$d$ computations on outsourced data.

Identity-Based Linkable Ring Signature on NTRU Lattice

Although most existing linkable ring signature schemes on lattice can effectively resist quantum attacks, they still have the disadvantages of excessive time and storage overhead. This paper constructs an identity-based linkable ring signature (LRS) scheme over NTRU lattice by employing the technologies of trapdoor generation and rejection sampling. The security of this scheme relies on the small integer solution (SIS) problem on NTRU lattice. We prove that this scheme has unconditional anonymity, unforgeability, and linkability under the random oracle model (ROM). Through the performance analysis, this scheme has a shorter size of public/private keys, and when the number of ring members is small (such as N ≤ 8 ), this scheme has a shorter signature size compared with other existing latest lattice-based LRS schemes. The computational efficiency of signature has also been further improved since it only involves multiplication in the polynomial ring and modular operations of small integers. Finally, we implemented our scheme and other similar schemes, and it is shown that the time for the signature generation and verification of this scheme decreases roughly by 44.951% and 33.503%, respectively.

Algebraic Construction of Structurally Shaped Polar Codes

Shaped polar codes were recently proposed to improve the spectral efficiency of polar coded modulation, based on probabilistic shaping. The key principle for them is to adjust the probability of occurrence of 1's in each codeword by introducing the shaping bits, which makes the distribution of modulated symbols close to the Gaussian distribution. But, they have a serious problem from a practical viewpoint, since additional polar decoding is required to determine the shaping bits. In this paper, we investigate an algebraic approach to the design of structurally shaped polar codes. We first select a shaping set in an algebraic and systematic way and determine the shaping bits by using simple binary and integer operations without any additional polar decoding. We then propose a method to construct structurally shaped polar codes, and analyze their shaped probability in an approximate way. Finally, we present the encoding and decoding procedures for the proposed shaped polar codes. Numerical results show that the proposed shaping scheme has similar performance than the conventional shaping scheme regardless of whether cyclic redundancy check is employed, while the former can be implemented in an extremely simpler way than the latter.

Instruction Roofline: An insightful visual performance model for GPUs

AbstractThe Roofline performance model provides an intuitive approach to identify performance bottlenecks and guide performance optimization. However, the classic FLOP‐centric approach is inappropriate for the emerging applications that perform more integer operations than floating point operations. In this article, we reintroduce our Instruction Roofline Model on NVIDIA GPUs and expand our evaluation of it. The Instruction Roofline incorporates instructions and memory transactions across all memory hierarchies together, and provides more performance insights than the FLOP‐oriented Roofline Model, that is, instruction throughput, stride memory access patterns, bank conflicts, and thread predication. We use our Instruction Roofline methodology to analyze eight proxy applications: HPGMG from AMReX, Matrix Transpose benchmarks, ADEPT from MetaHipMer's sequence alignment phase, EXTENSION from MetaHipMer's local assembly phase, CUSP, cuSPARSE, cudaTensorCoreGemm, and cuBLAS. We demonstrate the ability of our methodology to understand various aspects of performance and performance bottlenecks on NVIDIA GPUs and motivate code optimizations.