In integrated neural signal monitoring systems, pseudo resistor (PR) is widely used to form very large time constant filters, due to its large impedance within an acceptable die area. However, its linearity (the dependency of the resistance to applied voltage) and impedance are limited by the nonlinear MOS transistors in weak inversion, and suffers from process, voltage and temperature (PVT) variations. In this brief, a PR bootstrapped by reusing the operational transconductance amplifier-capacitor (OTA-C) filter is presented, it substantially increases the impedance and linearity to dynamically support lower frequency neural signal applications. It has no need for extra bias scheme on the gate or bulk, which decreases the circuit complexity, die area and power consumption. The proposed circuit implemented in a 0.18- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS process occupies an area of 0.026 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , the impedance of the bootstrapped PR is approximately 94 G <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega $ </tex-math></inline-formula> , and the high-pass cut-off frequency is reduced to 0.5 mHz.
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