Silicon based embedded devices are susceptible to hardware attacks viz.: side channel attacks and fault injection attacks. Fault injection attack is an emerging field affecting security concerns related to semiconductor industry. An adversary by manipulating hardware vulnerabilities of silicon devices can easily get access to secret information not intended for it. Semiconductor industry needs a solution which is based on detection and mitigation of fault injection attacks since this category of hardware attack proves to be more dangerous due to its trait of easy conduction and less expertise needed for performing such attacks. Detection of attacks is one of the important factors to be considered for hardware engineer to mitigate a number of largest challenges and complexities associated with hardware attacks. Existing detection techniques are complex and require post si calibration which proves to be less efficient system. Also fewer techniques are available which detects both types of voltage fault injection attacks (positive /negative). To address these drawbacks this paper presents novel voltage fault injection detection technique which is based on op-amp circuits and designed using cadence 180nm technology node. Simulated results show detection of both types of voltage fault injection attack viz.: positive and negative. Further efficiency of detector circuit is tested by changing parameters like TW, TF and TP known as glitch width, glitch frequency and glitch period respectively.