One-step Rapid Thermal Annealing Research Articles

Properties of a Ni-FUSI gate formed by the EBV method and one-step RTA

Nickel fully silicided (Ni-FUSI) gate material has been fabricated on a HfO2 surface to form a Ni-FUSI gate/HfO2/Si/Al (MIS) structure by using an ultra-high vacuum e-beam evaporation (EBV) method followed by a one step rapid thermal annealing (RTA) treatment. X-ray diffraction (XRD) and Raman spectroscopy were used to reveal the microstructures and electrical properties of the MIS structure. Results show that a one step post RTA treatment is enough to promote the full reaction of nickel silicide, compared with multiple RTA treatments. Furthermore, the HfO2 gate dielectric film is sensitive to heat treatment, and multiple RTA treatments can damage the electrical properties of the HfO2 film rather than improve them. By optimization of the sample fabrication technique, the MIS capacitor produces good high-frequency capacitance-voltage curves with a hysteresis of 30 mV, a work function of about 5.44–5.53 eV and leakage current density of only 1.45 × 10−8 A/cm2 at −1 V gate bias.

Effect of different annealing methods on ferroelectric properties of 0.95Pb(Sc 0.5Ta 0.5)O 3–0.05PbTiO 3 thin films

0.95Pb(Sc 0.5Ta 0.5)O 3–0.05PbTiO 3 thin films were prepared on LaNiO 3/SiO 2/Si substrate by radio frequency magnetron sputtering, and the films were annealed subsequently with repeated many times by two approaches: normal one-step rapid thermal annealing and innovative two-steps rapid thermal annealing. X-ray diffraction demonstrates that all the films were preferred (1 0 0) oriented and an appropriate repeat of annealing process can enhance perovskite phase of the films. Scanning electron microscopy suggests that the films treated by two-steps rapid thermal annealing show crack-free, uniform size grains and dense microstructure. Measurement of remnant polarization and leakage current dependence of electric field confirms that the films treated by two-steps rapid thermal annealing exhibit better ferroelectric properties than the films treated by one-steps rapid thermal annealing. The results reveal that microstructure plays an important role in enhanced ferroelectric properties of the 0.95Pb(Sc 0.5Ta 0.5)O 3–0.05PbTiO 3 thin films.

The Formation of p-Type ZnO Films by Thermal Diffusion from the Low Energy, High Dose Phosphorus-Implanted Si Substrate

The p-type ZnO film is obtained out of thermal diffusion of phosphorus (P) atoms from the low energy, high dose implanted Si substrate through rapid thermal annealing (RTA). Many nonactivated P atoms exist on the surface of the shallow-implanted Si substrate and easily out-diffuse into the ZnO films at lower RTA temperatures. The concentration of the p-type ZnO reached . The p-ZnO/n-Si heterojunction was fabricated using the one-step RTA process. This method offers various choices of dopants with low energy, high dose implanting into silicon without considering the restriction of the substrate.

Activation of Mg-doped P-GaN by using two-step annealing

One- and two-step rapid thermal annealing (RTA) for activating Mg-doped p-type GaN films had been performed to compare with conventional furnace annealing (CFA). The two-step annealing process consists of two annealing steps: the first step is performed at 750°C for 1min and the second step is performed at 600°C for 5min in pure O2 or air ambient. It is found that the samples annealed in air ambient exhibit poor electrical properties as compared to those annealed in pure O2. Compared to one-step RTA annealing and CFA annealing, the samples with two-step annealing exhibit higher hole concentration and lower resistivity. This means that the two-step annealing is a powerful method to enhance the electrical performance of Mg-doped p-type GaN films. Similar results were also evidenced by photoluminescence (PL) measurement. Possible mechanism was confirmed by secondary ion mass spectrometry analysis.

Reduction of Leakage and Low-Frequency Noise in MOS Transistors Through Two-Step RTA of NiSi-Silicide Technology

A two-step rapid thermal annealing (RTA) nickel salicidation process was employed to fabricate 0.1-mum gate length CMOS transistors. Excess salicidation, common in the conventional one-step RTA NiSi process, is effectively suppressed by this approach, which is confirmed by transmission electron microscopy (TEM) images. More improvements due to two-step NiSi are observed in NMOS than in PMOS transistors: The n+-p junction diode with two-step NiSi exhibits lower reverse leakage and higher breakdown voltage than the one-step silicided diode. For the first time, it is found that two-step NiSi NMOS exhibits significant reduction in off-state leakage (~5times) and low-frequency noise (up to two orders of magnitude) over one-step NiSi NMOS, although there is not much difference in PMOS transistors

Post-annealing effects on shallow-junction characteristics caused by 20 keV BGe molecular ion implantation

This study examines the post-annealing-dependent behaviors of the shallow junction produced by implanting 1015cm−2 20keV BGe ions into n-type 〈100〉 silicon specimens. Post-annealing treatments consisted of one- and two-step annealing including both furnace annealing (FA) and rapid thermal annealing (RTA). Comparison of the one-step FA at 550°C and the one-step RTA at 1050°C revealed that boron depth profiles were slightly diffused in the former but exhibited considerable transient-enhanced diffusion (TED) in the latter. However, both the one-step FA- and RTA-annealed germanium depth profiles barely diffused, while the latter diffusing slightly deeper than the former. The optimum value of junction depth (xj) times sheet resistance (Rs) was obtained with one-step FA at 550°C for 1h. The two-step annealing (FA at 550°C and RTA at 1050°C) results showed that the RTA-induced TED in the boron depth profiles could be effectively retarded only when FA took place for more than 3h. Again, germanium depth profiles are also barely diffused while the corresponding TEDs were larger than those in one-step FA but smaller than those in one-step RTA. Furthermore, the two-step annealing of FA at 550°C for 3h followed by RTA at 1050°C for 30s is suggested when attempting to obtain an optimum value of xjRs.

Study of titanium silicide formation using spike anneal for integrated chip manufacturing

The use of spike anneal in titanium salicide process was studied. The area dependence of C49-to-C54 TiSi2 phase transformation was reduced for deep submicron poly-Si gate by having spike anneal during [rapid thermal annealing (RTA)] RTA1 without the use of preamorphizing implant or implant through metal. It is believed that the spike anneal during RTA1 resulted in varying amounts of C54–TiSi2, which then acts as nuclesus that grows during RTA2. Results showed that the spike anneal in RTA1 did not increase the gate to source/drain leakage current for the spike anneal temperature investigated at less than 900 °C. Results, also, show that a one-step RTA Salicide process is possible for larger linewidth devices using spike anneal.

Effects of a two-step rapid thermal annealing process on Mg-doped p-type GaN films grown by metalorganic chemical vapor deposition

A two-step rapid thermal annealing (RTA) process is proposed in order to improve the electrical properties, the crystal quality, and the surface roughness of Mg-doped p-type GaN films. In the two-step RTA process, the first low temperature step (600 °C) with a long annealing time (5 min) was followed by the second high temperature (950 °C) step with a short annealing time. These results show that the two-step RTA process significantly improves electrical properties and reduces the surface roughness of p-GaN compared to the one-step RTA process.

Cobalt disilicide formed by rapid thermal annealing and throughmetal arsenic implantation

Cobalt disilicide CoSi2 of a specific resistivity of 23 μω was formed by the solid phase reaction of cobalt and silicon in the phase sequence of Co2Si, CoSi, and CoSi2 by use of rapid thermal annealing. The through-metal arsenic implantation caused the mixing of cobalt with the silicon substrate and the formation of cobalt silicides. A significant lateral growth of cobalt silicides was observed in samples subjected to one-step rapid thermal annealing process at 900 °C without through-metal ion implantation. Ion beam mixing reduced this lateral silicide growth efficiently, but resulted in a higher density of cobalt atoms remaining in the silicon oxide film than after rapid thermal annealing, as revealed by vapor phase decomposition atomic absorption spectroscopy.

High temperature stability of plasma-enhanced chemically vapour deposited titanium silicide due to two-step rapid thermal annealing

The high temperature stability of plasma-enhanced chemically vapour deposited titanium silicide (TiSi x ) annealed at 1000°C is studied. A multilayer structure consisting of Si(1000 Å)/TiSi x (1200 Å)/Si(700 Å) is deposited successively over thermal oxide on a silicon substrate. When one-step rapid thermal annealing is performed at 1000 °C, a rough TiSi x Si interface forms and an increase in sheet resistance occurs. However, a stable interface and sheet resistance can be attained using a two-step rapid thermal sequence consisting of a 700°C pre-anneal and 1000°C post-anneal owing to the fact that stoichiometric TiSi x possessing an even TiSi x Si interface is formed with this pre-anneal. Pre-anneals at 600 and 800°C result in an inhomogeneous interface when followed by the post-anneal at 1000°C. Two-step annealing with a 700°C pre-anneal is a promising process technology for very large scale integrated circuit fabrication.