On-off Keying Receiver Research Articles

An OOK and Binary FSK Reconfigurable Dual-Band Noncoherent IR-UWB Receiver Supporting Ternary Signaling

This article presents a multiband low-power and low-complexity impulse radio ultrawideband (IR-UWB) noncoherent receiver. The proposed receiver can be digitally reconfigured in three different modes of operation, including two single-band modes and one concurrent dual-band mode. In the two single-band modes, the proposed envelope detection architecture is capable of receiving and demodulating an on–off keying (OOK) pulse stream at RF center frequencies of 2.8 or 4.8 GHz. In the concurrent dual-band mode, the proposed architecture is able to demodulate binary frequency-shift keying (FSK), in addition to OOK demodulation, at center frequencies of 3 and 5 GHz. The receiver is composed of a reconfigurable low-power differential low noise amplifier (LNA), a fully differential squarer (self-mixer circuit), low-pass filter (LPF), and variable gain baseband (BB) amplifiers. The receiver is fabricated in TSMC 130-nm CMOS process technology. The receiver can operate at up to 150 Mb/s with the ternary signaling that is enabled by the binary FSK modulation combined with the OOK modulation in concurrent dual-band mode. At its maximum gain, the receiver achieves a sensitivity of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula> 72 dBm at a bit error rate (BER) of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10^{-3}$</tex-math> </inline-formula> at a 100-Mb/s data rate. It consumes 11.9 and 13.2 mW from a 1.2-V supply in the single-band modes and concurrent dual-band mode, respectively.

A 2.65-pJ/Bit 12.5-Gb/s 60-GHz OOK CMOS Transmitter and Receiver for Proximity Communications

This article presents a high data rate, high-efficiency 60-GHz on–off keying (OOK) CMOS transmitter and receiver. The transmitter consists of a voltage-controlled oscillator (VCO) and a modulator. The receiver consists of a low-noise amplifier, detector, and limiting amplifier (LA) and has a compact design. An analysis of the on–off isolation of the modulator and bandwidth of the LA reveals that the proposed transformer (TF) between the modulator and the VCO can improve the on–off isolation, and the feedforward capacitor can enhance the bandwidth. Implemented in the 65-nm CMOS technology, the transmitter and the receiver consume dc powers of 12.1 and 21 mW, respectively, at 12.5 Gb/s. Moreover, they occupy core chip areas of 0.09 and 0.06 mm2, respectively. The transceiver system is constructed with on-board Yagi–Uda antennas, and it achieves 12.5 Gb/s wireless OOK data transmission for a pseudorandom binary sequence of length 27 −1 with a bit error rate of less than 10−12. The proposed transceiver system achieves an energy efficiency of 2.65 pJ/bit.

Bit-error rate investigation of satellite-to-ground downlink optical communication employing spatial diversity and modulation techniques

In this paper, the error performance of multiple apertures receiver system under different modulation schemes is evaluated for satellite-to-ground downlink optical communications. Gamma–Gamma channel model is used for the consideration of moderate to strong atmospheric turbulence. Error rate expression equations of maximum ratio combining (MRC), equal gain combining (EGC), and selection combining (SC) techniques are derived for M-ary pulse position modulation (M-PPM) and M-ary differential PPM (M-DPPM) modulation schemes. Bit-error rate (BER) performances of M-PPM and M-DPPM modulated MRC, EGC, and SC direct detection receiver systems are compared with a single monolithic aperture receiver system. Performances of downlink direct detection multiple apertures receiver system are also compared among on–off keying (OOK), M-PPM, and M-DPPM modulation schemes. Numerical calculations and Monte Carlo (MC) simulations are used to exam the results of our analysis. It is found that, for M-PPM and M-DPPM, the effect of atmospheric turbulence can be reduced by MRC and EGC receiver system, and SC receiver system can show its advantages compared to a single aperture receiver system in the case of large zenith angles. The downlink BER performances of OOK, 8-PPM, and 8-DPPM multiple apertures receiver system are decreased according to the order of 8-PPM, 8-DPPM, and OOK.

A Self-Powered 50-Mb/s OOK Transmitter for Optoisolator LED Emulation

Isolators are used to eliminate ground loops, and also to protect circuits that are sensitive to high voltages. Optoisolators are normally deployed for these purposes, but they suffer from several limitations, such as low speed of operation and temperature instability. In this paper, an ON-OFF keying (OOK) transmitter (TX) is designed so as to emulate and serve as an alternative to optoisolators, without significant changes to the rest of the system. The TX primarily consists of a voltage clamp circuit to convert input current into voltage, a discharge circuit to avoid metastability, and a 300-700-MHz spread-spectrum (SS) oscillator. The start-up and die-down times of the oscillator are optimized for maximum data speed. SS modulation of the oscillator output restricts radiative emissions to within permissible limits. The TX derives power from the input data (current) signal itself, thereby operating without any external power supply, and supports speeds of up to 50 Mb/s. The TX was fabricated in a BiCMOS semiconductor process and tested using an OOK receiver.

9.5 mW fully integrated K ‐band on–off keying receiver with −47.6 dBm sensitivity and 600 Mbit/s data rate in 90 nm CMOS

A K-band on–off keying (OOK) receiver implemented in tsmcTM 90 nm CMOS process is proposed. The proposed OOK receiver consists of a two-stage wideband low-noise amplifier, a single-to-differential envelop detector with RC lowpass filter and a 62.6 dB three-stage variable gain amplifier and DC offset compensation circuit. The OOK receiver achieved a sensitivity of −47.6 dBm at 600 Mbit/s data rate under a pseudo-random binary sequence 29–1 pattern. The receiver consumes a low power of 9.5 mW, which minimum average power is only 15.86 nW at the input power of −47.6 dBm. The chip area including test pads is 1 × 0.81 mm2.

Design and Analysis of a Low-Power 3–6-Gb/s 55-GHz OOK Receiver With High-Temperature Performance

This paper presents an in-depth analysis of an SiGe BiCMOS on-off keying (OOK) receiver composed of a low-noise SiGe amplifier and an OOK detector. The analysis indicates that the bias circuit and bias current have a substantial impact on the receiver and should be optimized for best performance. The LO leakage from the transmitter can also have a detrimental impact on the receiver sensitivity and should be minimized for best performance. The receiver consumes 11 mW, has a noise equivalent power of 5-10 fW/Hz <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1/2</sup> at 55 GHz, and an instantaneous dynamic range of 27-30 dB. The OOK receiver achieves 6-Gb/s communication with a bit-error rate (BER) <; 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> at room temperature. Operation is also demonstrated up to 105°C at 3 Gb/s with a BER <; 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> .