Number Of Processors Research Articles

BLENDING FUNCTIONALLY DEFINED SURFACES

Smooth surfaces with perturbation functions for the creation of complex shapes are considered. The method for describing objects in three-dimensional scenes with a base surface and perturbation functions that have a compact description is proposed. One of the positive properties of functionally defined objects in comparison with other methods of specifying models is the simplicity and efficiency of their geometric transformations, in particular, three-dimensional morphing and collision detection of objects. The most common model for visualizing three – dimensional images is the polygonal approximation. Along with many advantages, this model has its drawbacks. By modeling real objects, an approximate polygonal model is constructed. To increase the image quality, itis often necessary to increase the number of polygons. An increasein the number of polygons results in an increase in rendering time and memory usage. Changing the scale of an object introduces additional problems because you cannot change quickly and efficiently the number of polygons for the object model. You can get rid of such shortcomings by applying analytical volume assignment and rasterization using ray-tracing algorithms. Analytical volume assignment does not require a large amount of memory. The problem of synthesis of realistic images is relevant for various simulators, virtual studios and three-dimensional games. Now, there are already works on visualization of functionally defined surfaces, but their application is limited to a rather narrow class of surfaces and slow visualization. The algorithms used are difficult to optimize, which also imposes restrictions on practical application. The paper proposes to use a special class of volumes, which are called "free forms". Each free form represents abase surface and a perturbation on that surface. The base surface and perturbation are given by polynomials of the second degree-quadrics. To achieve smoothness, the perturbation function is raised to the third degree. The aim of the work is to create an application that, according to a given analytical task, calculates the frame depth and surface normal in each pixel with the help of perturbation quadrics. This application should use the computing resources of the graphics processing units as much as possible. There have been attempts to create algorithms to visualize volumes given analytically, but most of them used only the CPU for calculations, and the processing time was too long for practical application. Moreover, these algorithms were not designed for parallel processing.In contrast, the proposed algorithm uses a graphics-processing unit for most of the calculations. In this case, the calculations on the graphics accelerator occur in parallel, and the method effectively uses this feature. Due to parallel processing and the absence of the need to transfer a large amount of data from the shared memory to the memory of the graphics accelerator, the speed of visualization increases compared to the option that uses only the CPU. The clock speed of processors in graphics accelerators is less than the CPU frequency. However, for a certain class of tasks performance using graphics accelerators will be better, due to the large number of processors.

Синхронный алгоритм параллельной реконструкции трехмерных изображений на основе системы обмена сообщениями MPI

Одни из наиболее важных вычислительных задач разработка и адаптация итерационных методов для решения сверхбольших разреженных систем алгебраических уравнений. К таким вычислительным задачам приводит задача итерационной параллельной реконструкции трехмерных изображений промышленных изделий. Важно, что итерационные методы решения вычислительных задач большой размерности реализуются на параллельных структурах намного эффективнее, чем прямые методы их решения. В этой работе описан синхронный параллельный алгоритм, основанный на использовании системы MPI для решения задачи реконструкции трехмерных изображений промышленных изделий. Purpose. Currently, one of the most important tasks is the development and adaptation of iterative methods for solving ultra-large sparse systems of algebraic equations. Such computational problems are caused by the iterative parallel reconstruction of three-dimensional images of industrial products. It is important that iterative methods for solving computational problems of large size are implemented on parallel structures much more efficiently than direct methods for solving them. This paper describes a synchronous parallel algorithm based on the MPI system for solving the problem of reconstruction of three-dimensional images of industrial products. Methodology. It is important that iterative methods for solving computational problems of larger dimensionality on parallel structures are implemented more efficiently than the direct ones. Most algorithms based on direct solving methods have a significant hereditary sequential structure and require a large number of processors interactions which cannot be executed in parallel mode. Iterative methods, for the most part, require a significantly smaller number of interactions of this type and are relatively easily mapped onto parallel computational structures. Equally important, in most cases parallel implementations of classical iterative methods are more effective in terms of computational speed. The parallel execution of the algorithm is based on the distribution of the process in some way between various groups of processors. Depending on the interaction method between local processors, two different types of parallel iterative algorithms execution are distinguished: synchronous and asynchronous. In the former case, it is assumed that the processors complete the calculations and exchange all the necessary results before the start of a new iteration. The main disadvantage of synchronous parallel algorithms is that they require synchronization of iterations. This is a very difficult task, especially with large number of processors. In addition, the overall calculation speed is limited by the speed of the slowest processor. At the same time, faster processors spend most of their time in the waiting mode. But, nevertheless, the implementation of these parallel algorithms can be effectively achieved using the MPI standard. Findings. Synchronous parallel computing algorithms and program codes for threedimensional tomographic reconstruction in a conical beam were developed. Program code debugging and numerical calculations were performed on a hybrid cluster based on the OpenPOWER architecture using the MPI system. For designing a parallel threedimensional tomographic reconstruction, a voxel form of parallelism was used. Originality. Implemented parallel iterative technology of three-dimensional images reconstruction has undeniable advantages over traditional sequential iterative tomographic reconstruction. It allows reducing the time of tomographic reconstruction as many as tens of times, provides the ability to reconstruct products with sizes of 5123 to 10243 voxels with simultaneous storage of the submatrix node of the projection matrix in RAM, which eliminates the need for recalculation of matrix coefficients for each new iteration.

Characterization of Diagnosabilities on the Bounded PMC Model

Abstract In this paper, we propose a new digragh model for system level fault diagnosis, which is called the $(f_1,f_{2})$-bounded Preparata–Metze–Chien (PMC) model (shortly, $(f_1,f_{2})$-BPMC). The $(f_1,f_{2})$-BPMC model projects a system such that the number of faulty processors that test faulty processors with the test results $0$ does not exceed $f_{2}$$(f_2\leq f_{1})$ provided that the upper bound on the number of faulty processors is $f_{1}$. This novel testing model compromisingly generalizes PMC model (Preparata, F.P., Metze, G. and Chien R.T. (1967) On the connection assignment problem of diagnosable systems. IEEE Tran. Electron. Comput.,EC-16, 848–854) and Barsi–Grandoni–Maestrini model (Barsi, F., Grandoni, F. and Maestrini, P. (1976) A theory of diagnosability of digital systems. IEEE Trans. Comput.C-25, 585–593). Then we present some characterizations for one-step diagnosibility under the $(f_1,f_{2})$-bounded PMC model, and determine the diagnosabilities of some special regular networks. Meanwhile, we establish the characterizations of $f_1/(n-1)$-diagnosability and three configurations of $f_1/(n-1)$-diagnosable system under the $(f_1,f_{2})$-BPMC model.

Processor-Oblivious Record and Replay

Record-and-replay systems are useful tools for debugging non-deterministic parallel programs by first recording an execution and then replaying that execution to produce the same access pattern. Existing record-and-replay systems generally target thread-based execution models, and record the behaviors and interleavings of individual threads. Dynamic multithreaded languages and libraries, such as the Cilk family, OpenMP, TBB, and the like, do not have a notion of threads. Instead, these languages provide a processor-oblivious model of programming, where programs expose task parallelism using high-level constructs such as spawn/sync without regard to the number of threads/cores available to run the program. Thread-based record-and-replay would violate the processor-oblivious nature of these programs, as they incorporate the number of threads into the recorded information, constraining the replayed execution to the same number of threads. In this article, we present a processor-oblivious record-and-replay scheme for dynamic multithreaded languages where record and replay can use different number of processors and both are scheduled using work stealing. We provide theoretical guarantees for our record and replay scheme—namely that record is optimal for programs with one lock and replay is near-optimal for all cases. In addition, we implemented this scheme in the Cilk Plus runtime system and our evaluation indicates that processor-obliviousness does not cause substantial overheads.

Divisible Nonlinear Load Distribution on Complete b-Ary Trees

This paper investigates the problem of a divisible nonlinear load distribution on homogeneous complete b -ary tree networks. Classic models of nonlinear computational loads omit several steps in processing the load and yield only an approximate distribution for fractional loads. This paper considers a new model of nonlinear computational loads that includes all load processing steps and yields a practical solution to distribute fractional loads. Two algorithms to distribute a divisible nonlinear load on homogeneous complete b -ary tree networks are proposed. Closed-form expressions for the parallel processing time and speed-up for complete b -ary trees are also derived. This paper demonstrates that the asymptotic speed-up of the proposed algorithms is the number of processors in a multicomputer system. The proposed algorithms improved the classic algorithm in terms of speed-up.

A Fast-Efficient parallel processing algorithm for straight line detection

<p>This work presents a novel method for detecting straight lines in an image at a very high speed with optimum number of processors and their functionalities. The method can be used to extract straight lines directly from an image without noise removal and pre-processing. First the square image is converted to a binary edge image using a parallel edge detection mechanism. The parallel edge detection mechanism used in this work is capable of producing edge image within a short time. Then the binary square image is transferred to a system having large number of Processing Elements (PEs). A PE has only limited jobs such as pixel scanning, compare line length with nearby PEs and transmit data to the Main Control Unit (MCU). The MCU collects data from all PEs and evaluates straight lines. Even if the number of PEs is high, it is comparatively very much less than the parallel Hough Transform method and practically implementable using recent ULSI technologies.</p>

A novel approach for big data processing using message passing interface based on memory mapping

The analysis and processing of big data are one of the most important challenges that researchers are working on to find the best approaches to handle it with high performance, low cost and high accuracy. In this paper, a novel approach for big data processing and management was proposed that differed from the existing ones; the proposed method employs not only the memory space to reads and handle big data, it also uses space of memory-mapped extended from memory storage. From a methodological viewpoint, the novelty of this paper is the segmentation stage of big data using memory mapping and broadcasting all segments to a number of processors using a parallel message passing interface. From an application viewpoint, the paper presents a high-performance approach based on a homogenous network which works parallelly to encrypt-decrypt big data using AES algorithm. This approach can be done on Windows Operating System using .NET libraries.

Efficient CGM-based parallel algorithms for the longest common subsequence problem with multiple substring-exclusion constraints

A variant of the Longest Common Subsequence (LCS) problem is the LCS problem with multiple substring-exclusion constraints (M-STR-EC-LCS), which has great importance in many fields especially in bioinformatics. This problem consists to compute the LCS of two strings X and Y of length n and m respectively that excluded a set of d constraints P={P1,P2,…,Pd} of total length r. Recently, Wang et al. proposed a sequential solution based on the dynamic programming technique that requires O(nmr) execution time and space. To the best of our knowledge, there is no parallel solutions for this problem. This paper describes new efficient parallel algorithms on Coarse Grained Multicomputer model (CGM) to solve this problem. Firstly, we propose a multi-level Direct Acyclic Graph (DAG) that determines the correct evaluation order of sub-problems in order to avoid redundancy due to overlap. Secondly, we propose two CGM parallel algorithms based on our DAG. The first algorithm is based on a regular partitioning of the DAG and requires O(nmrp) execution time with O(p) communication rounds where p is the number of processors used. Its main drawback is high idleness time of processors because due to the dependencies between the nodes in the DAG, over time it has many idle processors. The second algorithm uses an irregular partitioning of the DAG that minimizes this idleness time by allowing the processors to stay active as long as possible. It requires O(nmrp) execution time with O(kp) communication rounds. k is a constant integer allowing to setup the irregular partitioning. The both algorithms require O(r|Σ|p) preprocessing time where |Σ| is the length of the alphabet. The experimental results performed show a good agreement with theoretical predictions.

Fault-Tolerant Energy-Aware Task Scheduling on Multiprocessor System for Fixed-Priority Real-Time Tasks

Energy-aware real-time scheduling is gaining attention in recent years owing to environmental concerns and applications in numerous fields. System reliability also gets affected adversely with increasing energy dissipations posing serious challenges before the researchers. Keeping these in view, in recent times researchers have diverted to combining issues of fault-tolerance and energy efficiency. In literature, DVFS and DPM, most commonly used techniques for power management in task scheduling, are often combined with Primary/Backup technique to achieve fault tolerance against transient and permanent faults. Optimal algorithms, Earliest deadline first (EDF) and Rate-Monotonic (RM), meant for scheduling dynamic and fixed priority tasks respectively, have mainly been analyzed using a dual-processor approach for fault-tolerance and energy efficiency. In this paper, to handle higher workload of fixed-priority real-time tasks, energy-aware fault-tolerant scheduling algorithms are proposed for multiprocessor systems with balanced and unbalanced number of main and auxiliary processors. Simulations over extensive task-sets indicate that balanced approach is more energy-efficient than the unbalanced one.

Efficient thermal finite element modeling of selective laser melting of Inconel 718

In the powder bed fusion process, an accurate prediction of the transient temperature field of a part is essential to calculate the subsequent thermal stress evolution and microstructure propagation in that part. The experimental method is time-consuming and expensive since the temperature field is controlled by many process parameters. Numerical heat transfer models can be used to estimate the temperature field at any time point. However, traditional numerical simulation schemes are not suitable for the layer-wised fabrication process due to the extremely high computational cost. The computational cost mainly relies on the element number and time step size. This research provides a new efficient and part-level simulation scheme based on an open-source finite element library, which is able to adaptively refine and coarsen the mesh and solve finite element equations with multiple processors in a parallel way. Here, a new mesh strategy that aims to reduce the element number while keeping the solution accuracy is developed. The simulation speed is 12× to 18× faster compared with the traditional simulation scheme depending on the scale of the simulated domain and number of processors. Simulation results have been compared with the experimental results of an Inconel 718 component. It is shown that the testing point in the simulation experiences the same thermal cycles of the same point in the experiment. This simulation scheme can also be used to optimize the process parameters such as scanning pattern, scan velocity, and layer thickness and can be easily extended to other additive manufacturing processes.

Scheduling divisible loads with time and cost constraints

In distributed computing, divisible load theory provides an important system model for allocation of data-intensive computations to processing units working in parallel. The main task is to define how a computation job should be split into parts, to which processors those parts should be allocated and in which sequence. The model is characterized by multiple parameters describing processor availability in time, transfer times of job parts to processors, their computation times and processor usage costs. The main criteria are usually the schedule length and cost minimization. In this paper, we provide the generalized formulation of the problem, combining key features of divisible load models studied in the literature, and prove its NP-hardness even for unrestricted processor availability windows. We formulate a linear program for the version of the problem with a fixed number of processors. For the case with an arbitrary number of processors, we close the gaps in the study of special cases, developing efficient algorithms for single criterion and bicriteria versions of the problem, when transfer times are negligible.

Visualizing Hierarchical Performance Profiles of Parallel Codes Using CallFlow.

Calling context trees (CCTs) couple performance metrics with call paths, helping understand the execution and performance of parallel programs. To identify performance bottlenecks, programmers and performance analysts visually explore CCTs to form and validate hypotheses regarding degraded performance. However, due to the complexity of parallel programs, existing visual representations do not scale to applications running on a large number of processors. We present CallFlow, an interactive visual analysis tool that provides a high-level overview of CCTs together with semantic refinement operations to progressively explore CCTs. Using a flow-based metaphor, we visualize a CCT by treating execution time as a resource spent during the call chain, and demonstrate the effectiveness of our design with case studies on large-scale, production simulation codes.

Surrogate Gradient Learning in Spiking Neural Networks: Bringing the Power of Gradient-Based Optimization to Spiking Neural Networks

Spiking neural networks (SNNs) are nature's versatile solution to fault-tolerant, energy-efficient signal processing. To translate these benefits into hardware, a growing number of neuromorphic spiking NN processors have attempted to emulate biological NNs. These developments have created an imminent need for methods and tools that enable such systems to solve real-world signal processing problems. Like conventional NNs, SNNs can be trained on real, domain-specific data; however, their training requires the overcoming of a number of challenges linked to their binary and dynamical nature. This article elucidates step-by-step the problems typically encountered when training SNNs and guides the reader through the key concepts of synaptic plasticity and data-driven learning in the spiking setting. Accordingly, it gives an overview of existing approaches and provides an introduction to surrogate gradient (SG) methods, specifically, as a particularly flexible and efficient method to overcome the aforementioned challenges.

Fast Deep Neural Network Training on Distributed Systems and Cloud TPUs

Since its creation, the ImageNet-1k benchmark set has played a significant role as a benchmark for ascertaining the accuracy of different deep neural net (DNN) models on the image classification problem. Moreover, in recent years it has also served as the principal benchmark for assessing different approaches to DNN training. Finishing a 90-epoch ImageNet-1k training with ResNet-50 on a NVIDIA M40 GPU takes 14 days. This training requires $10^{18}$1018 single precision operations in total. On the other hand, the world's current fastest supercomputer can finish $3 \times 10^{17}$3×1017 single precision operations per second (according to the Nov 2018 Top 500 results). If we can make full use of the computing capability of the fastest supercomputer, we should be able to finish the training in several seconds. Over the last two years, researchers have focused on closing this significant performance gap through scaling DNN training to larger numbers of processors. Most successful approaches to scaling ImageNet training have used the synchronous mini-batch stochastic gradient descent (SGD). However, to scale synchronous SGD one must also increase the batch size used in each iteration. Thus, for many researchers, the focus on scaling DNN training has translated into a focus on developing training algorithms that enable increasing the batch size in data-parallel synchronous SGD without losing accuracy over a fixed number of epochs. In this paper, we investigate supercomputers’ capability of speeding up DNN training. Our approach is to use a large batch size, powered by the Layer-wise Adaptive Rate Scaling (LARS) algorithm, for efficient usage of massive computing resources. Our approach is generic, as we empirically evaluate the effectiveness on five neural networks: AlexNet, AlexNet-BN, GNMT, ResNet-50, and ResNet-50-v2 trained with large datasets while preserving the state-of-the-art test accuracy. Compared to the baseline of a previous study from Goyal et al. [1] , our approach shows higher test accuracy on batch sizes that are larger than 16K. When we use the same baseline, our results are better than Goyal et al. for all the batch sizes (Fig. 20 ). Using 2,048 Intel Xeon Platinum 8160 processors, we reduce the 100-epoch AlexNet training time from hours to 11 minutes. With 2,048 Intel Xeon Phi 7250 Processors, we reduce the 90-epoch ResNet-50 training time from hours to 20 minutes. Our implementation is open source and has been released in the Intel distribution of Caffe, Facebook's PyTorch, and Google's TensorFlow. The difference between this paper and the conference-version of our work [2] includes: (1) we implement our approach on Google's cloud Tensor Processing Unit (TPU) platform, which verifies our previous success on CPUs and GPUs. (2) we scale the batch size of ResNet-50-v2 to 32K and achieve 76.3 percent accuracy, which is better than the 75.3 percent accuracy achieved in our conference paper. (3) we apply our approach to Google's Neural Machine Translation (GNMT) application, which helps us to achieves 4× speedup on the cloud TPUs.

Automatic processing of Z-transform artificial neural networks using parallel programming

The article describes the process of computing the Z-transform neural network on the basis of input and output signals of analyzed object. Parallel algorithms for performing these calculations are presented and different parallel architectures with different number of processors showing their advantages and limitations are analyzed.

A fine‐grained loop‐level parallel approach to efficient fuzzy community detection in complex networks

SummaryDetermining the inner organizational structure of sets of networked elements is of paramount importance to analyze real‐world systems such as social, biological, or economic networks. To such an end, it is necessary to identify communities of interrelated nodes within the networks. Recently, a fuzzy community detection approach based on the minimization of a topological error functional has been proposed in the form of a gradient‐based algorithm design pattern. However, the intrinsic quadratic algorithmic complexity of the procedure limits the problem size that can be efficiently treated. Here, we extend the ability of this approach to analyze larger networks resorting to parallelism. Thus, we identify the concurrency sources in the gradient‐based algorithm design pattern. To determine the parallelization limits, we develop a two‐dimensional performance model as a function of the number of processors and network size. The model permits to compute the maximum possible speedup. Another model is presented to find the maximum problem size tractable in a given amount of time. Application of the previous models to a set of benchmark networks shows that parallelization enhances the proposed fuzzy community detection approach in more than an order of magnitude. This allows treatment of networks with several hundred thousand nodes in a time frame of hours.

A systematic construction of configuration interaction wavefunctions in the complete CI space.

We introduce a systematic approach to construct configuration interaction (CI) wavefunctions through a variant of the Monte Carlo CI (MCCI) method termed systematic-MCCI. Within this approach, the entire interacting space is systematically considered in batches, with the most important configurations across all batches becoming potential additions to the wavefunction. We compare this method to MCCI and a novel pruned-full configuration interaction (FCI) approach. For the ground state of neon, as described by the cc-pVTZ basis, we observe no apparent difference between systematic-MCCI, pruned-MCCI, and MCCI, with all recovering 99% of the correlation energy and producing a very similar wavefunction composition. We then consider the potential energy surface corresponding to the symmetric double hydrogen dissociation of water within a cc-pVDZ basis. Once again MCCI performs comparably to the systematic approaches. Despite systematic-MCCI having longer run times across the number of processors considered, we do observe very good scalability. We then extend this comparison to the first A1 excited energy of carbon monoxide using the cc-pVDZ basis where the MCCI methods perform similarly, approximating this aforementioned energy to within 0.1 eV despite vast reduction in the wavefunction size. Finally, we consider the chromium dimer with the cc-pVTZ basis and 18 frozen orbitals. Here, we find that the systematic approach avoids being trapped in the same local minimum of configuration space as MCCI, yet MCCI can reach a lower energy by repeating the calculation with more processors.

The g-good-neighbour conditional diagnosability of enhanced hypercube under PMC model

The significant increase in the number of processors of multiprocessor system increases its vulnerability to component failures. Diagnosability is an important indicator for the reliability of interconnection networks. The g-good-neighbour conditional diagnosability is the maximum number of faulty vertices a network can guarantee to identify, under the condition that every fault-free vertex has at least g fault-free neighbours (i.e. good neighbours). In this paper, we establish that the 1-good-neighbour conditional diagnosability of -enhanced hypercube network under PMC model is 2n−1 for n = k + 1 and , or 2n + 1 for n>k + 1 and , respectively. Moreover, the 2-good-neighbour conditional diagnosability of is 3n−3 for n = k + 1 and , or 4n−5 for n = k + 2 and , or 4n−1 for n>k + 2 and , respectively.

Energy-efficient Static Task Scheduling on VFI-based NoC-HMPSoCs for Intelligent Edge Devices in Cyber-physical Systems

The interlinked processing units in modern Cyber-Physical Systems (CPS) creates a large network of connected computing embedded systems. Network-on-Chip (NoC)-based Multiprocessor System-on-Chip (MPSoC) architecture is becoming a de facto computing platform for real-time applications due to its higher performance and Quality-of-Service (QoS). The number of processors has increased significantly on the multiprocessor systems in CPS; therefore, Voltage Frequency Island (VFI) has been recently adopted for effective energy management mechanism in the large-scale multiprocessor chip designs. In this article, we investigated energy-efficient and contention-aware static scheduling for tasks with precedence and deadline constraints on intelligent edge devices deploying heterogeneous VFI-based NoC-MPSoCs (VFI-NoC-HMPSoC) with DVFS-enabled processors. Unlike the existing population-based optimization algorithms, we proposed a novel population-based algorithm called ARSH-FATI that can dynamically switch between explorative and exploitative search modes at run-time. Our static scheduler ARHS-FATI collectively performs task mapping, scheduling, and voltage scaling. Consequently, its performance is superior to the existing state-of-the-art approach proposed for homogeneous VFI-based NoC-MPSoCs. We also developed a communication contention-aware Earliest Edge Consistent Deadline First (EECDF) scheduling algorithm and gradient descent--inspired voltage scaling algorithm called Energy Gradient Decent (EGD). We introduced a notion of Energy Gradient (EG) that guides EGD in its search for island voltage settings and minimize the total energy consumption. We conducted the experiments on eight real benchmarks adopted from Embedded Systems Synthesis Benchmarks (E3S). Our static scheduling approach ARSH-FATI outperformed state-of-the-art technique and achieved an average energy-efficiency of ∼24% and ∼30% over CA-TMES-Search and CA-TMES-Quick, respectively.

Parallelizing approximate single-source personalized PageRank queries on shared memory

Given a directed graph G, a source node s, and a target node t, the personalized PageRank (PPR) $$\pi (s,t)$$ measures the importance of node t with respect to node s. In this work, we study the single-source PPR query, which takes a source node s as input and outputs the PPR values of all nodes in G with respect to s. The single-source PPR query finds many important applications, e.g., community detection and recommendation. Deriving the exact answers for single-source PPR queries is prohibitive, so most existing work focuses on approximate solutions. Nevertheless, existing approximate solutions are still inefficient, and it is challenging to compute single-source PPR queries efficiently for online applications. This motivates us to devise efficient parallel algorithms running on shared-memory multi-core systems. In this work, we present how to efficiently parallelize the state-of-the-art index-based solution FORA, and theoretically analyze the complexity of the parallel algorithms. Theoretically, we prove that our proposed algorithm achieves a time complexity of $$O(W/P+\log ^2{n})$$, where W is the time complexity of sequential FORA algorithm, P is the number of processors used, and n is the number of nodes in the graph. FORA includes a forward push phase and a random walk phase, and we present optimization techniques to both phases, including effective maintenance of active nodes, improving the efficiency of memory access, and cache-aware scheduling. Extensive experimental evaluation demonstrates that our solution achieves up to 37$$\times $$ speedup on 40 cores and 3.3$$\times $$ faster than alternatives on 40 cores. Moreover, the forward push alone can be used for local graph clustering, and our parallel algorithm for forward push is 4.8$$\times $$ faster than existing parallel alternatives.