Decimal Research Articles

Self-assembling crystalline peptide microrod for neuromorphic function implementation

Self-assembling crystalline peptide microrod for neuromorphic function implementation

Method for extracting square and cube roots in the binary number system

The article describes in detail the methods of extracting square and cube roots in the binary number system. The method for extracting the square root of a binary number is similar to the corresponding method for decimal numbers, which is called the "column method". As for decimal numbers, when choosing the next digit of the root, twice the current value of the root, represented in the binary system, is used. When extracting the cube root (also "column"), there are two differences from the decimal system. The first is that instead of 300 (the product of 3 and 100), the binary number 1100 is used (that is, the product of the binary equivalents of the numbers 3 and 4). The second difference is that instead of the number 30 (the product of 3 and 10), the binary number 110 is used (that is, the product of binary analogs numbers 3 and 2). To facilitate the selection of the next root digit (0 or 1), a number of standard values have been calculated, depending on the current root value. Assignments for independent work of students are offered.

Flow-Aware Forwarding in SDN Datacenters Using a Knapsack-PSO-Based Solution

With the rapid growth of different massive applications and parallel flow requests in Data Center Networks (DCNs), today's providers are confronting challenges in flow forwarding decisions. Since Software Defined Networking (SDN) provides fine granular control, it can be intelligently programmed to distinguish between flow requirements. The present article proposes a knapsack model in which the link bandwidth and incoming flows are modeled as a knapsack capacity and items, respectively. Furthermore, each flow consists of two size and value aspects, acquired through flow size extraction and the type of service value assigned by the SDN controller decision. Indeed, the current work splits the incoming flow size range into Type of Service (ToS) decimal value numbers. The lower the flow size category, the higher the value dedicated to the flow. Particle Swarm Optimization (PSO) optimizes the knapsack problem and first forwards the selected flows by KP-PSO, and the non-selected-flows second. To address the shortcomings of these methods in the event of dense parallel flow detection, the present study puts the link under the threshold of a 70 percent load by simultaneous requests. Experimental results indicate that the proposed method outperforms Sonum, Hedera, and ECMP in terms of flow completion time, packet loss rate, and goodput regarding flow size requirements.

Developing Number Sense: An Approach to Initiate Algebraic Thinking in Primary Education

Traditionally, the teaching and learning of algebra has been addressed at the beginning of secondary education with a methodological approach that broke traumatically into a mathematical universe until now represented by numbers, with bad consequences. It is important, then, to find methodological alternatives that allow the parallel development of arithmetical and algebraic thinking from the first years of learning. This article begins with a review of a series of theoretical foundations that support a methodological proposal based on the use of specific manipulative materials that foster a deep knowledge of the decimal number system, while verbalizing and representing quantitative situations that underline numerical relationships and properties and patterns of numbers. Developing and illustrating this approach is the main purpose of this paper. The proposal has been implemented in a group of 25 pupils in the first year of primary school. Some observed milestones are presented and analyzed. In the light of the results, this well-planned early intervention contains key elements to initiate algebraic thinking through the development of number sense, naturally enhancing the translation of purely arithmetical situations into the symbolic language characteristic of algebraic thinking.

Quantized Convolutional Neural Network Implementation on a Parallel-Connected Memristor Crossbar Array for Edge AI Platforms.

There are many challenges in the hardware implementation of a neural network using nanoscale memristor crossbar arrays where the use of analog cells is concerned. Multi-state or analog cells introduce more stringent noise margins, which are difficult to adhere to in light of variability. We propose a potential solution using a 1-bit memristor that stores binary values "0" or "1" with their memristive states, denoted as a high-resistance state (HRS) and a low-resistance state (LRS). In addition, we propose a new architecture consisting of 4-parallel 1-bit memristors at each crosspoint on the array. The four 1-bit memristors connected in parallel represent 5 decimal values according to the number of activated memristors. This is then mapped to a synaptic weight, which corresponds to the state of an artificial neuron in a neural network. We implement a convolutional neural network (CNN) model on a framework (tensorflow) using an equivalent quantized weight mapping model that demonstrates learning results almost identical to a high-precision CNN model. This radix-5 CNN is mapped to hardware on the proposed parallel-connected memristor crossbar array. Also, we propose a method for negative weight representation on a memristor crossbar array. Then, we verify the CNN hardware on an edge-AI (e-AI) platform, developed on a field-programmable gate array (FPGA). In this e-AI platform, we represent five weights per crosspoint using CLB logics. We test the learning results of the CNN hardware using an e-AI platform with a dataset consisting of 4×4 images in three classes. We verify the functionality of our radix-5 CNN implementation showing comparable classification accuracy to high-precision use cases, with reduction of the area of the memristor crossbar array by half, all verified on a FPGA. Implementing the CNN model on the FPGA board can contribute to the practical use of edge-AI.

Symmetric Cryptoalgorithms in the Residue Number System

This paper presents theoretical backgrounds of the symmetric encryption based on the residue number system. The peculiarities of this approach are that in the case of restoring a decimal number based on its residuals using the Chinese remainder theorem, multiplication occurs by arbitrarily chosen coefficients (keys). It is established that cryptostability of the developed methods is determined by the number of modules and their bit size. In addition, the described methods are found to allow to almost indefinitely increase the block of plain text for encryption, which eliminates the necessity to use different encryption modes.

Prototype of Rainfall Intensity Measurement Using CCD TSL1401CL Linear Sensor Array

A prototype measurement of rainfall intensity was developed using a CCD TSL1401CL linear sensor array. The prototype consists of a He-Ne laser that functions as a light source, which later is focused by the beam expander and conditioned by a convex lens. Each pixel will receive the same voltage depending on the light intensity so that it produces a decimal value of ADC. This ADC decimal value determines rainfall intensity based on the diameter and velocity of the raindrops. The diameter variations used ranges from 1 mm to 10 mm, while for variations in the height of rainfall are 50 cm, 100 cm, and 150 cm. The test results proved that the greater the decimal value of the ADC is, the smaller the diameter of the raindrops detected will be, and vice versa. The values of the diameter and velocity of were used to obtain the value of rainfall intensity. The percentage value of error measuring rainfall intensity is 3.11% when compared to the rain gauge module is still considered rather accurate. However, direct testing is still needed when rain falls with various types and intensities. Â

Wall Following Control System with PID Control and Ultrasonic Sensor for KRAI 2018 Robot

Indonesian Abu Robot Contest (KRAI) in 2018 with the theme "Throwing a Blessing Ball". The main purpose of this robot is to be able to navigate automatically in an area that is bordered by walls to complete the mission. The main problem with the robot is the navigation system. The application of PID control in the wall following system has been able to make robot movements smooth, responsive, and fast. In this study, PID control aims to smooth the movement of the robot while walking along the wall in the race arena. The PID parameter is obtained from the results of tuning with the trial and error method, the values of KP = 3, KI = 0, and KD = 5. At the PWM 150 set point the value of the ultrasonic sensor distance reading to the object in the form of a wall with an average error of 4.4. cm. At the PWM 200 set point the value of the ultrasonic sensor distance reading to the object in the form of a wall with an average error of 0.4 cm. At the PWM 250 set point the value of the ultrasonic sensor distance reading to the object in the form of a wall with an average error of 0.8 cm. This error does not have an effect on the performance of the wall following system, because the system only uses the distance value reading data with a decimal value in front of the comma. So it can be concluded that the wall following system which is designed using ultrasonic sensors with measurement error that occurs is zero.

Why are there no infinite left-sided decimal expansions?

It was my nine-year-old daughter who got me interested in the title question. As she appreciates, multiplying an integer by a power of 10 is a cinch. To multiply 34 by 100, simply add two zeros at the end: 34 × 100 = 3400. Dividing 3400 by 100 is the reverse process: remove two zeros to obtain 34. More generally, to multiply an integer by 10N, for non-negative N, add N zeros to the end of its decimal notation, and to divide an integer by 10N remove N zeros from its end — so long as it has them. Easy-peasy; my daughter knows all that.

An Analysis of Students Error on Inversely Proportional Question at Grade VIII F SMP Negeri 9 Palu

The purpose of this study was to describe the students error on inversely proportional question at grade VIII F SMP Negeri 9 Palu. This type of research is qualitative research. Data were collected using data collection techniques, namely tests and interviews. The research subjects consisted of 3 people, namely C students, HD students and YYA students. The results of the study based on the students completion showed the mistakes made by the students in solving the comparison questions against the scores that were done. Based on the solution, conceptual and procedural errors were obtained. Conceptual errors include: a) factual errors consisting of: 1) students have not been able to write down the information contained in the questions, 2) students have not been able to understand the use of the equal sign correctly, 3) students have not been able to change the information contained in the questions into a model mathematics and 4) students have not been able to write conclusions correctly. b) Misconceptions consist of: 1) students do not understand the concept of reversing value comparisons, namely students working on comparison questions of turning values ​​using the principle of value comparisons, 2) students have not been able to operate a reversed value comparison and 3) students do not understand the concept of multiplication and division of integers and decimal numbers. Procedural errors consist of: 1) students have not been able to work on questions using the principle of reversing value comparisons, 2) students make mistakes operating multiplication and division and 3) students have not been able to determine the final result correctly.

Profiles in understanding operations with rational numbers

ABSTRACT Students often show difficulties in understanding rational numbers. Often, these are related to the natural number bias, that is, the tendency to apply the properties of natural numbers to rational number tasks. Although this phenomenon has received a lot of research interest over the last two decades, research on the existence of qualitatively different profiles regarding students’ understanding is scarce. The current study investigated the different ways students reasoned in arithmetic operation items with fractions and decimals. A cross-sectional study with 1,262 participants from 5th to 10th grade was performed. A TwoStep Cluster Analysis revealed eight different student reasoning profiles. We found that the natural number bias is first overcome in addition and subtraction, and later in multiplication and division. Moreover, differences regarding representation were only found in addition and subtraction items, indicating that natural numbers interfered more strongly in fractions than in decimal numbers. Finally, results showed that some students’ difficulties with rational number multiplications and divisions had other explanations than the natural number bias.

Intestinal Viral Loads and Inactivation Kinetics of Livestock Viruses Relevant for Natural Casing Production: a Systematic Review and Meta-Analysis.

Animal intestines are the source of edible sausage casings, which are traded worldwide and may come from areas where notifiable infectious animal diseases are prevalent. To estimate the risks of virus contamination, knowledge about the quantity of virus and decimal reduction values of the standard preservation method by salting is of great importance. A literature search, based on the Preferred Reporting Items for Systematic Reviews and Meta-Analyses (PRISMA) guidelines, was performed in search engine CAB s to determine the viral load of 14 relevant animal viruses in natural casings or intestines. Only a very limited number of scientific publications per virus were found and viral loads in the intestines varied from high for ASFV (five publications), BVDV (3), CSFV (6), PPRV (3), RPV (2) and TGEV (3) to moderate for PEDV (2) and SVDV (3), low for HEV (2) and FMDV (5), very low for VESV (1) and negative for PrV (2) and VSV (1). PRRSV was found in intestines, however, viral titers were not published. Three viruses (BVDV, CSFV and PPRV) with high viral loads were selected to search for their inactivation kinetics. For casings, no inactivation data were found, however, thermal inactivation data of these viruses were available, but differed in quantity, quality and matrices. In conclusion, important data gaps still exist when it comes to the quantitative inactivation of viruses in sausage casings or livestock intestines.

ENCRYPTION OF 3D PLANE IN GIS USING VORONOI-DELAUNAY TRIANGULATIONS AND CATALAN NUMBERS

A method of encryption of the 3D plane in Geographic Information Systems (GIS) is presented. The method is derived using Voronoi-Delaunay triangulation and properties of Catalan numbers. The Voronoi-Delaunay incremental algorithm is presented as one of the most commonly used triangulation techniques for random point selection. In accordance with the multiple applications of Catalan numbers in solving combinatorial problems and their "bit-balanced" characteristic, the process of encrypting and decrypting the coordinates of points using the Lattice Path method (walk on the integer lattice) or LIFO model is given. The triangulation of the plane started using decimal coordinates of a set of given planar points. Afterward, the resulting decimal values of the coordinates are converted to corresponding binary records and the encryption process starts by a random selection of the Catalan key according to the LIFO model. These binary coordinates are again converted into their original decimal values, which enables the process of encrypted triangulation. The original triangulation of the plane can be generated by restarting the triangulation algorithm. Due to its exceptional efficiency in terms of launching programs on various computer architectures and operating systems, Java programming language enables an efficient implementation of our method.

Hardware–Software Co-Design for Decimal Multiplication

Decimal arithmetic using software is slow for very large-scale applications. On the other hand, when hardware is employed, extra area overhead is required. A balanced strategy can overcome both issues. Our proposed methods are compliant with the IEEE 754-2008 standard for decimal floating-point arithmetic and combinations of software and hardware. In our methods, software with some area-efficient decimal component (hardware) is used to design the multiplication process. Analysis in a RISC-V-based integrated co-design evaluation framework reveals that the proposed methods provide several Pareto points for decimal multiplication solutions. The total execution process is sped up by 1.43× to 2.37× compared with a full software solution. In addition, 7–97% less hardware is required compared with an area-efficient full hardware solution.

Third Grade Students’ Use of Relational Thinking

Current mathematics curricula have as one of their fundamental objectives the development of number sense. This is understood as a set of skills. Some of them have an algebraic nature such as acquiring an abstract understanding of relations between numbers, developing awareness of properties and of the structure of the decimal number system and using it in a strategic manner. In this framework, the term relational thinking directs attention towards a way of working with arithmetic expressions that promotes relations between their terms and the use of properties. A teaching experiment has allowed to characterize the way in which third grade students use this type of thinking for solving number equalities by distinguishing four profiles of use. These profiles inform about how students employ relations and arithmetic properties to solve the equalities. They also ease the description of the evolution of the use of relational thinking along the sessions in the classroom. Uses of relational thinking of different sophistication are distinguished depending on whether a general known rule is applied, or relations and properties are used in a flexible way. Results contribute to understanding the process of developing the algebraic component of number sense.

Design and implementation of modified BCD digit multiplier for digit-by-digit decimal multiplier

Decimal multiplication is the most common operation in arithmetic applications. This paper presents an area-efficient digit-by-digit decimal multiplier using a modified binary-coded decimal digit multiplier. In general, a Binary-Coded Decimal (BCD) digit multiplier consists of two kinds of block, namely binary multiplier, and Partial Product Binary-to-Decimal (PPBD) converter. In the BCD digit multiplier design, the binary multiplier produces the partial product output by multiplying the multiplier value along with multiplicand, and the PPBD converter used to convert the binary partial product into the decimal value. Instead of the binary multiplier, this paper proposes a constant multiplier design to generate binary partial product values. Here, the multiplier value considers as the constant value. Further, the proposed architectures design and implement using both Field-Programmable Gate Array (FPGA) and Application Specific Integrated Circuit (ASIC). When compared with the existing methods, the implementation results show that the proposed design effectively reduces the area requirement and delay.

Utilizing binary code to improve usability of pressure-based authentication

Due to its invisibility feature, pressure is useful to enhance the security of authentication, especially preventing the shoulder surfing attack. However, users are more familiar with digital passwords than pressure-based passwords. In order to improve the usability of pressure-based authentication, this paper instantiates a pressure-based password (i.e., a sequence of pressures) to a decimal number. In addition, our approach features personalized pressure detection. The personalization further enhances security since an attacker must have a pressure habit that is consistent with the user. We conducted a series of user studies to compare the traditional four-digit password with our pressure-based password. The empirical result indicates that a pressure-based password is more resistant to the shoulder surfing attack than a four-digit password. However, it takes more time to input a pressure-based password on the first-time usage. The slowdown is caused by a modality change from vision to pressure. A field study that lasted for 10 days revealed that the side effect of modality change can be overcome through regular usages.

Is there a Similiarity between Fibonacci Sequence and Euler’s Number with Respect to Quantum Perspective Model?

According to Quantum Perspective Model, this article studies whether there is a link between the Euler’s numbers and the Fibonacci series. When the digits of the Euler’s number after the comma are converted from decimal(10) number base system to binary(2) number base system, it corresponds to the number in the Fibonacci series.(0,1,1,2,3,5,8,13,21,34,55...)[7].From this point of view, when the first hundred digits of the Euler’s numbers after the comma were calculated, the number "55" (ten times) in the Fibonacci series was found, in particular. Besides, the eleventh number in the Fibonacci series is also "55".In other words, the approximate unchanged numbers of the golden ratio numbers after the comma can be reached for the first time after dividing them from “55” to “34” (1,618). In sum, Euler’s numbers are not only attributed to the Fibonacci series in mathematics, but also attributed to the golden ratio in nature.

All Optical 3-Bit Octal to Binary Code Converter using Micro-Ring Resonator

In the developing field of optical communication, Switching based Micro-Ring Resonator (MRR) is used to design all-optical logic module. The MRR based logical module configured as OR logic gate and 3 - bit octal to binary code converter (OCB) is designed which has less computational errors and uses less digits than hexadecimal and decimal number system. It is widely used in IT application for Linux, android, operating system and Mac for computations. The proposed all optical OR gate and octal to binary code converter is designed for 10 Gbps. Optimum values of MRR length and Coupling coefficient are calculated and obtained values of Quality factor (QF) and Extinction ratio (ER) ensure reasonable performance of the proposed system.

Digital on-board clutch tester

The work is devoted to the creation of a digital type on-board device for diagnosing the clutch of traction vehicles (TTM) and allows to determine with high accuracy the slipping of the clutch when faults appear in it. The principle of operation of the device is based on the use of digital technology for measuring the rotational speed (number of pulses) in the digital code of the flywheel and the input shaft of the gearbox (GB). With the help of light-emitting diodes, the received digital codes are displayed, displaying the number of voltage pulses per second from the flywheel speed sensors and the gearbox primary shaft gear. The received digital codes are converted by the driver (operator) into the decimal number system. Given that the number of flywheel teeth is greater than the number of gear teeth, the number of pulses from the sensors is adjusted by dividing the number of pulses from the flywheel per revolution by the ratio of the number of flywheel teeth to the number of gear teeth. Next, the difference between the corrected number of pulses from the gear and the flywheel is determined, which is compared with the permissible number of pulses and, based on the comparison, a conclusion is made about the technical condition of the clutch. If the difference is equal to zero or less, the clutch will be considered good. The device for diagnosing the clutch includes two digital speed sensors, each of which contains an inductance coil with a magnetic core, rigidly fixed near the flywheel teeth and gears of the input shaft of the gearbox. The first differentiating circuit, with a cut-off diode at the output, the input is connected to the inductor and is made on the first and second resistors and capacitor. The second differentiating circuit with a cut-off diode at the output is made on a resistor and a capacitor, and the input is connected to the output of the self-oscillating multivibrator. The self-oscillating multivibrator is made on two logical elements NAND, two capacitors, two diodes and two resistors. The output of the second differentiating circuit is connected to the zero-setting inputs of sixteen-bit summing electronic counters. The outputs of the logical elements AND are connected by means of resistors with the counting inputs of two electronic counters, at the output of which digital codes are formed, which reflect the rotational speed of the flywheel and gears of the input shaft of the gearbox. An example of calculating the parameters of the elements of the differentiating circuit of an auto-oscillating multivibrator is given.