Number Of Active Switches Research Articles

A Three-Port Power Electronic Transformer Based on Magnetic Integration

This paper proposes a three-port power electronic transformer (PET) based on magnetic integration, where the modular multilevel converter (MMC) arm inductors and high-frequency transformer are integrated; thus, the low-voltage DC (LVDC) port can be directly obtained. Such a magnetic integration structure has advantages of reduction in magnetic volume and number of active switches, implying a compact structure and reduced cost. Compared with existing PETs, the proposed PET can save more than 60% of magnetic volume and more than 19% of device cost. The proposed PET is suitable for AC/DC hybrid distribution applications with medium-voltage DC (MVDC), medium-voltage AC (MVAC), and LVDC ports, especially for scenarios where moderate amounts of power (100 s of kW) are tapped from an LVDC port. The feasibility of the proposed three-port PET has been verified by simulation and experimental results.

Family of single‐phase high‐frequency isolated AC–AC converters

AbstractThis work presents a family of single‐phase ac–ac converters with high‐frequency isolation based on the association of interleaved transformers and the dual active bridge (DAB) converter. From distinct configurations of the dc link in terms of half‐bridge (HB), full‐bridge (FB), and interleaved full‐bridge (IFB) arrangements, one can obtain three symmetrical and six asymmetrical structures, with distinct trade‐offs among the number of active switches, total dc‐link voltage, and effective operating frequency of the filter elements. Prominent advantages of the derived circuits include input power factor correction (PFC), a nearly sinusoidal load voltage, the operation of active switches under soft‐switching condition during part of the line period, reduced current stresses, good current sharing due to the interleaved transformers, as well as multilevel voltage waveforms on both sides of the high‐frequency transformer (HFT). Experimental results obtained from an experimental prototype of an ac–ac FB‐IFB converter are presented to validate the theoretical assumptions.

New Nine-Level Cascade Multilevel Inverter with a Minimum Number of Switches for PV Systems

To support the grid system with high power quality from photovoltaics (PVs) and reduce the partial shading condition (PSC) effect of the PV system, as well as the mismatch power issue, in this study, we present a simple single-phase, nine-level cascade inverter architecture for photovoltaic (PV) systems with a minimum number of power components and passive parts. This reduction in the number of switches decreases the switching losses and the number of driving circuits, which causes a reduction in the complexity of the control circuit and hence reduces the cost and size. The suggested inverter shows a lower output voltage total harmonic distortion (THD) and unity power factor. In addition, this inverter’s control and switching techniques are far simpler than those of recently published designs. To evaluate the performance of the proposed inverter, we performed a comparison of the cascaded multilevel inverter (CMLI) topology, which required recent cascade topologies with the same nine voltage levels. The comparison depends on parameters such as the number of components (diode and capacitors) and the number of active switches in the inverter, in addition to total harmonic distortion. MATLAB/Simulink models for a grid-tied solar system PV application driven by the proposed nine-level inverter were built for design and validation.

DESIGN AND DEVELOPMENT OF 51 LEVEL NON MODULAR MULTILEVEL INVERTER TOPOLOGY WITH REDUCED NUMBER OF SWITCHES AND CONDUCTION PATH

In this paper, a 51 level multilevel inverter topology with non modular design is developed, which can be operated in asymmetrical mode with a reduced number of power switches and lesser conduction path. The proposed design has three separated DC sources and eleven active power switches, i.e., ten unidirectional switch and one bidirectional switch. The topology can be used with asymmetrical voltage source configuration to generate fifty one levels. This structure can be cascaded to produce maximum level by a series connection to produce higher voltage levels with less voltage stress on the switches without modifying the topology structure. A detailed Comparison is made with existing topology and recently introduced topologies based on the number of active switches, Separated DC sources, number of gate driver circuits. To prove the presented topology’s superiority, a simple Multicarrier pulse width modulation has been deployed as the switching scheme. Validation on the viability of the proposed topology has been carried out through Matlab/Simulink simulation. KEYWORDS: Non Modular Multilevel Inverter, Reduced Switch.

DESIGN OF MODULAR AND NON MODULAR MULTILEVEL INVERTER TOPOLOGY WITH REDUCED NUMBER OF SWITCHES

In this paper, a new multilevel inverter topology with modular and non modular design is developed, which can be operated both symmetrical and asymmetrical mode with a reduced number of power switches. The proposed design has four separated DC sources and Nine active power switches. The topology can be used with symmetrical and asymmetrical voltage source configuration to generate seventeen and seven voltage levels. This structure can be cascaded to produce maximum level by a series connection to produce higher voltage levels with less voltage stress on the switches without modifying the topology structure. Comparison is made with existing topology and recently introduced topologies based on the number of active switches, Separated DC sources, number of gate driver circuits. To prove the presented topology’s superiority, a simple Multicarrier pulse width modulation has been deployed as the switching scheme. Validation on the viability of the proposed topology has been carried out through Matlab/Simulink simulation. KEYWORDS : Modular, Non Modular Multilevel Inverter, Reduced Switch.

Optimization of Centralized Equalization Systems Based on an Integrated Cascade Bidirectional DC–DC Converter

This article presents a novel integrated cascade bidirectional dc–dc converter for optimizing a centralized charge equalization system. Through the integrated cascade structure, the polarity switches and the bidirectional dc–dc converter in the traditional centralized system are integrated, and the cells with different voltage polarities are equalized by controlling the operating state of the converter. Compared with the conventional methods, the number of active switches is significantly reduced, leading to a more compact size and a higher reliability. Moreover, with a phase-shifted pulsewidth modulation strategy, the peak value of the transformer current is reduced and the soft-switching operation is realized, thus greatly reducing the transformer and switching losses. Finally, the experimental results on 13 series-connected battery cells show that the proposed scheme exhibits the excellent performance in terms of equalizing efficiency and speed. The performance improvement of the proposed equalizer is further validated by a systematic comparison with the conventional centralized equalization methods.

Design and Implementation of Multilevel Inverters for Electric Vehicles

The efficient and compact design of multilevel inverters (MLI) motivates in various applications such as solar PV and electric vehicles (EV). This paper proposes a 53-Level multilevel inverter topology based on a switched capacitor (SC) approach. The number of levels of MLI is designed based on the cascade connection of the number of SC cells. The SC cells are cascaded for implementing 17 and 33 levels of the output voltage. The proposed structure is straightforward and easy to implement for the higher levels. As the number of active switches is less, the driver circuits are reduced. This reduces the device count, cost, and size of the MLI. The solar panels, along with a perturb and observe (P&O) algorithm, provide a stable DC voltage and is boosted over the DC link voltage using a single input and multi-output converter (SIMO). The proposed inverters are tested experimentally under dynamic load variations with sudden load disturbances. This represents an electric vehicle moving on various road conditions. A detailed comparison is made in terms of switches count, gate driver boards, sources count, the number of diodes and capacitor count, and component count factor. For the 17-level, 33-level, and 53-level MLI, simulation results are verified with experimental results, and total harmonic distortion (THD) is observed to be the same and is lower than 5% which is under IEEE standards. A hardware prototype is implemented in the laboratory and verified experimentally under dynamic load variations, whereas the simulations are done in MATLAB/Simulink.

Active Cell Balancing of Li-Ion Batteries for Electric Vehicles

Electric vehicles (EV) use battery banks containing series-parallel combinations of several small units to meet the high power demand of the drive system. In recent years, lithium-ion (Li-ion) batteries are being popularly used in EVs for energy storage instead of conventional lead acid batteries due to the advantages of higher cell voltage, no memory effect, low self-discharge, longer battery life and reduced size and weight. However, Li-ion battery packs require external power balancing circuits for its protection from getting damaged by overcharge and deep discharge. This work proposes an active circuit for charge balancing of Li-ion battery packs. The proposed charge balancing circuit uses a multi-winding flyback converter with n+1 number of active switches to protect a stack of n number of series connected cells. Performance of the proposed system has been verified through computer simulation in MATLAB with a 4 cell battery pack. Simulated results were found in close agreement with the predicted behaviour of the system.

Analysis of the effect neutral connection mode for permanent magnet synchronous generator-vienna rectifier set

In this paper, it was considered to investigate a new electrical architecture for the conversion of mechanical energy from renewable sources into electrical energy, fault tolerant and high energy and dynamic performance for the exploitation of marine renewable energy (MRE). The architecture to be investigated concerns a three-phase permanent magnet synchronous generator combined with a Vienna rectifier, with a topology that minimizes the number of active switches to increase the reliability of the energy conversion chain. Despite the high non-linearity of this architecture, this control is made possible through to the dynamic performance and control of the maximum switching frequency of the self-oscillating controller called the Phase-Shift Self-Oscillating Current-Controller (PSSOCC). The study of the impact of the connection of the PMSG neutral to the mid-point of the DC bus is being investigated.

Open-End Unidirectional Topologies With Reduced Controlled Switch Count

Three three-phase unidirectional open-end topologies with reduced active switch count are investigated in this paper. These configurations arise from the replacement of controlled switches by diodes, in order to reduce the system complexity. Furthermore, the costs are also reduced once less driver circuitry is needed. The proposed topologies make the ac–dc conversion of the power delivered by a permanent magnet synchronous machine operating at unity power factor. Each configuration is made out of two converters in which at least one is derived from the substitution of active switches in two-level legs or three-level neutral-point clamped legs. The proposed configurations have less switches, making it possible to obtain the same number of voltage levels (in relation with the conventional configurations) with half or quarter of the number of active switches. Also, the topologies are compared in terms of semiconductor power losses and harmonic distortion. The control strategy of the systems as well as a detailed model, simulation, and experimental results are presented.

Using of four-switch three-phase converter in the structure DPC of DFIG under unbalanced grid voltage condition

This paper proposes a novel direct power control (DPC) strategy for doubly fed induction generator (DFIG) drives fed by a four-switch three-phase converters (FSTPCs). In this method, two FSTPCs in rotor and grid side have been used instead of two six-switch three-phase converters (SSTPC). Reduction in the number of active switches will lead to improvement in reliability, reduction in costs and less conduction losses. The FSTPC will generate four unbalanced voltage vectors. A strategy used in order to balance these four voltage vectors. The introduced strategy is based on the emulation of the operation of the conventional SSTPC. In this method, four unbalanced voltage vectors that were generated by FSTPC somehow combined together which produced six balanced voltage vectors of the SSTPC. Then, the new switching table is written for new DPC method for DFIG. Also, during the unbalanced grid voltage condition, three selectable targets are provided for compensating active and reactive power, electromagnetic torque and stator current. These targets are added to power references and are caused decreasing the active and reactive power ripples, mitigation electromagnetic torque pulsations and sinusoidal and balanced stator currents. In the end, an economic comparison between two FSTPC and SSTPC is done. Also, the novel DPC method, i.e., use of FSTPC in rotor and grid side, is compared with prior DPC method, i.e., use of SSTPC in rotor and grid side, and its effectiveness is confirmed by simulation results from a 1-MW DFIG system.

Single-Phase DVR with Semi-Z-Source Inverter for Power Distribution Network

A novel topology of single-phase dynamic voltage restorer (DVR) is proposed to compensate the load voltage during voltage sag and voltage swell events. The semi-Z-source converter is utilised in its inverter operating mode for this proposed topology. The reduction in the number of active switches in the inverter and also in the current conduction path without compromising the output voltage range is the merit of the semi-Z-source inverter-based DVR against the commonly used full-bridge inverter-based DVR. The load voltage contains harmonics within the permissible limits when the compensation is performed by the semi-Z-source inverter-based DVR. The need for the filter circuit is eliminated; hence, the magnitude difference and the phase shift in the inverter output voltage due to the filter circuit are not present in the semi-Z-source inverter-based DVR. The proposed topology is cheap compared to the full-bridge inverter-based DVR topology. The simulations performed in MATLAB/Simulink environment are presented to validate the performance of the proposed topology. A comparison between the semi-Z-source inverter-based DVR and full-bridge inverter-based DVR is presented in this paper. The novel topology of DVR using semi-Z-source inverter is proved to be a better solution to the full-bridge inverter-based DVR.

Reducing Power Consumption in Data Centers by Jointly Considering VM Placement and Flow Scheduling

Two important components that consume the majority of IT power in data centers are the servers and the Data Center Network (DCN). Existing works fail to fully utilize power management techniques on the servers and in the DCN at the same time. In this paper, we jointly consider VM placement on servers with scalable frequencies and flow scheduling in the DCN, to minimize the overall system’s power consumption. Due to the convex relation between a server’s power consumption and its operating frequency, we prove that, given the number of servers to be used, computation workloads should be allocated to severs in a balanced way, to minimize the power consumption on servers. To reduce the power consumption of the DCN, we further consider the flow requirements among the VMs during VM allocation and assignment. Also, after VM placement, flow consolidation is conducted to reduce the number of active switches and ports. We notice that, choosing the minimum number of servers to accommodate the VMs may result in high power consumption on servers, due to servers’ increased operating frequencies. Choosing the optimal number of servers purely based on servers’ power consumption leads to reduced power consumption on servers, but may increase power consumption of the DCN. We propose to choose the optimal number of servers to be used, based on the overall system’s power consumption. Simulations show that, our joint power optimization method helps to reduce the overall power consumption significantly, and outperforms various existing state-of-the-art methods in terms of reducing the overall system’s power consumption.

Secondary-Side-Regulated Soft-Switching Full-Bridge Three-Port Converter Based on Bridgeless Boost Rectifier and Bidirectional Converter For Multiple Energy Interface

A systematic method for deriving soft-switching three-port converters (TPCs), which can interface multiple energy, is proposed in this paper. Novel full-bridge (FB) TPCs featuring single-stage power conversion, reduced conduction loss, and low-voltage stress are derived. Two nonisolated bidirectional power ports and one isolated unidirectional load port are provided by integrating an interleaved bidirectional Buck/Boost converter and a bridgeless Boost rectifier via a high-frequency transformer. The switching bridges on the primary side are shared; hence, the number of active switches is reduced. Primary-side pulse width modulation and secondary-side phase shift control strategy are employed to provide two control freedoms. Voltage and power regulations over two of the three power ports are achieved. Furthermore, the current/voltage ripples on the primary-side power ports are reduced due to the interleaving operation. Zero-voltage switching and zero-current switching are realized for the active switches and diodes, respectively. A typical FB-TPC with voltage-doubler rectifier developed by the proposed method is analyzed in detail. Operation principles, control strategy, and characteristics of the FB-TPC are presented. Experiments have been carried out to demonstrate the feasibility and effectiveness of the proposed topology derivation method.

A Step-Up Switched-Capacitor Multilevel Inverter With Self-Voltage Balancing

The objective of this paper is to propose a new inverter topology for a multilevel voltage output. This topology is designed based on a switched capacitor (SC) technique, and the number of output levels is determined by the number of SC cells. Only one dc voltage source is needed, and the problem of capacitor voltage balancing is avoided as well. This structure is not only very simple and easy to be extended to a higher level, but also its gate driver circuits are simplified because the number of active switches is reduced. The operational principle of this inverter and the targeted modulation strategies are presented, and power losses are investigated. Finally, the performance of the proposed multilevel inverter is evaluated with the experimental results of an 11-level prototype inverter.

Space vector PWM for three phase nine-switch AC-AC converter

This paper presents a new three-phase nine-switch AC-AC converter topology. The proposed converter grants sinusoidal inputs and sinusoidal outputs, unity input power factor, and low manufacturing cost, as a consequence of its reduced number of active switches (IGBTs) from 12 to 9 switches. The operating principle of the proposed converter was explained in detail. Its modulation scheme by using space vector modulation (SVM) technique is discussed. The total harmonic distortion (THD) of the rectifier side and inverter side are compared. Semiconductor loss analysis and comparison with the back-to-back two-level voltage source converter are presented. The proposed converter results signified the positive merits of this converter.

Multi‐input voltage‐summation converter based on switched‐capacitor

This study is to propose a multi-input converter which is designed based on switched-capacitor instead of magnetic components. The number of its inputs can be any figure. The output voltage level of the converter is the summation of its multiple input levels which share with a common neutral. There is no need to have any level-shift or boost-strap for adjusting the inputs. The number of active switches and capacitors required both are equal to the number of input sources. Only a pair of complementary pulse signals is needed to control all of these switches. The converter is operated under high frequency. Non-resonant version does not require resonant inductors and therefore they are of small size and simple structure. Small resonant inductor is also added in the resonant version to realise soft-switching and improve the conversion efficiency. The circuit analysis, design method and experimental verification are shown.

Analysis and Design of a Single-Stage High-Power-Factor Dimmable Electronic Ballast for Electrodeless Fluorescent Lamp

A methodological study of an electronic ballast for electrodeless fluorescent lamps (EFLs) including design and development issues is presented in this paper. The ballast is intended to feed a 100-W EFL at 250 kHz with dimming feature. The proposed topology is composed of a single-ended primary-inductance converter, used as power-factor (PF)-correction stage, integrated with a resonant half-bridge inverter, used as lamp-power control stage. The integration of both stages is proposed in this paper, in order to reduce the number of active switches, as well as to simplify the required driving and control circuitry for this application. Experimental results demonstrate the feasibility of the proposed solution that achieves 54% lamp-power dimming (46 W). The implemented topology attained very high PF (0.989) and low line-current total harmonic distortion (14.929%), without using electromagnetic interference filter, while the measured efficiency was 87% at nominal lamp power.

Extended-Boost $Z$-Source Inverters

The Z-source inverter has gained popularity as a single-stage buck-boost inverter topology among many researchers. However, its boosting capability could be limited, and therefore, it may not be suitable for some applications requiring very high boost demand of cascading other dc-dc boost converters. This could lose the efficiency and demand more sensing for controlling the added new stages. This paper is proposing a new family of extended-boost quasi Z -source inverter (ZSI) to fill the research gap left in the development of ZSI. These new topologies can be operated with same modulation methods that were developed for original ZSI. Also, they have the same number of active switches as original ZSI preserving the single-stage nature of ZSI. Proposed topologies are analyzed in the steady state and their performances are validated using simulated results obtained in MATLAB/Simulink. Furthermore, they are experimentally validated with results obtained from a prototype developed in the laboratory.

Characteristics of the Magnetic Energy Recovery Switch (MERS) as a Series FACTS Controller

Developing active series compensation in transmission systems is challenging due to the large currents and voltage capabilities required. The main purpose of this paper is to show that the magnetic energy recovery switch (MERS) can be an attractive new series compensator by applying appropriate control. The MERS is similar to a single-phase full bridge, meaning that compared to the gate-commutated series capacitor, it has twice the number of active switches. However, advantages, such as the double voltage-current operating range, eliminating the need for reverse blocking switches, zero current turn-on, and a lower current conduction period of each switch can make the MERS an attractive alternative. The basic characteristics of the MERS have been found to be similar to a series connection of a voltage source and a capacitor in steady state. With this dual characteristic, a control method has been developed where the minimization of the harmonics in the series-injected voltage and stable operation during large setpoint changes have been achieved. The resulting subharmonic characteristic also indicates a low risk of subsynchronous resonance. Experimental results verify the proposed configuration and control.