Design Of Nonlinear Circuits Research Articles

A review of crosstalk polymorphic circuits and their scalability

Using a control variable, the functionality of Polymorphic circuits can be modified, making them adaptable and useful for reconfiguring circuit behavior — all the way from gate level to system level. State-of-the art polymorphic circuits are based on custom non-linear circuit design or emerging devices such as ambipolar FET, configurable magnetic devices etc. While some of these approaches are inefficient in performance, others involve exotic devices. The Crosstalk computing based polymorphic circuits offer a fresh perspective. In Crosstalk, the interconnect interference between nanoscale metal lines is intentionally engineered to exhibit the programmable Boolean logic behavior. This approach relies on the coupling between metal lines and not on the transistors for computing, resulting in better scalability, security by obscurity, and fault tolerance by reconfiguration. Our novel approach is backed by the mathematical formulation that conveys the rationale to generalize and achieve a wide variety of polymorphic circuits. Our experiments, including design, simulation, and Power Performance Area (PPA) characterization results indicate that crosstalk circuits provide significant improvement in transistor count (about 3x), switching energy (2x), and speed (1.5x) for polymorphic logic circuits. In the best-case scenario, the transistor count reduction is 5x. This paper presents Crosstalk computing’s fundamentals, polymorphism and the scalability aspects to compete/co-exist with CMOS for digital logic implementations below 10 nm. Our scalability study uses Open Source 7 nm PDK, considers all process variation aspects and accommodates worst-case scenarios. The study results for various benchmark circuits show that the Crosstalk technology is a viable alternative to CMOS for digital logic implementations below 10 nm, having 48% density, 57% power, and 10% performance gains over equivalent CMOS counterparts. Finally, we compare Crosstalk Polymorphic Circuit design technique with similar approaches described in related works and discuss its features and constraints.

Optical soliton solutions, bifurcation, and stability analysis of the Chen-Lee-Liu model

The Chen-Lee -Liu model has many applications in assorted fields, particularly in the study of nonlinear dynamics, chaos theory, circuit design, signal processing, secure communications, encryption and decryption of chaotic signals, as well as cryptography. The modified extended auxiliary equation mapping method has been applied to the Chen-Lee-Liu model in this article and explores new wave profiles, such as singular periodic solutions, periodic solutions, and kink-type soliton solutions. The complex wave conversion is considered to make a simple differential equation. Three- and two-dimensional images are plotted using Mathematica and MATLAB, and their dispersion and nonlinearity effects are discussed. We also discuss the bifurcation analysis of the studied model. The stability of the equilibrium points is studied, and the phase portrait of the system is presented graphically. The obtained wave profiles might play an important role in telecommunication systems, fiber optics, and nonlinear optics.

Cost effective Tanh activation function circuits based on fast piecewise linear logic

In this paper, an approximate 16-bit non-linear Tanh function circuit design is proposed for activation function in neural networks and digital signal processing, which is based on piecewise linear calculation. By sacrificing acceptable accuracy in computation, the proposed logic circuit structure can furtherly improve the overall performance of the design, with marked reduction in delay, area and power consumption. Linear calculation segments with simple shift-and-add logic architectures are adopted for easy hardware implementation. Additionally, tailored bias tuning and approximate accumulator design make a fine balance between complexity and error distribution. The mean absolute error (MAE) of the entire design is 0.0049. Compared with other state-of-art works in 90 nm CMOS process, the area of the circuit is 582μm2, and the energy is 0.0996 mW/GHz at 0.71 GHz. Moreover, the area-delay product is reduced by over 79.7% and the energy-delay product is reduced by over 42.4%. In the evaluation of its suitability in large applications, the accurate Tanh circuit and the proposed Tanh circuit are adopted in two neural networks to classify the Fashion-MNIST data and emotional EEG data. When the model converges, the accuracies of the test set only differs with a maximum of 0.2% and 0.3%.

Crosstalk-Computing-Based Gate-Level Reconfigurable Circuits

The functionality of polymorphic circuits can be altered using a control variable. Owing to the multifunctional embodiment in polymorphic circuits, they are helpful to reconfigure circuit behavior from the gate level to the system level, either on the fly or off-line. The polymorphic circuit approaches available in the literature are either based on custom nonlinear circuit designs or special emerging devices, such as ambipolar FET and configurable magnetic devices. While some of these approaches are inefficient in performance, the other approaches involve exotic devices. We have proposed a novel polymorphic circuit design approach based on crosstalk (CT) computing, where we leverage deterministic signal interference between nanometal lines for logic computation and reconfiguration. In this article, we elaborate upon the polymorphic circuit design in CT computing through mathematical formulation, which conveys the rationale to generalize and achieve a wide variety of polymorphic circuits, and then demonstrate a comprehensive list of polymorphic circuit designs. In addition, all circuits are characterized and benchmarked against CMOS circuit implementations to gauge the benefits. Finally, we compare the CT polymorphic circuit approach with other approaches in the literature and highlight its unique features and limitations. The ability to design a wide range of polymorphic logic circuits (basic and complex logics) compact in design and minimal in transistor count is unique to CT computing, which leads to benefits in the circuit power, performance, and area (PPA). Our circuit designs, simulation, and PPA characterization results show that the polymorphic CT circuits provide <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3\times $ </tex-math></inline-formula> improvement in transistor count, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2\times $ </tex-math></inline-formula> improvement in switching energy, and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.5\times $ </tex-math></inline-formula> improvement in speed for polymorphic logic circuits. In the best-case, the transistor count reduction is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$5\times $ </tex-math></inline-formula> .

A Novel Chaotic System with Wide Spectrum, its Synchronization, Circuit Design and Application to Secure Communication

Objective: To investigate a novel chaotic system with unique features, its synchronization using nonlinear active control, analog circuit design and application to secure communication. Methods/Analysis: Dynamical tools such as dissipative analysis, instability of equilibrium points, sensitivity to initial conditions, 0-1 test, recurrence plot, Poincare map, Lyapunov exponents, Lyapunov dimension, frequency spectrum and basin of attraction. Synchronization is achieved using modified nonlinear active control technique and analog circuit design, implementation is done in NI Multisim platform. MATLAB and Multisim results are presented to meet the adequate verification of theoretical approach. Findings: A three-dimensional chaotic system with only two nonlinear terms, three parameters and a total of eight terms are proposed. The proposed system has three saddle focus type equilibria. The proposed system is topologically different from Lorenz’s and Rossler’s, Lu’s, Chen’s, and Liu’s families. Such dynamic systems are very few in the literature as per authors best knowledge. The system has basin of chaotic attractors for which first Lyapunov exponent ranges between 2.5 to 3. Frequency spectrum and large positive Lyapunov exponent result comparatively large bandwidth of the proposed systems against some well-known chaotic systems. Chaos, periodic and stable behaviors are obtained by altering the system parameters. Novelty/Application: The proposed three-dimensional chaotic system has significant chaotic behavior and broader spectrum than the six chaotic systems like Lorenz, Rossler, Lu, Chen, BG and Liu systems. Unlike the conventional active control approach, the proposed nonlinear active control does not result decoupled error dynamics. The system has significantly large bandwidth which is helpful in the masking of message signals and enhances the security of transmitted signals during communication. Keywords: Analog circuit design; Chaos; Chaotic system; Chaosbased communication; Chaos synchronization; Nonlinear active control

Study of the Start Point of Optimization Trajectories for Complex Strategies of the Circuit Design Process

The different design trajectories have been analyzed in the design space on the basis of the new system design methodology. Optimal position of the design algorithm start point was analyzed to minimize the CPU time. The initial point selection has been done on the basis of the before discovered acceleration effect of the system design process. The geometrical dividing surface was defined and analyzed to obtain the optimal position of the algorithm start point. The numerical results of the design of passive and active nonlinear electronic circuits confirm the possibility of the optimal selection of the starting point of the design algorithm.

Independent Period-2 Motions to Chaos in a van der Pol–Duffing Oscillator

In this paper, an independent bifurcation tree of period-2 motions to chaos coexisting with period-1 motions in a periodically driven van der Pol–Duffing oscillator is presented semi-analytically. Symmetric and asymmetric period-1 motions without period-doubling are obtained first, and a bifurcation tree of independent period-2 to period-8 motions is presented. The bifurcations and stability of the corresponding periodic motions on the bifurcation tree are determined through eigenvalue analysis. The symmetry breaks of symmetric period-1 motions is determined by the saddle-node bifurcations, and the appearance of the independent bifurcation tree of period-2 motions to chaos is also due to the saddle-node bifurcations. Period-doubling cascaded scenario of period-2 to period-8 motions are predicted analytically, and unstable periodic motions are also obtained. Numerical simulations are performed to illustrate motion complexity in such a van der Pol–Duffing oscillator. Such nonlinear systems can be applied in nonlinear circuit design and fluid-induced oscillations.

Optimization techniques for analog and RF circuit designs: an overview

Optimizations have gained much consideration from the researchers working in the domains of analog and radio frequency (RF), recently. Dealing with highly nonlinear behavior of active components and aiming to meet design specifications are common issues in all nonlinear circuit designs. As a consequence and accordingly, many studies have been conducted on diverse optimization methods and algorithms for tackling the design problems and meeting optimal solutions with high accuracy. The main purpose of this article is to provide a comprehensive and systematic literature review for the optimization approaches applied by the researchers for designing various analog and microwave circuits. We focus on considering the existing optimization methods from the newly published optimization methods in the last decade. Thus, this study can guide and enlighten complementary metal-oxide-semiconductor analog and RF microwave circuit designers to consider optimization methods commonly used in both areas and to expand conventional performance figures used in their area.

A reconfigurable analog predistorter using tunable impendence matching network

A reconfigurable analog predistoter (APD) based on tunable impedance matching network (TIMN) is proposed in this brief. Firstly, a design method to specific gain and phase conversions is introduced. The equivalent circuit parameters of the impedance matching network (IMN) can be computed for the desired gain and phase conversions. To simplify the design, these parameters can be transformed to the terminal impedance of the IMN. Then the complicated nonlinear circuits design can be transformed to the IMN design. Secondly, a reconfigurable APD using the proposed method is presented for high tuning capability. By designing the coverage area of the TIMN, an experimental reconfigurable APD for traveling-wave tube amplifiers (TWTAs) & solid-state power amplifiers (SSPAs) is designed and fabricated. The fabricated APD shows more than 21 dB tuning range of gain conversion and 114° tuning range of phase conversion in 5.7–6.3 GHz. Good linearity improvement has been obtained for a 45 W C-band TWTA and a 5 W SSPA only by changing the APD bias voltage.

Infinite attractors in a chaotic circuit with exponential memristor and Josephson junction resonator

Memristors play a vital role in the design of high density and low power memory devices. Considering the complex behaviour of memristor devices because of the feature that its memductance changes with the input current, these devices finds its applications in design of nonlinear circuits. Similarly, Josephson junction resonators also exhibit complex behaviours because of its inductive properties. To model the effect of magnetic flux effects on the Josephson junction devices, we introduce the memristor to produce the feedback effect between magnetic flux and junction potential. Such a circuit produce interesting complex behaviours and hence in this paper we propose a nonlinear chaotic oscillator in a memristor-Josephson junction combination. Due to the variation laws of the flux-controlled memductance, it will not always be the same when the excitation voltage changes and hence have their drawbacks in real word applications. Considering this, we use an exponential memristor which overcomes this problem and hence can be used in physical applications. By varying the type of the bias current, we could observe the property of megastability in the memristor-Josephson junction oscillator (when excited by an AC current), which was not been observed in real physical circuits. To show the applicational benefits of the proposed oscillator, we have discussed about the synchronisation of the master-slave memristor-Josephson junction oscillators and used it in secure communication systems.

Nonlinear Fractional-Order Circuits and Systems: Motivation, A Brief Overview, and Some Future Directions

In recent years, fractional-order differential operators, and the dynamic models constructed based on these generalized operators have been widely considered in design and practical implementation of electrical circuits and systems. Simultaneously, facing with fractional-order dynamics and the nonlinear ones in electrical circuits and systems enforces us to use more advanced tools (in comparison to those commonly used in design and analysis of linear fractional-order/nonlinear integer-order circuits and systems) for their analysis, design, and implementation. Discussing on such a motivation, this tutorial paper aims to provide an overview on the recent achievements in proposing effective tools for analysis and design of nonlinear fractional-order circuits and systems. Moreover, some open problems, which can specify future directions for continuing research works on the aforementioned subject, are discussed.

A New Design Methodology for Wideband Analog Predistorter With the Characteristics of Frequency-Dependent Gain and Phase Conversions

A novel design method, which can transform the nonlinear circuits design to the impedance matching network (IMN) design, is proposed for wideband analog predistoter (APD) with the characteristics of frequency-dependent gain and phase conversions in this paper. First, the design method for the desired gain and phase conversions is introduced. The ABCD parameters of the IMN can be computed. To simplify the design, the obtained parameters are transformed to the IMN terminal impedance. Then we can only need to design the IMN terminal impedance to obtain the desired transfer characteristics. In the meanwhile, an APD with 4.5 dB gain conversion and 50° phase conversion is designed and simulated to validate the design method for specify gain and phase conversions. The simulated results show good effectiveness of the design method. Second, for wideband application, the complex gain and phase conversions surface design is transformed to the IMN terminal impendence curve versus frequency design. This gives the designers a well-defined strategy for wideband APD design focusing on frequency-dependent phase conversion as well as gain conversion. To validate the proposed method, a wideband APD operating at K-band (17-20 GHz) is designed, fabricated and measured. A linearized 100W K-band TWTA is shown to achieve a noise power ratio (NPR) >20 dB at 3 dB output power back-off, and phase change <; 6.5° among the operating band.

Analog Neural Networks With Deep-Submicrometer Nonlinear Synapses

Analog computing is a promising approach to improve the silicon efficiency for inference accelerators in extremely resource-constrained environments. Existing analog circuit proposals for neural networks, however, fall short of realizing the full potential of analog computing because they implement linear synapses, leading to circuits that are either area inefficient or vulnerable to process variation. In this paper, we first present a novel nonlinear analog synapse circuit design that is dense and inherently less sensitive to process variation. We then propose an interpolation-based methodology to train nonlinear synapses built with deep-submicrometer transistors. Our analog neural network achieves a 29× and 582× improvement in computational density relative to state-of-the-art digital and analog inference accelerators, respectively.

Pole-Zero Identification: Unveiling the Critical Dynamics of Microwave Circuits Beyond Stability Analysis

The term pole-zero identification refers to obtaining the poles and zeros of a linear (or linearized) system described by its frequency response. This is usually done using optimization techniques (such as least squares, maximum likelihood estimation, or vector fitting) that fit a given frequency response of the linear system to a transfer function defined as the ratio of two polynomials [1], [2]. This kind of linear system identification in the frequency domain has numerous applications in a wide variety of engineering fields, such as mechanical systems, power systems, and electromagnetic compatibility. In the microwave domain, rational approximation is increasingly used to obtain black-box models of complex passive structures for model order reduction and efficient transient simulation. An extensive bibliography on the matter can be found in [3]-[6]. In this article, we focus on a different application of pole-zero identification. We review the different ways in which pole-zero identification can be applied to nonlinear circuit design, for power-amplifier stability analysis, and more. We provide a comprehensive view of recent approaches through illustrative application examples. Other uses for rational-approximation techniques are beyond the scope of this article.

Large-Signal Modeling and Experimental Design Automation of Self-Isolated Harmonic Oscillator for Pulling Effect Reduction

A class of self-isolated harmonic oscillator (SIHO) with a feedback-loop structure is able to significantly reduce the pulling effect without involving extra circuit complexity such as a buffer amplifier. In the first part of this paper, the operation principle of the SIHO is theoretically studied through equivalent circuit models and X-parameter techniques. Closed-form expressions are derived to represent the respective linear and nonlinear equivalent impedances of SIHO subnetworks perturbed by varied load and injected signals. A conventional feedback-loop oscillator structure delivering the fundamental tone is used for comparative study. Such a modeling technique reveals the physical principle and behavior parameters that have an impact on the pulling effect. The experimental verification of the SIHO operation principle and modeling is presented as the second part of this paper. To this end, a harmonic measurement and design system is proposed and implemented for the design of an exemplary SIHO, which delivers a 4-GHz signal with 16.6-dBm power, 28% dc-RF efficiency, and −136.5-dBc/Hz phase noise at 1-MHz offset. The design process does not rely on circuit simulation software packages or a prior knowledge of the large-signal model of transistors, thus demonstrating the concept of a model-free nonlinear circuit design automation based on the experimental optimization. The SIHO circuit model is validated with the measured X-parameters of its nonlinear subnetwork.

Design, Control, and Analysis of Nonlinear Circuits with Tunnel Diode with Piecewise Affine Dynamics

Design, Control, and Analysis of Nonlinear Circuits with Tunnel Diode with Piecewise Affine Dynamics

Automation of S-parameters measurements of high-power microwave transistors in a contact device with tunable strip matching circuits

In the practice by microwave power transistor amplifiers developing, the variable load method is usually used to determine the impedances of matching circuits in the complex conjugate matching mode. This solution involves the use of expensive equipment - coaxial impedance tuners and contact devices for mounting transistors in low impedance strip lines. An even more complicated and expensive way is the concept of X- parameters, based on the use of unique measuring equipment - a non-linear vector network analyzer, and a simulator for non-linear circuits design. The article proposes an alternative solution adapted to the operation of the transistor in real conditions and allowing to design the output stages of microwave power amplifiers using analysis and optimization of linear electrical circuits. The essence of the proposed solution is to automate the measurement of non-linear S-parameters of high-power microwave transistors in a contact device with tunable strip matching circuits for various DC supply voltage, frequency and input power mode in case of continuous or pulse input signal. The nonlinear S-parameters of the contact device are measured using the method of spatially remote variable load in the frequency range, in which the line conditioning and the maximum output power are achieved. The minimum of the reflected wave amplitude and the maximum gain are reached using movable strip matching transformers. The S-parameters measured in the coaxial line are automatically recalculated to the physical boundaries of the transistor by registering the positions of the input and output strip transformers.

Analysis and Design of Nonlinear Circuits With a Self-Consistent Carleman Linearization

In this paper, a procedure for the analysis and design of nonlinear circuits based on the Carleman linearization is presented. Since this procedure starts with the general network equations which are derived by Kirchhoff’s law, it can be used for a variety of circuits. The proposed procedure is applied for oscillator and RF mixer circuits which are a crucial part of every wireless communication system. Based on the general network equations, a transformation into equivalent polynomial differential equations is performed using the not widely known method of Kerner. This polynomial differential equation is further transformed into an equivalent infinite-dimensional system of linear differential equations. Since the infinite-dimensional linear system cannot be solved in general, an approximation by a finite one is performed using a self-consistent technique. The obtained finite linear system is used for the approximation of the infinite-dimensional linear system on a predefined interval. The approximation is utilized for the design and analysis process of the circuit, which is a challenging problem until now.

Novel Homotopy Theory for Nonlinear Networks and Systems and Its Applications to Electrical Grids

Homotopy methods have several useful applications in biology, economics, nonlinear circuit design, and electric power networks, among others. A novel homotopy theory and a convergence theorem are presented in this paper for general-purpose homotopy methods. It is shown that the derived analytical results are applicable to a class of large-scale integrated-circuit designs and protein interaction networks. In addition, an application of this theory is illustrated to prove the convergence of the homotopy-enhanced implicit Z-bus power-flow method. The existence of power-flow solutions for general distribution networks with distributed generators modeled as photovoltaic nodes is also justified. Numerical studies on the IEEE 37-bus, 123-bus, and 8500-node distribution networks are conducted to illustrate the set of sufficient conditions for the main theorem.

Establishment of Physical and Mathematical Models for Sr0.95Ba0.05TiO3Memristor

The Sr[Formula: see text]Ba[Formula: see text]TiO3(SBT) memristor is prepared using the monolayer Sr[Formula: see text]Ba[Formula: see text]TiO3nano-film structure. In order to apply it into the nonlinear circuit design, the SBT memristor is modeled in the paper. The voltage-controlled physical model of the SBT memristor is established based on its working mechanism. Due to the difficulty in determining the accurate parameters of the voltage-controlled physical model, a flux-controlled mathematical model of the SBT memristor is proposed, and its equivalence relation with the voltage-controlled physical model is proved. Moreover, the parameters of the flux-controlled mathematical model are determined by means of the quadratic polynomial interpolation method using the experimentally measured voltage and current data of the SBT memristor. The simulated [Formula: see text]–[Formula: see text] characteristic curve using the flux-controlled mathematical model coincides well with the measured [Formula: see text]–[Formula: see text] characteristic curves. The result indicates that the flux-controlled mathematical model with the definite parameters can be used to characterize the behaviors of the physical SBT memristor and guide its application to nonlinear circuit design.