Nonlinear Feedback Shift Registers Research Articles

Analyzing of Pseudo-Ring Memory Self- Testing Schemes with Algorithms

In this paper, scan and ring schemes of the pseudo-ring memory self-testing are investigated. Both schemes are based on emulation of the linear or nonlinear feedback shift register by memory itself. Peculiarities of the pseudo-ring schemes implementation for multi-port and embedded memories, and for register file are described. It is shown that only small additional logic is required and allows microcontrollers at-speed testing. Moreover, posteriori values are given for some types of memories faults coverage when pseudo-ring testing schemes are applied.

On the largest affine sub-families of a family of NFSR sequences

Recently nonlinear feedback shift registers (NFSRs) have frequently been used as building blocks for designing stream ciphers. Let NFSR (g) be an m-stage NFSR with characteristic function $${g=x_{0}\oplus g_{1}(x_{1},\cdots ,x_{m-1})\oplus x_{m}}$$ . Up to now there has been no known method to determine whether the family of output sequences of the NFSR (g), denoted by S(g), contains a sub-family of sequences that are exactly the output sequences of an NFSR(f) of stage n < m. This paper studies affine cases, that is, finding an affine function f such that S(f) is a subset of S(g). If S(g) contains an affine sub-family S(f) whose order n is close to m, then a large number of sequences generated by the NFSR (g) have low linear complexities. First, we give two methods to bound the maximal order of affine sub-families included in S(g). Experimental data indicate that if S(g) contains an affine sub-family of order not smaller than m/2, then the upper bound given in the paper is tight. Second, we propose two algorithms to solve affine sub-families of a given order n included in S(g), both of which aim at affine sub-families with the maximal order. Algorithm 1 is applicable when n is close to m, while the feasibility of Algorithm 2 relies on the distribution of nonlinear terms of g. In particular, if Algorithm 2 works, then its computation complexity is less than that of Algorithm 1 and it is quite efficient for a number of cases.

Physical Unclonable Function (PUF) Based Random Number Generator

Physical Unclonable Functions (PUFs) are widely used to generate random Numbers. In this paper we propose a new architecture in which an Arbiter Based PUF has been employed as a nonlinear function in Nonlinear Feedback Shift Register (NFSR) to generate true random numbers. The rate of producing the output bit streams is 10 million bits per second. The proposed RNG is able to pass all NIST tests and the entropy of the output stream is 7.999837 bits per byte. The proposed circuit has very low resource usage of 193 Slices that makes it suitable for lightweight applications.

PERIODS ON TWO KINDS OF NONLINEAR FEEDBACK SHIFT REGISTERS WITH TIME VARYING FEEDBACK FUNCTIONS

Grain and Trivium are the hardware-oriented finalists of the eSTREAM. They are both based on nonlinear feedback shift registers. In this paper, we study their generalized classes of nonlinear feedback shift registers with time varying feedback functions, namely, Grain-like and Trivium-like structures. Some interesting results regarding their periods are obtained.

On the Key Schedule of Mini-AES and S-AES Algorithms

Mini-AES and S-AES have been proposed in literature to serve as test beds for students and cryptographers. The key schedule generation of both these algorithms can be considered to be based on a non-linear feedback shift register (NFSR). In this paper, we study the key schedule algorithm used in Mini-AES and S-AES regarding two aspects: (a) to know whether any keys of Mini-AES as well as S-AES are weak in the sense that the round keys generated turn out to be same as the actual key (b) to evaluate the period of the sequence generated by the NFSR under various initial conditions. Further, the possibility of deriving the round keys fast as needed in decryption is also explored. Simulation results using C and implementation related evaluation are also presented.

Synthesis of Binary Machines

The problem of constructing a binary machine with the minimum number of stages generating a given binary sequence is addressed. Binary machines are a generalization of nonlinear feedback shift registers (NLFSRs) in which both connections, feedback and feedforward, are allowed and no chain connection between the register stages is required. An algorithm for constructing a shortest binary machine generating a given periodic binary sequence is presented.

Finding Matching Initial States for Equivalent NLFSRs in the Fibonacci and the Galois Configurations

The Fibonacci and the Galois configurations of nonlinear feedback shift registers (NLFSRs) are considered. In the former, the feedback is applied to the input bit of the shift register only. In the latter, the feedback can potentially be applied to every bit. The sufficient conditions for equivalence of NLFSRs in the Fibonacci and the Galois configurations have been formulated previously. The equivalent NLFSRs in different configurations normally have to be initialized to different states to generate the same output sequences. The mapping between the initial states of two equivalent NLFSRs in the Fibonacci and the Galois configurations is derived in this paper.

On Feedback Functions of Maximum Length Nonlinear Feedback Shift Registers

Feedback shift registers are basic building blocks for many cryptographic primitives. Due to the insecurities of Linear Feedback Shift Register (LFSR) based systems, the use of Nonlinear Feedback Shift Registers (NFSRs) became more popular. In this work, we study the feedback functions of NFSRs with period 2n. First, we provide two new necessary conditions for feedback functions to be maximum length. Then, we consider NFSRs with k-monomial feedback functions and focus on two extreme cases where k = 4 and k = 2n-1. We study construction methods for these special cases.

Generation of quasigroup for cryptographic application

A method of generating a practically unlimited number of quasigroups of a (theoretically) arbitrary order using the computer algebra system Maple 7 is presented. This problem is crucial to cryptography and its solution permits to implement practical quasigroup-based endomorphic cryptosystems. The order of a quasigroup usually equals the number of characters of the alphabet used for recording both the plaintext and the cipher text. Moreover, it can be used for varied information viz . text, image, etc. Many of the on going algorithms uses NLFSR to generate pseudo random sequence and thus the suggested method can be integrated in any of the existing pseudo random sequence to further enhance their complexity. The implementation of PRSG using quasi group processing is highly scalable and fairly unpredictable. It has passed all publicly available random sequence generator tests. That is exactly what this paper provides: fast and easy ways of generating quasigroups of order up to 256 and a little more.

A Transformation From the Fibonacci to the Galois NLFSRs

Conventional nonlinear feedback shift registers (NLFSRs) use the Fibonacci configuration in which the feedback is applied to the last bit only. In this paper, we show how to transform a Fibonacci NLFSR into an equivalent NLFSR in the Galois configuration, in which the feedback can be applied to every bit. Such a transformation can potentially reduce the depth of the circuits implementing feedback functions, thus decreasing the propagation time and increasing the throughput.

NSG : 비선형 알고리즘을 이용한 블루투스 E0암호화시스템의 성능 개선

합산수열 발생기는 간단한 하드웨어 또는 소프트웨어로 구현될 수 있고, 주기와 선형복잡도가 높은 특징이 있어 유비쿼터스 시대의 이동환경 보안장치에 적합하다. 하지만 Golic의 상관성공격과 Meier의 고속 상관성공격에 의해 취약성이 노출되었다. 본 논문에서는 합산 수열 발생기 형태의 <TEX>$E_0$</TEX> 알고리즘에서 LFSR과 비선형 귀환 이동 레지스터 NFSR(nonlinear feedback shift register) 를 조합한 형태로 개선하여 비선형성을 높이고, 상관성 공격 등의 암호해독이 어려운 새로운 알고리즘 NSG를 제안하고, 제안 알고리즘에 대하여 안전성 및 성능을 분석하였다. Summation generator can be easily made as a simple hardware or software and it's period and linear complexity are very high. So it is appropriate to mobile security system for ubiquitous environment. But it showed us the weakness by Golic's correlation attack and Meier's fast correlation attack. In this paper, we proposed a Nonlinear Summation Generator(NSG), which is improved by using LFSR and NFSR(nonlinear feedback shift register), is different from <TEX>$E_0$</TEX> algorithm which use only LFSR in summation generator. It enhanced nonlinearity and is hard to decipher even though the correlation attack or fast correlation attack. We also analyzed the security aspects and the performances for the proposed algorithm.

Cryptanalysis of a New Stream Cipher Structure

This paper studies the security of a newly proposed stream cipher structure based on linear feedback shift register,nonlinear feedback shift register and filter Boolean functions.A distinguishing attack on this structure is presented.An example is illustrated to show the effectiveness of this attack.This new attack suggests that this new stream cipher structure has potential security weakness.

Clock-controlled key-stream generator and its cryptographic properties

A new clock-controlled key-stream generator is proposed in this paper. The generator is composed of three shift registers: two clock-controlled linear feedback shift registers, A and B, and one clock-controlled nonlinear feedback shift register C. The clock-controlled information is from two bit strings of feedback shift register C. The times A and B shift are according to the Hamming weights of the two strings, respectively. The period, the linear complexity and the k error linear complexity of the key-stream generator are studied, and the security of it is analyzed.

On the Nonlinear Complexity and Lempel–Ziv Complexity of Finite Length Sequences

The nonlinear complexity of binary sequences and its connections with Lempel-Ziv complexity is studied in this paper. A new recursive algorithm is presented, which produces the minimal nonlinear feedback shift register of a given binary sequence. Moreover, it is shown that the eigenvalue profile of a sequence uniquely determines its nonlinear complexity profile, thus establishing a connection between Lempel-Ziv complexity and nonlinear complexity. Furthermore, a lower bound for the Lempel-Ziv compression ratio of a given sequence is proved that depends on its nonlinear complexity.

Maximal-Period Sequences Generated by Feedback-Limited Nonlinear Shift Registers

We propose feedback-limited NFSRs (nonlinear feedback shift registers) which can generate periodic sequences of period 2k-1, where k is the length of the register. We investigate some characteristics of such periodic sequences. It is also shown that the scale of such NFSRs can be reduced by the feedback limitation. Some simulation and experimental results are shown including comparison with LFSRs (linear feedback shift registers) for conventional M-sequences and Gold sequences.

Cryptanalysis of Achterbahn-Version 1 and -Version 2

Achterbahn is one of the candidate stream ciphers submitted to the eSTREAM, which is the ECRYPT Stream Cipher Project. The cipher Achterbahn uses a new structure which is based on several nonlinear feedback shift registers (NLFSR) and a nonlinear combining output Boolean function. This paper proposes distinguishing attacks on Achterbahn-Version 1 and -Version 2 on the reduced mode and the full mode. These distinguishing attacks are based on linear approximations of the output functions. On the basis of these linear approximations and the periods of the registers, parity checks with noticeable biases are found. Then distinguishing attacks can be achieved through these biased parity checks. As to Achterbahn-Version 1, three cases that the output function has three possibilities are analyzed. Achterbahn-Version 2, the modification version of Achterbahn-Version 1, is designed to avert attacks based on approximations of the output Boolean function. Our attack with even much lower complexities on Achterbahn-Version 2 shows that Achterbahn-Version 2 cannot prevent attacks based on linear approximations.

On Transformation between Discretized Bernoulli and Tent Maps

In this paper, it is proved that there is a transformation between two types of nonlinear feedback shift register which can be regarded as implementation of the Bernoulli and tent maps with finite precision. This transformation can be interpreted as a sort of finite dimension version of topological conjugation between the Bernoulli and tent maps on continuous phase space. Several properties of periodic sequences generated from extended NFSRs are derived from the relation.

B16: Genetic programming in feedback registers designing

In BIST structures feedback registers play the role of test generators and test response compactors. Linear feedback shift registers (LFSR) are here of predominating importance. These registers are relatively simple in designing. Non-linear feedback shift registers designing to diagnostic aims is considerably more complicated. The possibility to use the genetic programming to design the non-linear feedback shift registers is presented in the article. Usefulness of this approach to design the registers helpful in the BIST structures is testified by numerous examples.

Synthesis of minimal cost nonlinear feedback shift registers

This paper is concerned with the determination of the “minimal” nonlinear feedback shift register (NLFSR) that generates a given sequence. A total ordering between structural vectors that takes into account the implementation cost is specified. Minimality is defined with respect to this ordering. A block as well as a sequential algorithm are developed that combine a linear dependence test implemented by an extension of the Fundamental Iterative Algorithm (EFIA) with a minimality procedure that traces the totally ordered structural vectors.

Switching activity generation with automated BIST synthesis for performance testing of interconnects

A novel scheme of synthesizing nonlinear feedback shift register structures that can be superimposed on the boundary of the component of a system under test to generate interconnect switching activities that resemble real life interconnect switching profiles is proposed. The goal is to perform at-speed interconnect test while simultaneously capturing the dynamic switching effects such as crosstalk and ground bounce, as accurately as possible during interconnect built-in self-test. A library of nonlinear feedback shift register structures called precharacterized test pattern generators (P-TPGs) is constructed. Components of P-TPGs can be modeled using Markov chain and can be interconnected together in specific ways to recreate the switching activity profile of the interconnections being tested. The unique advantage of this scheme is that there is no simulation overhead since P-TPG components are precharacterized by solving Markov equations analytically. An integrated genetic algorithm-based search and optimization technique for finding the best P-TPG component among various possible implementations and matching its activity profiles with those of the interconnections under test has been designed and implemented synthesis for testability allows generation of the worst case interconnect switching activities. Experimental results confirm the validity of our approach.