Neutral Point Diode Clamped Research Articles

Asymmetric Neutral Point Diode Clamped Topology with Reduced Component Count for Switched Reluctance Machine Drive

The Reduced Asymmetric Neutral Point Clamped converter topology for unipolar driven, multiphase switched reluctance machines is proposed in this paper. This topology shares similarities with the conventional NPC and Asymmetric-NPC topologies, however it is unique in that the components for the capacitor string and outer semiconductor switches are shared among all the phases for a reduced component count. Some switching state combinations are not possible during commutation overlap between motor phases, resulting in minor torque transients during regenerative braking. A custom modulation scheme is implemented with fixed frequency, phase-shifted carrier waveforms that allow for automatic balancing of the neutral point voltage and interleaved switching of the semiconductor switches. A simple torque observer control architecture is used with minor adjustments for arbitrating torque contribution priorities between phases during handover.

Capacitor Voltage Balancing for Neutral Point Clamped Dual Active Bridge Converters

A capacitor voltage balancing method is proposed for a full-bridge neutral point diode clamped (NPC) dual-active bridge (DAB) converter. In existing literature, capacitor voltage balancing is achieved by actively selecting between the small voltage vectors, i.e., connecting either the upper or the lower capacitor on the dc bus to the transformer winding, on the basis of measured voltage mismatch. These balancing methods are dependent on the direction of power flow through the DAB converter. In this work, we propose a voltage balancing controller, which is independent of power flow direction and does not require adjustments of active voltage vectors through the modulator. Irrespective of the direction of transformer current, by dynamically shifting the switching instants of the inner switch pairs in the two NPC legs during the free-wheeling/zero voltage vector time, either of the two capacitors can be selectively charged without introducing any offsets in the voltage-second seen by the transformer. A simple bidirectional phase-shift modulator is designed to facilitate voltage balancing irrespective of power flow direction or mode of operation. The proposed method is highly and universally effective under any converter operating condition and was verified and demonstrated through analysis, simulation, and hardware experiments using a laboratory prototype.

A Neutral-Point Diode-Clamped Converter With Inherent Voltage-Boosting for a Four-Phase SRM Drive

This article proposes a new asymmetric neutral-point diode-clamped (NPC) multilevel converter for a four-phase switched reluctance motor drive. The inbuilt NPC clamping capacitors are used for both voltage level clamping and also as dc rail voltage-boosting capacitors to increase the output power of the motor, particularly for high-speed electric vehicle applications. The new converter allows regenerative energy to be recovered back to the dc supply for rapid machine braking, thus increasing overall drive efficiency. Analysis of the different modes of converter operation, along with design equations for sizing the voltage-boosting capacitors, is detailed. The effect of capacitance on boost voltage and increased motor base speed is presented. Simulation and experimental results confirm the effectiveness of the proposed converter.

An Asymmetric Three-Level Neutral Point Diode Clamped Converter for Switched Reluctance Motor Drives

An asymmetric three-level neutral point diode clamped converter for switched reluctance motor drives is proposed in this paper. The modulation method, the dc-link voltage balancing algorithm, and the current control scheme of this converter are presented. The proposed three-level converter is compared with the conventional two-level asymmetric half-bridge converter in terms of cost, current ripple, noise, and power losses. Compared to the conventional two-level converter, the proposed three-level converter has much lower current ripple, lower noise, and higher efficiency. The effectiveness of the proposed converter is verified by both simulation and experimental results.

Control of High-Power Wind Energy Conversion System Fed by Multi-level Converters

The progress of Variable Speed Wind Turbine Systems (VS-WTS) is currently focused in reaching higher power ratings (8MW). Also, medium voltage operation is at this power level, particularly at electrical network, a required feature. Consequently, high power medium-voltage multilevel converters for VS-WTS have been attracting more and more attentions. Nevertheless, most modern high-power VS-WTS consist of a large number of Wind Turbine Generators (WTGs) connected and operating simultaneously to reach the multi-megawatt level. This study presents a control strategy for a grid-connected onshore wind farm based Permanent Magnet Synchronous Generator (PMSG), where cascaded multilevel converters are employed on the generators and grid side. The generator-side converters provide speed control of the turbine-generator units to implement Maximum Power Point Tracking. The grid side Neutral Point diode Clamped (NPC) converter system regulates reactive and real power flow to the electrical network. So, it regulates the dc bus voltage and the ac side power-factor. The modulation technique for the proposed topology is developed from Space Vector Modulation. The overall control approaches of a rectifiers and an NPC are also described. Nonlinear Sliding Mode technique (NL-SM) with speed control and Vector Oriented Control are developed. To validate the proposed approaches, simulations are carried out on a high-power wind energy conversion system with multi-level converters and MATLAB/Simulink software. The simulation results demonstrate a good performance in diverse scenarios.

A Modular Multilevel Converter with Power Mismatch Control for Grid-Connected Photovoltaic Systems

A modular multilevel power converter configuration for grid connected photovoltaic (PV) systems is proposed. The converter configuration replaces the conventional bulky line frequency transformer with several high frequency transformers, potentially reducing the balance of systems cost of PV systems. The front-end converter for each port is a neutral-point diode clamped (NPC) multi-level dc-dc dual-active bridge (ML-DAB) which allows maximum power point tracking (MPPT). The integrated high frequency transformer provides the galvanic isolation between the PV and grid side and also steps up the low dc voltage from PV source. Following the ML-DAB stage, in each port, is a NPC inverter. N number of NPC inverters’ outputs are cascaded to attain the per-phase line-to-neutral voltage to connect directly to the distribution grid (i.e., 13.8 kV). The cascaded NPC (CNPC) inverters have the inherent advantage of using lower rated devices, smaller filters and low total harmonic distortion required for PV grid interconnection. The proposed converter system is modular, scalable, and serviceable with zero downtime with lower foot print and lower overall cost. A novel voltage balance control at each module based on power mismatch among N-ports, have been presented and verified in simulation. Analysis and simulation results are presented for the N-port converter. The converter performance has also been verified on a hardware prototype.

A Self-Tuning Filter-Based Adaptive Linear Neuron Approach for Operation of Three-Level Inverter-Based Shunt Active Power Filters under Non-Ideal Source Voltage Conditions

This paper presents a self-tuning filter (STF)-based adaptive linear neuron (ADALINE) reference current generation algorithm to enhance the operation of a three-phase three-level neutral-point diode clamped (NPC) inverter-based shunt active power filter (SAPF) under non-ideal (unbalanced and/or distorted) source voltage conditions. SAPF is an effective and versatile mitigation tool for current harmonics. As for its controller, ADALINE-based reference current generation algorithmd have widely been applied and proven to work effectively under balanced and purely sinusoidal source voltage conditions. However, no work has been conducted to study its performance under non-ideal source voltage conditions. In this work, a STF-based fundamental voltage extraction algorithm is integrated with an ADALINE algorithm, serving as synchronizer algorithm to ensure in-phase operation of the generated reference current with the non-ideal source voltage. Hence, it completely eliminates any dependency on conventional synchronizer algorithms such as phase-locked loop (PLL) and zero-crossing detector (ZCD). Additionally, the proposed STF-based ADALINE algorithm implements the modified Widrow-Hoff (W-H) weight updating algorithm for fast generation of reference current. Both simulation and experimental works are performed to verify design concept and effectiveness of the proposed algorithm. Comparative study with another recently reported algorithm is performed to investigate the performance improvement achieved by SAPF while using the proposed algorithm.

A Refined Self-Tuning Filter-Based Instantaneous Power Theory Algorithm for Indirect Current Controlled Three-Level Inverter-Based Shunt Active Power Filters under Non-sinusoidal Source Voltage Conditions

In this paper, a refined reference current generation algorithm based on instantaneous power (pq) theory is proposed, for operation of an indirect current controlled (ICC) three-level neutral-point diode clamped (NPC) inverter-based shunt active power filter (SAPF) under non-sinusoidal source voltage conditions. SAPF is recognized as one of the most effective solutions to current harmonics due to its flexibility in dealing with various power system conditions. As for its controller, pq theory has widely been applied to generate the desired reference current due to its simple implementation features. However, the conventional dependency on self-tuning filter (STF) in generating reference current has significantly limited mitigation performance of SAPF. Besides, the conventional STF-based pq theory algorithm is still considered to possess needless features which increase computational complexity. Furthermore, the conventional algorithm is mostly designed to suit operation of direct current controlled (DCC) SAPF which is incapable of handling switching ripples problems, thereby leading to inefficient mitigation performance. Therefore, three main improvements are performed which include replacement of STF with mathematical-based fundamental real power identifier, removal of redundant features, and generation of sinusoidal reference current. To validate effectiveness and feasibility of the proposed algorithm, simulation work in MATLAB-Simulink and laboratory test utilizing a TMS320F28335 digital signal processor (DSP) are performed. Both simulation and experimental findings demonstrate superiority of the proposed algorithm over the conventional algorithm.

Neutral‐point voltage deviation control for three‐level inverter‐based shunt active power filter with fuzzy‐based dwell time allocation

Three-level inverters have emerged as the main alternative to replace the use of standard two-level inverters in current harmonics mitigation. Neutral-point diode clamped (NPC) inverter is the most attractive candidate due to its robustness. However, the inherent neutral-point voltage deviation problems have always been the most troublesome features of NPC inverter. Hence, voltage balancing of DC-link capacitors is highly essential, where it is usually achieved through proper switching control. Space vector pulsewidth modulation is the most desirable switching scheme, where the voltage balancing control is mostly accomplished by decently allocating the dwell time for all the switching states. In this study, a fuzzy logic controller is incorporated to systematically control the dwell time allocation for all the switching states based on the instantaneous voltage of splitting DC-link capacitors. The proposed method is called the fuzzy-based dwell time allocation algorithm. To validate effectiveness and feasibility of the proposed algorithm, simulation work in MATLAB-Simulink and experimental implementation utilising TMS320F28335 digital signal processor (DSP) are performed. Both simulation and experimental results are presented, confirming effectiveness of the proposed algorithm in reducing the inherent voltage deviation problems of NPC inverter to a minimum level.

A Simplified Synchronous Reference Frame for Indirect Current Controlled Three-level Inverter-based Shunt Active Power Filters

This paper presents a new simplified harmonics extraction algorithm based on the synchronous reference frame (SRF) for an indirect current controlled (ICC) three-level neutral point diode clamped (NPC) inverter-based shunt active power filter (SAPF). The shunt APF is widely accepted as one of the most effective current harmonics mitigation tools due to its superior adaptability in dynamic state conditions. In its controller, the SRF algorithm which is derived based on the direct-quadrature (DQ) theory has played a significant role as a harmonics extraction algorithm due to its simple implementation features. However, it suffers from significant delays due to its dependency on a numerical filter and unnecessary computation workloads. Moreover, the algorithm is mostly implemented for the direct current controlled (DCC) based SAPF which operates based on a non-sinusoidal reference current. This degrades the mitigation performances since the DCC based operation does not possess exact information on the actual source current which suffers from switching ripples problems. Therefore, three major improvements are introduced which include the development of a mathematical based fundamental component identifier to replace the numerical filter, the removal of redundant features, and the generation of a sinusoidal reference current. The proposed algorithm is developed and evaluated in MATLAB / Simulink. A laboratory prototype utilizing a TMS320F28335 digital signal processor (DSP) is also implemented to validate effectiveness of the proposed algorithm. Both simulation and experimental results are presented. They show significant improvements in terms of total harmonic distortion (THD) and dynamic response when compared to a conventional SRF algorithm.

Investigation of the Common Mode Voltage for a Neutral-Point-Clamped Multilevel Inverter Drive and its Innovative Elimination through SVPWM Switching-State Redundancy

The purpose of this paper is to provide a comprehensive Investigations and its control on the common mode Voltage (CMV) of the three-phase three-level neutral-point diode-clamped (NPC) multilevel inverter (MLI). A widespread space-vector pulse width modulation (SVPWM) technique to mitigate the perpetual problem of the NPC-MLI, the CMV, proposed. The proposed scheme is an effectual blend of nearest three vector (NTV) and selected three vector (STV) techniques. This scheme is capable to reduce the CMV without compromise the inverter output voltage and Total harmonics distraction (THD). CMV reduction achieved less than +Vdc/6 using the proposed vector selection procedure. The theoretical Investigations, the MATLAB software based computer simulation and Field Programmable Gate Array (FPGA) supported hardware corroboration have shown the superiority of the proposed technique over the conventional SVPWM schemes.

DC-Link Capacitor Voltage Regulation for Three-Phase Three-Level Inverter-Based Shunt Active Power Filter with Inverted Error Deviation Control

A new control technique known as inverted error deviation (IED) control is incorporated into the main DC-link capacitor voltage regulation algorithm of a three-level neutral-point diode clamped (NPC) inverter-based shunt active power filter (SAPF) to enhance its performance in overall DC-link voltage regulation so as to improve its harmonics mitigation performances. In the SAPF controller, DC-link capacitor voltage regulation algorithms with either the proportional-integral (PI) or fuzzy logic control (FLC) technique have played a significant role in maintaining a constant DC-link voltage across the DC-link capacitors. However, both techniques are mostly operated based on a direct voltage error manipulation approach which is insufficient to address the severe DC-link voltage deviation that occurs during dynamic-state conditions. As a result, the conventional algorithms perform poorly with large overshoot, undershoot, and slow response time. Therefore, the IED control technique is proposed to precisely address the DC-link voltage deviation. To validate effectiveness and feasibility of the proposed algorithm, simulation work in MATLAB-Simulink and experimental implementation utilizing a TMS320F28335 Digital Signal Processor (DSP) are performed. Moreover, conventional algorithms with PI and FLC techniques are tested too for comparison purposes. Both simulation and experimental results are presented, confirming the improvement achieved by the proposed algorithm in terms of accuracy and dynamic response in comparison to the conventional algorithms.

Enhanced Instantaneous Power Theory with Average Algorithm for Indirect Current Controlled Three-Level Inverter-Based Shunt Active Power Filter under Dynamic State Conditions

An enhanced harmonics extraction algorithm based on Instantaneous Power (PQ) Theory is proposed for indirect current controlled (ICC) three-level neutral point diode clamped (NPC) inverter-based shunt active power filter (SAPF). SAPF is famous in current harmonics mitigation for its flexibility in dealing with dynamic state conditions. As for its controller, PQ Theory has served the major role in harmonics extraction algorithm due to its simple implementation features. However, it suffers from serious time delay due to its dependency on sluggish numerical filters. Furthermore, the algorithm is mostly designed to suit the operation of direct current controlled (DCC) SAPF which requires the knowledge of actual SAPF current (injection current). This leads to inaccurate mitigation as the injection current does not possess the exact information on actual source current which suffers from switching ripples problems. Therefore, two major modifications are introduced involving the development of mathematical average algorithm to replace numerical filter for fundamental real power computation and the formation of mathematical current relationship to change DCC to ICC based operation. The proposed algorithm is developed and evaluated in MATLAB/Simulink. From the simulation results, significant improvement in terms of Total Harmonic Distortion (THD) and response time is presented in comparison to conventional algorithm.

Analysis of a Multilevel Dual Active Bridge (ML-DAB) DC-DC Converter Using Symmetric Modulation

Dual active bridge (DAB) converters have been popular in high voltage, low and medium power DC-DC applications, as well as an intermediate high frequency link in solid state transformers. In this paper, a multilevel DAB (ML-DAB) has been proposed in which two active bridges produce two-level (2L)-5L, 5L-2L and 3L-5L voltage waveforms across the high frequency transformer. The proposed ML-DAB has the advantage of being used in high step-up/down converters, which deal with higher voltages, as compared to conventional two-level DABs. A three-level neutral point diode clamped (NPC) topology has been used in the high voltage bridge, which enables the semiconductor switches to be operated within a higher voltage range without the need for cascaded bridges or multiple two-level DAB converters. A symmetric modulation scheme, based on the least number of angular parameters rather than the duty-ratio, has been proposed for a different combination of bridge voltages. This ML-DAB is also suitable for maximum power point tracking (MPPT) control in photovoltaic applications. Steady-state analysis of the converter with symmetric phase-shift modulation is presented and verified using simulation and hardware experiments.

A Vector Selection Approach Based on Control Degree of Freedom to Provide DC-Link Voltage Balancing in Diode Clamped Multilevel Inverter

The purpose of this paper is to provide a comprehensive control on the DC-link voltage of the three-phase three-level neutral-point diode-clamped (NPC) multilevel inverter (MLI). A generalised space vector pulse width modulation (SVPWM) technique to mitigate the perpetual problem of the NPC-MLI, the DC- link imbalance, is proposed. The proposed scheme is an effectual blend of nearest three vector (NTV) and selected three vector (STV) techniques. This scheme is capable of maintaining the DC-link balance within a specified tolerance value for any modulation index and also for a wide range of load variation. DC-link balance is achieved as close as 0.25% using the proposed vector selection procedure. The theoretical study, the MATLAB software based computer simulation and Field Programmable Gate Array (FPGA) supported hardware corroboration have shown the superiority of the proposed technique over the conventional SVPWM schemes

Neutral Point Diode Clamped Multi-Level Control of Dstatcom by Using Fuzzy Gain Scheduling PI and Fuzzy Logic Controllers

This paper presents the three – level neutral point diode clamped inverter is used in a distribution static compensator (DSTATCOM), making use of the multi advantages of low harmonics distortion and reduced switching losses. The pulse width modulation (PWM) inverter is employed as DSTATCOM compensating reactive power and eliminates the harmonics drawn from a non-linear load. A fuzzy gain scheduled proportional and integral (FGPI) dc voltage proposed for inverter dc voltage control to improve the performances of three – levels DSTATCOM and fuzzy logic current controller is proposed to reduce harmonic supply currents for DSTATCOM. The D-Q reference frame theory is generate the reference compensating currents for three DSTATCOM. The three-level DSTATCOM with control schemes is implemented in Matlab/Simulink platform. The simulation results show that the system with proposed control schemes provides a good inverter dc voltage regulation, reduced harmonics distortion in supply current and in phase with line voltage.

A Unified Dynamic Model and Control for the Voltage-Sourced Converter Under Unbalanced Grid Conditions

This paper introduces and develops i) a novel unified dynamic model, and ii) new control schemes for a grid-connected static energy conversion system that is based on the voltage-sourced converter (VSC) configuration. The model and the controls are applicable to both the conventional two-level and the three-level neutral point diode clamped (NPC) VSCs. The model is unified since it represents the dynamic behavior of the with respect to both positiveand negative-sequence components, due to unbalanced grid conditions and disturbances. To develop the unified model, the concepts of generalized sinusoidal pulse-width modulation (SPWM) and VSC sequence subsystems are presented. Based on the negative-sequence subsystem control, a new control strategy, to either balance the ac line currents or to mitigate dc-bus voltage ripples, is introduced. Application of the developed model and the controls to a variable-speed wind-power unit is presented in the paper.

A Neutral-Point Clamped Converter System for Direct-Drive Variable-Speed Wind Power Unit

Recent and ongoing developments in wind turbine technology indicate a trend towards utilization of high capacity (e.g., up to 5 MW) wind power units in large wind farms. Higher capacity of the wind turbine necessitates operation of the corresponding electric machine and the static converter system at higher voltages. This paper presents a neutral point diode clamped (NPC) converter system that inherently accommodates higher voltage and power ratings of a high capacity wind power unit. The overall control strategy of an NPC-based wind power unit and the details of the ac side and the dc side controls of the NPC converter system are also described. The generator-side NPC converter provides torque-speed control of the turbine-generator unit. The network-side NPC converter controls real and reactive power flow to the network and thus regulates the dc bus voltage and the ac side power-factor (or voltage) respectively. The paper also presents a new control approach to balance the dc capacitor voltages. The NPC converter system is augmented with a dc chopper that controls the synchronous generator field current. The NPC-based converter system is used to interface a 3 MW, direct-drive (gearless), synchronous machine based wind power unit to the utility grid. Performance of the overall NPC-based wind power unit, under the proposed controls, is evaluated based on time domain simulations in the power systems computer aided design (PSCAD) electromagnetic transient for DC (EMTDC) environment.

An Accurate Model for the DC-Side Voltage Control of the Neutral Point Diode Clamped Converter

This paper presents an in depth analysis to show that the conventional power balance model for the dc-side control of the Neutral Point Diode Clamped (NPC) converter is not adequately accurate for all operating conditions. The inaccuracy is due to the fact that the instantaneous power of the ac-side inductors is assumed to be negligible in the power balance equation. This paper shows that this assumption obscures (i) the impact of operating point which is a direct consequence of the inherent nonlinear nature of the problem and (ii) the nonminimum-phase property of the plant in the rectifying mode of operation. Thus, the conventional dc-side control model may lead to unsatisfactory performance or even instability. To overcome the shortcoming, this paper also develops accurate nonlinear and linearized models for the dc-side controller design, including the impact of the ac-side interface reactors. The analytical results and the conclusions are validated by digital time-domain simulation of a study system in the PSCAD/EMTDC environment. The mathematical developments and conclusions of the paper are equally applicable to the conventional two-level VSC.

Dynamic Model and Control of the NPC-Based Back-to-Back HVDC System

This paper presents a comprehensive model of the Back-to-Back (BtB) HVDC system based on the three-level Neutral-Point Diode Clamped (NPC) converter. Based on the developed model, a systematic design procedure for i) the ac-side controllers, ii) the voltage balancer of the dc-side capacitors, and iii) the net dc-bus voltage controller, are presented. The model is developed based on the generalized state-space averaging method and the principle of power balance. The developed model precisely describes the system dynamics if the ac grids are strongly or moderately stiff, and offers acceptable precision otherwise. The averaged nature of the model inherently renders itself for analysis in the SIMULINK/MATLAB environment, and thus provides a computationally efficient tool for the design and the performance evaluation of the control. The accuracy of the developed model and the controls are validated by comparing the results from MATLAB/SIMULINK with those obtained from the exact switching model of the system, based on digital time-domain simulation studies, using the PSCAD/EMTDC software package.