Neutral Point Clamped Converter Research Articles

Simplified Model Predictive Current Control of Four-Level Nested Neutral Point Clamped Converter

Model predictive control (MPC) is an efficient and growing approach to power converter control. This paper proposes an improved and simplified model predictive current control (MPCC) technique for a four-level nested neutral point clamped (4L-NNPC) converter. Conventional MPCC exhibits better performances as compared to the conventional linear control system such as fast dynamic response, consideration of the system constraints, and nonlinearities. However, the application of the conventional model predictive current control (MPCC) approach on complex systems provokes a significant number of calculations, which is the main hurdle to its practical implementation. To fix this flaw, this paper proposes an effective algorithm to shorten the execution time of the conventional MPCC. In this proposed technique, 216 current predictions of the conventional MPCC are skipped and converted into one required voltage vector (RVV) prediction. With this equivalent reference voltage transformation, the calculation burden of MPCC is significantly reduced, while the output performance is not influenced. The results of the simplified MPCC for the 4L-NNPC converter are analyzed and compared with the conventional MPCC. The computational time is reduced by 19.56% using the simplified MPCC, while keeping an approximately similar error of output currents. The switching frequency and total harmonic distortion (THD) of the proposed method are reduced by 8.16% and 0.07%, respectively, as compared to the conventional technique. These results demonstrate the fact that that the performance of a conventional MPCC is enhanced with the proposed MPCC. The proposed algorithm can be applied to several inverter topologies.

Five-Level Switched-Capacitor ANPC Inverter With Output Voltage Boosting Capability

This article proposes a three-phase five-level switched-capacitor active neutral point clamped converter, which can be characterized by voltage boost ability, low-voltage stress across semiconductor devices, and balance of floating capacitor voltage without any auxiliary circuits and/or sensors. Operating principles and modulation scheme of the proposed converter, as well as a comparative analysis with similar topologies are included. Simulation and experimental results for a three-phase prototype are given to demonstrate the feasibility of the proposed five-level converter.

A New MPC Formulation Based on Suboptimal Voltage Vectors for Multilevel Inverters

Different new model predictive control (MPC) formulations have been recently proposed to reduce the real-time computation load, which makes the MPC algorithm promising for multilevel power converters. Unlike the conventional MPC formulation, which searches for the optimal switching state at each sampling time, the existing computationally efficient MPC formulations are to search for the optimal output voltage in the first stage. In the second stage, only the switching state redundancy under this optimal output voltage established in the first stage will be employed to achieve multiobjective. These computationally efficient MPC formulations based on searching an optimal voltage vector are usually validated on the power converter topologies with abundant switching redundancy or without floating capacitors. However, for the emerging topologies with less switching redundancy and floating capacitors, such as the five-level (5L) T-type nested neutral point clamped (T-NNPC) converters topology, the existing computationally efficient formulations based on optimal output voltage vector can lead to potential capacitor control failure due to the sacrificed multiobjective control performance. To address this issue, this article presents a novel MPC formulation based on suboptimal output voltage vectors considering both the system’s multiobjective control performance and computation burden reduction. With the determined suboptimal voltage vectors, a small group of the switching state candidate can be established to improve the system’s multiobjective control performance and efficiency. The proposed MPC formulation is finally validated on a 5L T-NNPC topology.

An Improved DPWM Method for Single-Phase Five-Level ANPC Converters With Switching Loss Reduction and Capacitor Voltage Balance

Neutral-point (NP) voltage and flying capacitor (FC) voltage balance, and power loss reduction are important guarantees for the stable and high-efficiency operation of single-phase five-level active neutral-point clamped (5L-ANPC) converters. However, little reports about capacitor voltage balancing with the power loss reduction have been proposed for single-phase 5L-ANPC converters. In order to obtain the above merits, an improved discontinuous pulsewidth modulation (DPWM) method with capacitor voltage balance and power loss reduction is proposed. First, an optimized common-mode voltage is injected into the modulation waves to decrease the switching loss in each switching period. In particular, the calculation of the injected common-mode voltage is based on the analysis of the deviation of the NP voltage. Hence, a fast-dynamic response of the real-time NP voltage controlling is acquired in the meantime. Besides, in order to balance the FC voltage, the weight factors of NP voltage deviation and FC voltage deviation are compared to generate the selecting signals of redundant switching states. As a result, the capacitor voltage balance and power loss reduction are realized simultaneously. Finally, the simulation and experimental results validate the correctness and feasibility of the proposed DPWM method.

Modified Carrier-Overlapped PWM With Balanced Capacitors and Eliminated Dead-Time Spikes for Four-Level NNPC Converters Under Low Frequency

Due to the lack of sufficient redundant states, four-level nested neutral-point clamped (4L-NNPC) converters suffer from severe flying capacitor (FC) voltage fluctuations under low fundamental frequencies, which restricts their applications in practice. To deal with this issue, a modified carrier-overlapped pulsewidth modulation (PWM) (COPWM) is proposed in this article, which could achieve zero average current flow through the two FCs over each carrier period. As a result, their voltages can be balanced naturally under steady states theoretically, and the low-frequency FC voltage fluctuation issue would no longer exist. In order to compensate for any nonideal factors in real industrial applications, an active control by dynamically adjusting the correspondence between carriers and switches is further applied for better control performance. A dead-time compensation scheme is proposed accompanied by this modified COPWM to eliminate the unexpected dead-time-induced voltage spikes of 4L-NNPC converters. The effectiveness of the proposed modified COPWM in regulating the FCs under low frequency and eliminating the dead-time-induced voltage spikes is verified by both simulation and experimental results.

Computationally Efficient Model Predictive Control With Fixed Switching Frequency of Five-Level ANPC Converters

This article proposes a fixed switching frequency (FSF)-based improved model predictive control (MPC) for a five-level active neutral-point clamped (5L-ANPC) converter. Compared to the conventional MPC for 5L-ANPC converter, the proposed MPC significantly reduces the computational burden while ensuring the balance of dc-link and flying capacitor voltages. The proposed MPC optimally selects the control voltage vectors to reduce common mode voltage (CMV), leading to a small CMV of the converter. Using three voltage vectors action per control cycle in MPC, FSF is achieved. Steady-state and dynamic performances of the proposed MPC have been evaluated by experiments. The results verify the feasibility and effectiveness of the proposed MPC method.

Matrix-Based Approach for Open-Circuit Fault-Tolerant Analysis and PWM Design of Active Neutral-Point-Clamped Converters

Active neutral-point-clamped converter adds open-circuit fault-tolerant (OCFT) capability compared with the widely used original neutral-point-clamped (NPC) topology. However, such capability is hard to utilize due to difficulties in pulse-width modulation (PWM) design and the randomness of failure points, particularly in high-level converters. Current research mainly focused on low-level topologies with a limited number of fault scenarios; moreover, the analysis and design are performed in a nonsystematic way. In this article, the OCFT operations of active NPC (ANPC) converters with multiple fault switches are investigated and the systematic PWM design process is proposed. First, different matrices are proposed for the ANPC converters to capture the complicated topology information and achieve an exhaustive analysis of the topological redundancy. Then, a step-by-step process is proposed to derive the suitable OCFT PWM patterns. The five-level ANPC converter is investigated as an example. Its experimental results validate that the proposed approach can 1) properly predict the behavior of converters systematically so that the tolerable faults and intolerable can be identified during the design procedure, and 2) the inherent fault-tolerant capability of the five-level ANPC converter can be guaranteed through the proposed method, and 3) multiswitch open-circuit faults can be easily dealt with by implementing suitable carrier-based PWM schemes.

Control Design for the NPC Three-Level Grid-Connected Converter with Non-Ideal Grid System

Background: The large-scale distributed new energy integrations bring about various non-ideal grid situations, which could deteriorate the control performance of grid-connected converters. Objective: This study aims to improve the control performance of the grid-connected converters when the grid is non-ideal. Methods: Firstly, a neutral point clamped (NPC) three-level grid-connected converter was studied, and the characteristics of the non-ideal grid were analyzed in detail. Then, a real-time signal extraction method called generalized sliding discrete Fourier transform (GSDFT) has been proposed to extract the non-ideal signals, e.g., harmonic components and negative sequence components, based on which a double closed-loop control strategy was designed to improve the control performance of the grid-connected converters when the grid is non-ideal. Results: The experimental results show that the converter double closed-loop control strategy in the non-ideal grid environment is suitable for a variety of non-ideal grid environments, and the gridconnected effect is good. Conclusion: Firstly, this paper analyzes the characteristics of non-ideal grid and establishes the mathematical model of NPC three-level grid-connected converter in non-ideal grid environment. Secondly, aiming at the problem of characteristic harmonics and negative sequence components in non-ideal power grid, a real-time and fast extraction method of non-ideal signals based on generalized sliding discrete Fourier transform is proposed. Finally, taking the three-phase grid current of grid-connected converter as the control target, the closed-loop control strategy of non-ideal signal extraction based on GSDFT is designed, and a good control effect is achieved.

A Review of Open-Circuit Switch Fault Diagnostic Methods for Neutral Point Clamped Inverter

Due to numerous advantages, a neutral point clamped (NPC) inverter is a preferred choice for high-power applications and renewable technology. The reliability of the NPC inverter is a major concerning factor during the assessment of system performance as power semiconductor switches are vulnerable to abnormal conditions. Open-circuit (OC) switch faults are not as dangerous as short circuit (SC) faults but eventually have enough potential to cause cascaded failure to other components in the system and thus need to be supervised carefully. The OC faults result in a distortion of voltage and current signals in the NPC converter. Based on these signals, over the past few years, many efforts have been made to identify and localize the OC switch fault to the switch level in the NPC topology. In this paper, a review of different OC switch fault diagnostic methods is provided. Starting from the NPC inverter operation under healthy and faulty conditions, the various possible and unavailable switching states along with the deviation in pole voltage under different switch fault conditions is discussed. Then, based on the approach used for system-based fault detection, the OC fault detection methods are classified. The various OC methods are further discussed on the basis of signal, i.e., current, voltage or a combination of both signals used as a signature for fault detection. Emphasis is given to the principle involved, diagnostic variables utilized, the implementation approach and the diagnostic time required. Finally, the approaches are tabulated so as to provide a quick reference for NPC fault diagnostics.

48-Pulse Voltage-Source Converter Based on Three-Level Neutral Point Clamp Converters for Solar Photovoltaic Plant

The demand for high-power converters for use in large-scale solar photovoltaic (PV) plants increases as the plant size continues to grow. The multipulse voltage-source converter (VSC) configurations are the viable option for high-power solar PV converter applications because they improve conversion efficiency due to low switching losses and allow direct integration with a medium-voltage (MV) grid. In this article, a 48-pulse VSC based on the fundamental frequency switching (FFS) three-level neutral point clamp (NPC) converter with a start–delta transformer configuration is used for large-scale solar PV plant application. It is also used as a PV-static synchronous compensator (STATCOM) to provide the required reactive power support to the grid to regulate the voltage. The solar PV plant configuration for a 100-MW capacity is modeled in MATLAB and implemented in the real-time OPAL-RT platform to verify its design and controls. The harmonics, static, and dynamic performances are demonstrated in detail.

A novel neutral-point potential balance control method based on voltage feedback for neutral-point clamped three-level inverter

Neutral-point potential imbalance is not only an inherent problem of neutral-point clamped three-level converters, but also the key factor affecting their performance. The traditional capacitor neutral-point potential balance control methods based on space vector modulation, such as VSVPWM, have several shortcomings including the uncompensated region of neutral-point voltage and the slow dynamic response. A novel voltage feedback control method on neutral-point potential balance is proposed in this paper. A coefficient is introduced to define the degree of neutral-point potential imbalance. The composite signal composed of this coefficient and neutral point current is designed. Based on the improved reasonable sectors’ division, the suitable small vectors are selected by this composite signal to obtain the switching sequence of power devices. The voltage feedback control method is employed to realize accurate neutral-point potential balance of NPC three-level inverter. The experimental results show that this method can quickly balance the neutral-point potential fluctuation caused by disturbance. It has the advantages of low switching loss, stable output voltage and current waveform, and good dynamic performance.

Bidirectional H8 AC–DC Topology Combining Advantages of Both Diode-Clamped and Flying-Capacitor Three-Level Converters

A three-level bidirectional ac–dc converter with H8 topology is proposed to combine the advantages of both neutral-point clamped and flying-capacitor (FC) three-level converters for medium-voltage (MV) ac–dc solid-state transformer (SST) applications. The innovative H8 converter features self-balanced capacitor voltage, common-mode voltage elimination, and small capacitance of the FCs. The proposed carrier-based modulation enables the H8 converter to operate under both active and reactive power conditions. A 10-kVA ac–dc converter prototype with 1.7-kV SiC MOSFETs and 3.3-kV SiC diodes verifies the feasibility and advantages of the proposed topology and the modulation method. The capacitance of the FCs in the H8 converter is reduced by 45 times compared to that of the FC converters. The H8 converter efficiency is tested up to 99% at 2-kV dc voltage. The proposed H8 converter is suitable for the next-generation PV inverter, grid-forming inverter, MV fast charger, and SST applications.

Detailed Power Loss Analysis of T-Type Neutral Point Clamped Converter for Reactive Power Compensation

The paper presents an analysis of power losses in a three-phase T-type neutral point clamped converter with insulated gate bipolar transistors. The paper’s main aim is to perform a detailed analysis of power losses in the converter operating as an active power filter. The study is based on the use of characteristics of semiconductor devices provided by the manufacturer in the module datasheet. Thanks to the analysis, it is possible to recognise the value of power losses, which facilitates the design of the converter cooling system. Identifying how power losses are distributed between the module switching devices is also possible. Power losses are shown as functions of the output current and module temperature. The analysis results were successfully verified by measuring power losses using a laboratory model of the converter with rated currents of 10 and 20 A. The obtained results indicate relatively low power losses and a relatively even distribution of power losses between the semiconductor devices. This is a superior feature of the three-level T-type neutral point clamped converter topology.

A Real-Time Fault-Tolerant Control Approach to Ensure the Resiliency of a Self-Healing Multilevel Converter

Ensuring service continuity in safety critical applications is crucial. In some of these applications, multilevel converters play a vital role. In this regard, this research work presents a self-healing fault-tolerant control approach to ensure the resiliency of a neutral-point clamped converter when a semiconductor component encounters an open circuit fault. The defective semiconductor can be a power switch or a clamping diode. By applying the proposed real-time fault-tolerance control, the rated output voltage and output current are restored during post-fault operation. Furthermore, the total harmonic distortion value of the output voltage during application of the real time self-healing control does not increase when compared with that during healthy operation. Since the realization of the proposed control strategy does not require any bidirectional switch, a fast transition between the healthy and fault-tolerant operation is accomplished. Moreover, the proposed structure can ensure service continuity in case of a fault event in the anti-parallel diodes, something which has been overlooked in previously conducted research works.

Improved Model Predictive Current Control of NPC Three-Level Converter Fed PMSM System for Neutral Point Potential Imbalance Suppression

For the neutral point clamped (NPC) three-level converter fed permanent magnet synchronous motor (PMSM) system, the performance of the conventional model predictive current control (MPCC) algorithm will be deteriorated if the amplitude of the neutral point potential (NPP) is large. Additionally, the adjustment process of the weighted coefficients of the conventional MPCC algorithm is complex because of numerous control terms in the cost function. To solve the above issues, an improved MPCC algorithm is proposed in this paper. Firstly, Newtonian iteration is used to transfer the stator current into stator voltage in the cost function. Then, the NPP term in the conventional cost function can be eliminated by introducing the partition control of the NP potential, which also eliminates the whole adjustment process of weighting coefficients. Finally, based on the amplitude of the NPP, the amplitude and phase angle of medium and small vectors are modified to improve the control performance of the torque and flux. Experimental results show that the fluctuation of the neutral point potential can be suppressed rapidly. Meanwhile, the performance of the torque, flux and current are also improved compared with the conventional MPCC.

Evaluation of different smart transformer structures under disturbed operating modes

This paper presents a comprehensive investigation of several configurations and control strategies adopted for Smart Transformer (ST). The ST structure is composed of three stages, namely, input stage, isolation stage, and output stage. The latter are implemented using different power conversion topologies. These topologies operate under variant voltage and current levels, which leads to the generation of high conduction and switching power losses. To overcome these issues, multilevel converters are proposed in this paper for the input stage. Particularly, the cascaded H-bridge (CHB), and neutral point clamped converters are used. Furthermore, the ST's dynamic performance is considered and a Sliding Mode Controller is introduced. Numerical simulations of the proposed structures are performed using Matlab/Simulink under disturbed operating modes. A comparative evaluation of the different topologies is, then, established. The obtained results show that the CHB is the most adequate configuration and the improved performance of the proposed controller are verified.

An Indirect Model Predictive Control Method for Grid-Connected Three-Level Neutral Point Clamped Converters With $LCL$ Filters

This article presents a model predictive control (MPC) algorithm for a three-level neutral point clamped converter connected to the grid via an <i>LCL</i> filter. The proposed long-horizon MPC method, formulated as a multicriterion quadratic program (QP), simultaneously controls the grid and converter current as well as the filter capacitor voltage, while meeting the relevant grid standards. To achieve the latter, a carrier-based pulsewidth modulation stage is employed. Finally, soft constraints are included to ensure operation of the system within its safe operating limits, particularly with regards to a potential overcurrent or overvoltage trip during transient operation. The presented simulation results based on a medium-voltage system as well as experimental studies based on a scaled-down prototype verify the effectiveness of the proposed method.

A Novel Low-Frequency Virtual Space Vector Modulation With the Improved Continuity of Output Average-Voltage and Bus Voltage Utilization for Single-Phase Neutral Point Clamped Three-Level Inverter

In the high-power superconducting fusion converter, the single-phase neutral point clamped (NPC) three-level converter is applied to replace the traditional thyristor converter using an integrated gate-commutated thyristor (IGCT) as a power device. The operating frequency of IGCT is usually lower, only a few hundred Hz. An optimized hybrid space vector pulsewidth modulation (SVPWM)-8H is proposed to solve the problems of discontinuous output average voltage, low dc bus voltage utilization rate, dead time compensation, and neutral point potential balance. The new sectors are inserted to make the range of output average voltage of adjacent sectors intersect, which improves the continuity of output average voltage. Furthermore, some sectors are composed of four vectors to reduce the minimum working time of redundant small vectors, improving the dc bus voltage utilization ratio and the converter’s performance. Moreover, by analyzing the influence of dead time on redundant small vectors, redundant vectors are rearranged to make redundant small vectors’ working time synchronously in sector and sector switching, which reduces the influence of dead time on neutral point potential balance. Finally, by analyzing the influence of dead time on the output average voltage, dead time compensation is applied, which reduces the difficulty of compensation implementation. Simulations and experiments verify the rationality of the optimized hybrid SVPWM-8H.

Sliding Mode Control of Grid-Connected Neutral-Point-Clamped Converters Via High-Gain Observer

In this article, a nonlinear high-gain observer (NHGO)-based second-order sliding mode (SOSM) control strategy is proposed for the three-phase three-level neutral-point-clamped (NPC) converter. This controller applies the advanced SOSM algorithm both in the voltage regulation loop and in the power tracking loop, which provides a fast dynamic for the dc-link voltage, and also assures a good steady-state behavior for the NPC converter. Additionally, an NHGO technique is implemented in the voltage regulator combining with the SOSM algorithm. The conventional observer-based controllers suffer from the destructive effects of measurement noise, and it can only be addressed by diminishing the observer gain, which sacrifices the observer property. The NHGO technique adopts a time varying gain, that is, high gain in transient while low gain in steady state, which minimizes the adverse influence of measurement noise. The tuning method of the proposed NHGO-based SOSM controller is given to simplify the implementation process. Finally, the simulation and experimental results of the proposed control scheme for the NPC converter are given and compared with the conventional PI controller as well as the well-known linear extended state observer-based control method, which validates the feasibility and superiority of the proposed controller.

An enhanced implementation of SRF and DDSRF-PLL for three-phase converters in weak grid

Abstract Renewable energy generation systems connected to utility grid require perfect synchronization to grid which is one of the most important issues that needs to be taken into consideration. This paper proposed a hardware-accelerated implementation for the decoupled double synchronous reference frame phase-locked loop (DDSFR-PLL) for grid synchronization in grid-connected converters in weak grid that suffers from phase voltage-unbalance, variable phase and frequency conditions. Since the transformations and filtering of this method is computationally intensive and needs to be executed as fast as possible by the microcontroller unit (MCU) and Due to the presence of other current and voltage regulation loops in the same interrupt service routine (ISR) with high frequency rate, a hardware-based acceleration using the STM32G4x4 MCU built-in filter, filter math accelerator (FMAC) and coordinate rotation digital computer (CORDIC) is used to speed the execution time. This study addresses the description, derivation and implementation of the both DQ-PLL and DDSRF-PLL algorithms. The performance of both pure-software and accelerated implementation is demonstrated, compared and run on a three-level active neutral point clamped (ANPC) converter board. In proposed method, CPU load dropped from 80.5% by using the conventional software implementation to 23.6% (70% load reduction).This reduction in CPU load enables the addition of more features and more advanced current and voltage control algorithms.