Neutral Beam Etching Research Articles

Reduction of interface defects in gate-recessed GaN HEMTs by neutral beam etching

This study investigates and compares the impact of different etching techniques on the fabrication of GaN high electron mobility transistors (HEMTs) between the inductively coupled plasma reactive ion etching (ICP-RIE) and the neutral beam etching (NBE) for the gate recess. By conducting direct current analysis, it was found that devices manufactured using the NBE exhibited superior electrical performance as compared with those produced using the ICP-RIE. These enhanced electrical characteristics include a transconductance of up to 100.4 mS/mm, a threshold voltage (Vth) of −2.3 V, an on/off current ratio of 1.1 × 109, a subthreshold swing (S.S.) of 99.63 mV/dec, and a remarkably low gate leakage current. Additionally, we noted varying degrees of hysteresis in the I–V characteristics were related to process disparities possibly leading to interface defects. Multi-frequency capacitance-voltage (C–V) measurements were used to identify the interface defects at the oxide/AlGaN interface of the gate. The results revealed that devices fabricated using the NBE exhibited a lower interface defect density as compared with those fabricated using the ICP-RIE, thereby elucidating the reduced hysteresis observed in the I–V characteristics. These findings indicated the significant advantages of the NBE process in the fabrication of GaN HEMTs.

Study of geometry effect on the performance of thin-film transistors fabricated with ZnGa2O4 epilayer grown by metalorganic chemical vapor deposition for high voltage applications

Enhancement mode thin film transistors (TFTs) having different geometries were fabricated on the Zinc gallium oxide (ZnGa2O4) epilayer grown on a c-plane sapphire substrate by metalorganic chemical vapor deposition (MOCVD). A field emission scanning electron microscope, atomic force microscopy, and X-ray diffraction were employed to conduct a detailed analysis of the film composition, morphology, and crystal structure. The distance between the source-to-gate and gate length was kept to be 7 μm and 3 μm in all the devices with varying gate-to-drain lengths of 10, 20, and 30 μm. Moreover, neutral beam etching technology was employed to isolate the individual devices and reduce the defects induced by plasma etching. It was found that the threshold voltage changes from 6 V to 7.6 V with the increase in source to drain length from 20 μm to 40 μm. The On/Off ratio of the devices was found to be 105, with a maximum current around 1 μA/mm. Additionally, the device breakdown voltage increased from 240 V to about 656 V with the increase in the device length. The results demonstrate the fabrication of the high breakdown voltage ZnGa2O4-based TFT and establish the co-relation of the source to drain length with the device characteristics.

Performance improvement of blue light micro-light emitting diodes (< 20 μm) by neutral beam etching process

In this study, micro-light emitting diodes array (μLEDs) with dimensions of 5 μm and 15 μm chip size were fabricated using Neutral Beam Etching (NBE) processes. Size-dependent issues of μLEDs processed by traditional inductively coupled plasma-reactive ion etching (ICPRIE) were alleviated by NBE technology, which exhibited lower equivalent resistance, turn-on voltage, and Ideality factor as compared with those of μLEDs by ICPRIE. Additionally, higher light output power of μLEDs processed by NBE with both 5 μm and 15 μm resulted in higher EQE 7.6 % and 7.7 % than those of μLEDs processed by ICPRIE. Furthermore, the size effect led to a decrease in EQEmax values of the ICPRIE sample by 0.4 %, but only a 0.1 % decay in NBE. Overall, samples fabricated by the NBE process exhibited superior optoelectronic characteristics. Finally, non-radiative recombination behaviors on the mesa sidewall were verified by cathodoluminescence analysis, showing significant decay in ICPRIE samples but not in NBE samples. These results demonstrated the potential of the NBE process for fabricating small chip sizes blue-light μLEDs required for high-brightness, high-efficiency, and high-resolution μLED displays.

Performance comparison of InGaN-based 40–80 μm micro-LEDs fabricated with and without plasma etching

The fabrication of InGaN-based blue 4✕4 array micro-LEDs (μLEDs) with 40 μm ✕40 μm chip size and 2✕2 array μLEDs with 80 μm ✕80 μm chip size etching by the inductive coupled plasma reactive ion etching (ICPRIE) and defect-free neutral beam etching (NBE) processes was studied in this work. In μLEDs of this size, the influence of defects formation in the sidewalls on EQE was evaluated. There was almost no difference in EQE between μLEDs array etched by the NBE process no matter 40 μm ✕40 μm and 80 μm ✕80 μm, but the dependence was observed in the ICPRIE. Even with this size, it was found that the size effect of EQE is smaller than that in case of using ICPRIE for defect-free neutral beam etching. This impact is substantial since μLED predominantly operated at low current density, around 1–5 A/cm2. Consequently, the reduction of defect density, encompassing both internal and sidewall defects, becomes imperative even in 40–80 μm InGaN-based μLEDs. This not only improves the overall efficiency of μLEDs but also fortifies the brightness stability of μLED displays if process etching by NBE. It was also found that the etching shape had an influence on EQE. It could be attributed to fact that the etching profile angle of NBE was more vertical than that of ICPRIE. Because the different angles of the mesa resulted in different light intensity. The μLEDs emitting with a wavelength of 450 nm, the light extraction efficiency and intensity at a mesa angle 58° of NBE etching μLEDs was about 8% lower than those of an angle (38°) of ICPRIE etching μLEDs by simulation.

3.5 × 3.5 μm2 GaN blue micro-light-emitting diodes with negligible sidewall surface nonradiative recombination

Micro-light-emitting diode displays are generating considerable interest as a promising technology for augmented-reality glasses. However, the fabrication of highly efficient and ultra-small ( <3 μm) micro-light-emitting diodes, which are required for augmented-reality applications, remains a major technical challenge due to the presence of strong sidewall nonradiative recombination. In this study, we demonstrate a 3.5 × 3.5 μm2 blue GaN micro-light-emitting diode with negligible sidewall nonradiative recombination compared with bulk nonradiative recombination. We achieve this by using an ultralow-damage dry etching technique, known as neutral beam etching, to create the micro-light-emitting diode mesa. Our 3.5 × 3.5 μm2 micro-light-emitting diode exhibits a low decrease in external quantum efficiency of only 26% at a current density of 0.01 A/cm2, compared with the maximum external quantum efficiency that is reached at the current density of ∼3 A/cm2. Our findings represent a significant step towards realizing micro-light-emitting diode displays for augmented-reality glasses.

Hydrogen iodide (HI) neutral beam etching characteristics of InGaN and GaN for micro-LED fabrication

We investigated the etching characteristics of hydrogen iodide (HI) neutral beam etching (NBE) of GaN and InGaN and compared with Cl2 NBE. We showed the advantages of HI NBE versus Cl2 NBE, namely: higher InGaN etch rate, better surface smoothness, and significantly reduced etching residues. Moreover, HI NBE was suppressed of yellow luminescence compared with Cl2 plasma. InCl x is a product of Cl2 NBE. It does not evaporate and remains on the surface as a residue, resulting in a low InGaN etching rate. We found that HI NBE has a higher reactivity with In resulting in InGaN etch rates up to 6.3 nm min−1, and low activation energy for InGaN of approximately 0.015 eV, and a thinner reaction layer than Cl2 NBE due to high volatility of In-I compounds. HI NBE resulted in smoother etching surface with a root mean square average (rms) of 2.9 nm of HI NBE than Cl2 NBE (rms: 4.3 nm) with controlled etching residue. Moreover, the defect generation was suppressed in HI NBE compared to Cl2 plasma, as indicated by lower yellow luminescence intensity increase after etching. Therefore, HI NBE is potentially useful for high throughput fabrication of μLEDs.

Enhancing the Performance of E-Mode AlGaN/GaN HEMTs With Recessed Gates Through Low-Damage Neutral Beam Etching and Post-Metallization Annealing

Enhancing the Performance of E-Mode AlGaN/GaN HEMTs With Recessed Gates Through Low-Damage Neutral Beam Etching and Post-Metallization Annealing

Reduction of EUV resist damage by neutral beam etching

Even though EUV lithography has the advantage of implenting a finer pattern compared to ArF immersion lithography due to the use of 13.5 nm instead of 193 nm as the wavelength of the light source, due to the low energy of EUV light source, EUV resist has a thinner thickness than conventional ArF resist. EUV resist having such a thin thickness is more vulnerable to radiation damage received during the etching because of its low etch resistance and also tends to have a problem of low etch selectivity. In this study, the radiation damage to EUV resist during etching of hardmask materials such as Si3N4, SiO2, etc using CF4 gas was compared between neutral beam etching (NBE) and ion beam etching (IBE). When NBE was used, after the etching of 20 nm thick EUV resist, the line edge roughness increase and the critical dimension change of EUV resist were reduced by ∼1/3 and ∼1/2, respectively, compared to those by IBE. Also, at that EUV etch depth, the root mean square surface roughness value of EUV resist etched by NBE was ∼2/3 compared to that by IBE on the average. It was also confirmed that the etching selectivity between SiO2, Si3N4, etc and EUV resist was higher for NBE compared to IBE. The less damage to the EUV resist and the higher etch selectivity of materials such as Si3N4 and SiO2 over EUV resist for NBE compared to IBE are believed to be related to the no potential energy released by the neutralization of the ions during the etching by NBE.

Advanced damage-free neutral beam etching technology to texture Si wafer with honeycomb pattern for broadband light trapping in photovoltaics

Advanced damage-free neutral beam etching technology to texture Si wafer with honeycomb pattern for broadband light trapping in photovoltaics

Selective atomic layer reaction between GaN and SiN in HBr neutral beam etching

We investigated higher selective etching between SiN and GaN using an HBr neutral beam (NB) and found that it exhibited a more selective reaction compared to Cl2 NB. The etching rate of GaN mainly depended on the desorption rate of the etching product (GaClx or GaBrx) assisted by the bombardment of NB. As a result, in the case of the HBr neutral beam, the GaN etching rate was drastically decreased at the atomic layer level because the vapor pressure of the etching product, GaBrx, was much lower than that of GaClx. On the other hand, the dominant etching progression of SiN was mainly caused by neutral beam bombardment energy, and the desorption of the etching products (SiClx or SiBrx) was almost the same in both cases because the vapor pressures of the etching product, SiClx and SiBrx. In particular, in the case of the HBr neutral beam, the neutral beam energy dependence of the surface reaction layer of SiN was larger than that of Cl2 NB. As a result, the etching selectivity between SiN and GaN in HBr NB improved to 2.1 at 10 W of bias power, whereas that with Cl2 NB was saturated at 0.41 at more than 10 W of bias power. We found that the surface atomic layer etching reaction could precisely control the desorption rate of the etching product by optimizing the neutral beam bombardment energy and gas chemistry. The HBr neutral beam process can achieve atomic layer level selective reactions on the SiN/GaN structure.

Advanced low damage manufacturing processes to fabricate SOI FinFETs and measurement of electrical properties

In this paper, FinFETs are realized by integrating neutral beam etching(NBE) and microwave annealing (MWA) into the fabrication process. Electrical characteristics are measured at room temperature and parameters such as Sub-threshold swing of 89 mV/decade, Ion/Ioff of 106, DIBL of 72 mV/V and effective mobility (μeff) of 502 cm2V−1 s−1 are obtained with Wfin/Lgate = 40/100 nm. These characteristics are superior by using neutral beam etching than by using RIE-like condition, and the Vt shift at reduced Lgate is also suppressed. A damaged layer at high-k/Si interface by RIE-like condition is observed in the TEM image, which can correspond to the degradation in electrical characteristics. Furthermore, the proportional scaling of Ion versus Wfin indicates negligible S/D resistance due to good activation by Microwave annealing (MWA). In short, functional FinFETs were fabricated by Neutral beam etching (NBE) and Microwave annealing (MWA) for the first time, and these results pave ways for the techniques to be adopted in the advanced semiconductor processing. The SOI FinFETs demonstrate proportional scaling of on current versus the fin width and indicating that the S/D region is well activated by the microwave annealing method.

Influence of Plasma Ultraviolet/Vacuum Ultraviolet Irradiation Damage on Silicon Metal-Oxide-Semiconductor Capacitor During Etching.

In this study, we evaluate the defects and charges caused by the ultraviolet (UV)/vacuum ultraviolet (VUV) irradiation in the high-k/metal gate stack structure, especially in HfO₂ layer and at Si/HfO₂ interface. First, we measured the photons irradiating to the surface in the neutral beam etching (NBE) system and in the conventional inductively coupled plasma (ICP) system through optical emission spectroscopy (OES), respectively. By using this method, we evaluate the ability of reducing UV/VUV irradiation damage in the NBE system. As a result, photon intensity detected in the ICP system shows larger magnitude as compared to the NBE system, which indicates the UV/VUV irradiation is more severe in the ICP system. Moreover, in order to understand the twisting of electrical characteristics caused by UV/VUV irradiation, we set the prefabricated metal-oxide-semiconductor (MOS) capacitors in both systems to absorb the irradiation of UV/VUV photons respectively. The electrical characteristics of the etched MOS capacitors and its related plasma-induced damage model are discussed. The result of the devices exposed in the ICP system reveals a greater electrical characteristics shift compared to the devices in NBE such as the interface trap density (Dit) in case of NBE is 3.55621×1012 cm-2eV-1 and in case of ICP is higher i.e., 4.19961×1012 cm-2eV-1.

On the energy band of neutral-beam etched Si/Si0.7Ge0.3 nanopillars

In this work, the geometry effects on the energy band of the well-aligned silicon (Si) nanopillars (NPs) embedded in Si0.7Ge0.3 matrix fabricated by neutral beam etching are studied. We formulate and solve the Schrödinger equation with an effective mass approach in k space. The radius, separation, and shape effects on the energy band and density of states of the explored NPs are calculated and discussed. The separation of NPs plays a crucial factor to manipulate the band structure among the aforementioned factors.

Surface wettability of silicon nanopillar array structures fabricated by biotemplate ultimate top-down processes

We fabricated high aspect ratio 10-nm Si nanopillar (NP) array structures with a few-tenths-nm-gap arranged by fusing biotemplate and neutral beam etching processes to investigate the wettability [e.g., contact angle (CA)] with and without surface silicon oxide film. The NP array with silicon native oxides in all gaps exhibited super-hydrophilicity due to the chemical liquid-solid interface interaction and larger surface area than the Si flat surface thanks to the NP structure. These phenomena can be explained by using the Wenzel model. In contrast, when we selectively removed the native oxide on Si NP surface with our radical treatment, a gap variation from 11 to 43 nm stably resulted in a CA of more than 96° (hydrophobicity) with a maximum of 115°. This can be explained by using the Cassie–Baxter model with a filling factor. Our findings demonstrate that controlled surface wettability can be achieved by combining our controllable gap silicon NP array structures and the surface with or without silicon native oxides. The gap of a Si NP fills with water due to the capillarity on a silicon native oxide, but on a pure stable silicon one with a defect-free surface, does not completely fill. We found that Si NP structures with controllable gaps exhibit a surface wettability ranging from super-hydrophilicity to high-hydrophobicity.

High Electron Mobility Germanium FinFET Fabricated by Atomic Layer Defect-Free and Roughness-Free Etching

We investigated a high electron mobility Ge FinFET fabricated by defect-free and roughness-free atomic layer neutral beam etching (NBE) compared with one fabricated by conventional plasma etching (PE). The etching interface roughness and defect were estimated by high-resolution transmission electron microscopy (TEM). In the case of using atomic layer defect-free NBE, the root-mean-square roughness of the Ge Fin sidewall surface is 1/3 times smaller than that using PE. Then, the electron mobility of Ge FinFET was improved by 1.65 times compared with that of a PE etched FinFET sample. For the subthreshold swing, the defect density of the interface between the Ge and gate dielectric film was improved by NBE. Ioff average currents of NBE and PE were around 18.1 and 57.6 nA/μm, respectively. As a result, NBE reduces the off-leakage current to 1/3 times less than PE. This corresponded to the differences in surface roughness and defect generation between NBE and PE. Therefore, we found that NBE could achieve a good performance by defect-free and atomically-flat etching the surface.

High-quality nanodisk of InGaN/GaN MQWs fabricated by neutral-beam-etching and GaN regrowth: towards directional micro-LED in top-down structure

A nanodisk array of blue InGaN/GaN multiple quantum wells was made using neutral beam etching (NBE) followed by GaN regrowth. The NBE-fabricated nanodisk presented a vertical and highly smooth sidewall surface where the InGaN well layers were easily distinguished even with a scanning electron microscope. A high interface quality without any voids or obvious defects was obtained between the nanodisk and the regrown-GaN layer. The nanodisk after regrowth presented a smaller blueshift of photoluminescence emission energy (12 meV) and a substantially higher and almost constant internal quantum efficiency of ∼50% over three orders of magnitude of excitation laser power when compared to the nanodisk before regrowth. This study shows that the process of NBE nanodisk etching followed by GaN regrowth represents a promising step forward in the development of truncated cone-shaped directional micro-LEDs with a buried active region in a top-down structure.

Coherent and Incoherent Impacts of Nanopillars on the Thermal Conductivity in Silicon Nanomembranes.

Nanostructuring is the dominant approach for effective thermal conduction control in nanomaterials. In the past decade, researchers have been interested in thermal conduction control by the coherent effects in phononic crystal (PnC) systems. Recent theoretical works predicted that nanopillars on the surface of silicon membranes could cause a dramatic thermal conductivity reduction due to the phonon local resonances. However, this remarkable prediction has not been experimentally verified yet with the deep-nanoscale pillar-based PnCs. Here, we fabricate nanopillars on suspended silicon membranes using damageless neutral-beam etching and investigate the impact of nanopillars on the thermal conductivity of the membranes in the 4-300 K range. We found that thermal conductivity reduction caused by the nanopillars does not exceed 16%, which is much weaker than that predicted by the theoretical works. Moreover, this reduction remains temperature independent. These facts make the coherence an unlikely reason for the observed reduction. Indeed, our Monte Carlo simulations can reproduce the experimental results under a purely incoherent approximation. Our study shows that the coherent control of heat conduction by PnC nanostructures is more challenging to observe experimentally in reality than predicted in near-ideal modeling.

A review of key technologies for epitaxy and chip process of micro light-emitting diodes in display application

The continuous miniaturization and integration of pixelated devices have become a main trend in the field of display. Micro light-emitting diode (micro-LED) display is composed of an array of LEDs that are sub-50-micrometers in length. It has huge advantages in brightness, resolution, contrast, power consumption, lifetime, response speed and reliability compared with liquid crystal display (LCD) and organic LED (OLED) display. Consequently, micro-LED display is regarded as the next-generation display technology with high potential applications, such as virtual reality (VR), augmented reality (AR), mobile phones, tablet computers, high-definition TVs and wearable devices. Currently, the combination of commercial 5G communication technology with VR/AR display, ultra high definition video technologies will further prompt the development of micro-LED display industry. However, some basic scientific and technological problems in micro-LED display remain to be resolved. As the chip size shrinks to below 50 μm, some problems that are not serious for large-sized LEDs appear for micro-LEDs. These problems include crystalline defects, wavelength uniformity, full-color emmision, massively tranferring and testing, etc. In the past two decades, various solutions to those problems have been proposed, which have greatly promoted the progress of micro-LED display. In this paper, an overview of micro-LED display since 2000 is given firstly, which includes the main research results and application achievements. Secondly the issues involved in the wafer epitaxy and chip process of micro-LEDs and possible solutions are discussed based on the display application in detail. The surface state induced by the dangling bonds and dry etching damages are concerned for the nonradiative recombination at a low injection level. The remedies are provided for those surface states, such as atomic-layer deposition and neutral beam etching. Some methods to reduce the threading dislocation and suppress the polarization field are summarized for micro-LED epitaxial growth. Moreover, the GaN-based LEDs on Si (100) substrate are also introduced for the future integration of micro-LEDs into the Si-based integrated circuits. As to the wavelength uniformity, the MOCVD equipment and growth technology including the laser treatment are discussed. In the chip processing part, the full-color display, mass transfer and effective inspection technology are discussed. Assembling RGB individual LEDs, quantum dot phosphor material and nanocoloumn LEDs are different routes for full-color display. Their trends in the future are provided. The pick and place, laser lift-off technologies, are strengthened in the massively transferring for micro-LEDs. In the massively and rapidly inspection technologies, the photoluminscence combined with Raman scattering, the electroluminescence combined with digital camera are discussed. Finally, the summary and outlook in these issues are also provided.

Highly Water-Repellent Nanostructure on Quartz Surface Based on Cassie-Baxter Model With Filling Factor

We fabricated a highly water-repellent quartz nanopillar (NP) structure to investigate the effect of varying the contact angle (CA) by using 10-nm-order gaps and 10-nm-diameter NPs. Gaps from 15 to 30 nm led to CAs of more than 100°, showing hydrophobicity, to a maximum of 105°. The mechanism of repelling water on quartz could be explained by the Cassie-Baxter model with a filling factor. A gap of more than 30 nm fills with water due to capillarity, but a gap of less than 30 nm causes water to be repelled by air. We were able to repeatedly fabricate a quartz NP structure with a controllable gap by using a combination of a bio-template and neutral-beam etching and found this structure to be highly water-repellent. The structure has high durability and optical transparency. As a result, we conclude that it can be used in sensors and lenses on various devices such as cameras and radars.

Near‐Complete Elimination of Size‐Dependent Efficiency Decrease in GaN Micro‐Light‐Emitting Diodes

Herein, a successful elimination of the size‐dependent efficiency decrease in GaN micro‐light‐emitting diodes (micro‐LEDs) is achieved using damage‐free neutral beam etching (NBE). The NBE technique, which can obtain ultralow‐damage etching of GaN materials, is used in place of the conventional inductively coupled plasma to form the micro‐LED mesa. It is found that all the fabricated micro‐LEDs with sizes ranging from 40 to 6 μm show external quantum efficiency (EQE) versus current density characteristics similar to those of large‐area GaN LEDs, with a maximum in EQE curves at a current density of as low as about 5 A cm−2. Furthermore, all the fabricated micro‐LEDs, even the 6 μm one, show a similar value of maximum EQE with a variation of less than 10%, clearly indicating a negligible size dependence of emission efficiency of micro‐LEDs fabricated by the NBE technique at least down to the size of 6 μm. These results suggest that the NBE process is a promising method of fabricating high‐efficiency sub‐10 μm GaN micro‐LEDs required for high‐efficiency, high‐brightness, and high‐resolution micro‐LED displays.