Neuron MOS Research Articles

A Minimum Hamming Distance Search Associative Memory Using Neuron CMOS Inverters

SUMMARYRecently, high‐speed searching for the most similar reference data out of the database is needed for data compression, image recognition, network control, and others. However, it takes much time to search for data with software, or hardware using conventional memory. Associative memory has been developed as a high‐speed searching device. In this paper, we propose a minimum Hamming distance search associative memory using neuron CMOS inverters. The proposed associative memory is less affected by initial charge and a change of threshold voltage of neuron MOS transistors than conventional neuron CMOS circuits. The proposed circuit also makes searching speed higher by using fully parallel processing. We confirmed that the proposed circuit can be realized expected results by simulation, and experiment using test chip.

Non-Faradaic Electrochemical Detection of Exocytosis from Mast and Chromaffin Cells Using Floating-Gate MOS Transistors.

We present non-faradaic electrochemical recordings of exocytosis from populations of mast and chromaffin cells using chemoreceptive neuron MOS (CνMOS) transistors. In comparison to previous cell-FET-biosensors, the CνMOS features control (CG), sensing (SG) and floating gates (FG), allows the quiescent point to be independently controlled, is CMOS compatible and physically isolates the transistor channel from the electrolyte for stable long-term recordings. We measured exocytosis from RBL-2H3 mast cells sensitized by IgE (bound to high-affinity surface receptors FcεRI) and stimulated using the antigen DNP-BSA. Quasi-static I-V measurements reflected a slow shift in surface potential () which was dependent on extracellular calcium ([Ca]o) and buffer strength, which suggests sensitivity to protons released during exocytosis. Fluorescent imaging of dextran-labeled vesicle release showed evidence of a similar time course, while un-sensitized cells showed no response to stimulation. Transient recordings revealed fluctuations with a rapid rise and slow decay. Chromaffin cells stimulated with high KCl showed both slow shifts and extracellular action potentials exhibiting biphasic and inverted capacitive waveforms, indicative of varying ion-channel distributions across the cell-transistor junction. Our approach presents a facile method to simultaneously monitor exocytosis and ion channel activity with high temporal sensitivity without the need for redox chemistry.

33.2: Neuron MOS Devices using Thin‐Film Transistors

We have developed neuron MOS devices using TFTs. They possess floating and multiple input gate terminals capacitively connected. We evaluated neuron MOS transistors, a neuron inverter, which can be a variable threshold voltage inverter, and an almighty logic circuit. The neuron MOS devices have great potential for artificial neural networks.

Self-assembled dual in-plane gate thin-film transistors gated by nanogranular SiO2 proton conductors for logic applications

Phosphorus (P)-doped nanogranular SiO(2) films are deposited by plasma-enhanced chemical vapor deposition at room temperature, and a high proton conductivity of ~5.6 × 10(-4) S cm(-1) is measured at room temperature with a relative humidity of 70%. The accumulation of protons at the SiO(2)/indium-zinc-oxide (IZO) interface induces a large electric-double-layer (EDL) capacitance. Thin-film transistors (TFTs) with two in-plane gates are self-assembled on transparent conducting glass substrates. The large EDL capacitance can effectively modulate the IZO channel with a current ON/OFF ratio of >10(7). Such TFTs calculate dual input signals at the gate level coupled with a floating gate, analogous to that of neuron MOS (vMOS). AND logic is demonstrated on the neuron TFTs. Such neuron TFTs gated by P-doped nanogranular SiO(2) shows an effective electrostatic modulation on conductivities of oxide semiconductors, which is meaningful for portable chemical-biological sensing applications.

Design of a Capacitive Detection Circuit using MUX and DLC based on a νMOS

This paper describes novel scheme of a gray scale capacitive fingerprint image for high-accuracy capacitive sensor chip. The typical gray scale image scheme used a DAC of big size layout or charge-pump circuit of non-volatile memory with high power consumption and complexity by a global clock signal. A modified capacitive detection circuit of charge sharing scheme is proposed, which uses DLC(down literal circuit) based on a neuron MOS(vMOS) and analog simple multiplexor. The detection circuit is designed and simulated in 3.3V, standard CMOS process. Because the proposed circuit does not need a comparator and peripheral circuits, a pixel layout size can be reduced and the image resolution can be improved.

High gain ISFET based νMOS chemical inverter

Abstract For ion sensitive field effect transistors (ISFETs) built using a standard CMOS process, it is possible for more than one device to share the same ion sensitive membrane (passivation layer). Using floating gate MOS concepts, a complementary pair of ISFETs (n and p devices) can share the same ion sensitive membrane forming an ISFET based chemical switch. It is shown here that, using FG-ISFET and Neuron MOS concepts, a second electrical input may be capacitively coupled to their floating gate. Through properly sizing this coupling capacitor, it is possible to enhance pH sensitivity referred to its input more than a hundredfold. This forms an ISFET based νMOS chemical inverter with enhanced input referred sensitivity. This circuit was simulated, built, and tested. Its switching threshold voltage; referred to reference electrode, shifted by 31.26 mV per pH. This was increased to 3.7 V/pH when referred to the second electrical input. This is the highest ever reported chemical signal amplification for such a minimum component ISFET circuit.

Methodology for the design of a 4-bit soft-hardware-logic circuit based on neuron MOS transistors

As soft-hardware-logic circuits had been proposed in the literature as an alternative for digital circuits taking advantage the fact that any Boolean function could be implemented with the same cell, just configuring external signals, this work shows a methodology that could be followed particularly for the design of a four bits logic gate, using the so-called neuron MOS transistor (ν-MOS). Simulation results show the feasibility of the design for performing as XNOR, NOR, OR, XOR, AND or NAND logic gates, for instance. In order to extrapolate the design to a higher number of bits, the key issue is to properly consider the weight of the input capacitances in correlation with the number of input bits. A D/A converter can be used as the input stage of the configuration. This design considers the D/A converter-less version, since it helps to increase device integration as the number of transistors used is reduced with no difference in its performance. The design should be based on the theoretical floating potential diagram (FPD) of the desired logic gate.

Non-Faradaic electrochemical detection of protein interactions by integrated neuromorphic CMOS sensors

Electronic detection of the binding event between biotinylated bovine serum albumen (BSA) and streptavidin is demonstrated with the chemoreceptive neuron MOS (CνMOS) device. Differing from the ion-sensitive field-effect transistors (ISFET), CνMOS, with the potential of the extended floating gate determined by both the sensing and control gates in a neuromorphic style, can provide protein detection without requiring analyte reference electrodes. In comparison with the microelectrode arrays, measurements are gathered through purely capacitive, non-Faradaic interactions across insulating interfaces. By using a (3-glycidoxypropyl)trimethoxysilane (3-GPS) self-assembled monolayer (SAM) as a simple covalent link for attaching proteins to a silicon dioxide sensing surface, a fully integrated, electrochemical detection platform is realized for protein interactions through monotone large-signal measurements or small-signal impedance spectroscopy. Calibration curves were created to coordinate the sensor response with ellipsometric measurements taken on witness samples. By monitoring the film thickness of streptavidin capture, a sensitivity of 25ng/cm2 or 2Å of film thickness was demonstrated. With an improved noise floor the sensor can detect down to 2ng/(cm2mV) based on the calibration curve. AC measurements are shown to significantly reduce long-term sensor drift. Finally, a noise analysis of electrochemical data indicates 1/fα behavior with a noise floor beginning at approximately 1Hz.

Time-Resolved Charge Transport Sensing by Chemoreceptive Neuron MOS Transistors $({\rm C}\nu{\rm MOS})$ With Microfluidic Channels

Charge-based sensing in chemoreceptive neuron MOS (CvMOS)transistors with extended floating-gate structures has brought forth features that are beneficial to the system integration of chemical sensing. This paper presents the results of integrating CvMOS with wafer-bonding microfluidic channels for reliable time-resolved ion and molecular transport sensing, which can find potential applications in a microanalysis system.

Application of Neuron MOS in multiple-valued logic

A novel Neuron MOS transistor has come into being recently due to the characteristic of controlling the weighted sum of multiple-input gate and capacitance coupling effect in floating gate, as well as the function of saving the data in the floating gate. The Neuron MOS transistor can be used to replace complex operation on threshold in multiple-valued logic. Based on these characteristics, this paper proposes a new method for designing the multiple-valued D/A and A/D converter. The PSPICE simulation suggests that the designed circuit has correctly operational logic function and is characterized in low power consumption.

The novel multi‐input neuron MOS variable logic circuit realizing symmetric function

AbstractWith the increasingly sophisticated functionality of integrated circuits, dynamically reconfigurable circuits in which the structure of the circuit can be dynamically changed using single circuit units have attracted much attention. The neuron MOS transistor, a flexible device that functions in a manner that resembles the working of a biological neuron, has been developed as a high‐functionality device for use in such circuits. In this paper we propose a multiple‐input neuron MOS variable logic circuit that implements symmetric functions. The proposed design method makes use of a pre‐inverter and a main inverter; here we propose to allow the pre‐inverter to be controlled by a symmetric function. In this way the design allows well‐balanced capacity segmentation and can be easily extended to multiple inputs. In addition, it is possible to reduce the number of elements in the circuit compared with existing methods. We have created a prototype of the proposed circuit using the ON Semiconductor 1.2−µm CMOS standardized process and its functionality was verified in simulations and experiments using HSPICE. © 2006 Wiley Periodicals, Inc. Electron Comm Jpn Pt 2, 89(12): 8–16, 2006; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjb.20284

Proposal of a Hamming distance detector using neuron MOS transistors

AbstractA neuron MOS transistor has been proposed which operates more “intelligently” than a conventional MOS transistor. In this paper, we propose a Hamming distance detector with a large noise margin using the neuron MOS transistors. The proposed circuit accepts two bitstreams to be compared in parallel, and makes it possible to determine if the two bitstreams are identical (“exact match”) or if the Hamming distance between the two bitstreams is within a certain range (“near match”). Moreover, the “acceptable” range of the Hamming distance (in the case of “near match”) can be soft‐programmed. The operating characteristics of the circuit are also analyzed in detail. Furthermore, these analyses are fully confirmed by simulation using the circuit analysis program HSPICE. © 2006 Wiley Periodicals, Inc. Electr Eng Jpn, 155(1): 44–51, 2006; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/eej.20223

単一回路によるニューロンＭＯＳコンパレータに関する一考察

With the rapid development of the integrated circuit technology, the dynamic reconfigurable circuit has attracted much attention. The single circuit neuron MOS comparator has already been achieved. We propose the expansion of the circuit to achieve a multi-bit comparator. The proposed neuron MOS comparator is constructed by using only a two-stage neuron MOS inverter and an ordinary CMOS inverter. The newly designed circuit with an expanded Floating-Gate Potential Diagram (FPD) is described. The proposed circuit with three comparator functions is achieved using the single circuit. Applying this single circuit design technique, a multiple bits comparator can be achieved in a smaller area compared with that designed using the conventional circuit. The prototype of the newly proposed circuit was fabricated in the 1.2μm double poly-silicon CMOS process. The prototype device operates as well as the simulated one.

Thermal and Pressure Sensing by Chemoreceptive Neuron MOS Transistors (CνMOS) with PVDF Coating

ABSTRACTThis paper reports the integration of poled 10μm +/- 1μm P(VDF-TrFe) copolymer thin films with an adapted non-volatile, foundry-compatible CMOS structure (CνMOS) for the potential purposes of in-vivo piezoelectric and pyroelectric sensing. This structure allows for direct, reliable interaction between the sensing transducer and the highly sensitive MOSET gate stack without the need for an external reference electrode or chopper, as other designs may require.

Novel Reconfigurable Logic Gates Using Spin Metal–Oxide–Semiconductor Field-Effect Transistors

We propose and numerically simulate novel reconfigurable logic gates employing spin metal-oxide-semiconductor field-effect transistors (spin MOSFETs). The output characteristics of the spin MOSFETs depend on the relative magnetization configuration of the ferromagnetic contacts for the source and drain, that is, high current-drive capability in parallel magnetization and low current-drive capability in antiparallel magnetization [S. Sugahara and M. Tanaka: Appl. Phys. Lett. 84 (2004) 2307]. A reconfigurable NAND/NOR logic gate can be realized by using a spin MOSFET as a driver or an active load of a complimentary MOS (CMOS) inverter with a neuron MOS input stage. Its logic function can be switched by changing the relative magnetization configuration of the ferromagnetic source and drain of the spin MOSFET. A reconfigurable logic gate for all symmetric Boolean functions can be configured using only five CMOS inverters including four spin MOSFETs. The operation of these reconfigurable logic gates was confirmed by numerical simulations using a simple device model for the spin MOSFETs.

Integration of chemical sensing and electrowetting actuation on chemoreceptive neuron MOS (CνMOS) transistors

An integration of chemical sensors and electrowetting actuators based on the chemoreceptive neuron MOS (CνMOS) transistors has brought forth a novel system-on-chip approach to the microfluidic system. The extended floating-gate structure of the CνMOS transistors enables monolithic sensing and actuating schemes. The sensors with generic chemical receptive areas have been characterized with various fluids, and have demonstrated a high sensitivity from the current differentiation and a large dynamic range from threshold-voltage shifts in sensing polar and electrolytic liquids. The actuators have illustrated valve functions based on contact-angle modification by nonvolatile charge injection into the channel wall. Electrochemical models for sensing and actuation have been established, respectively. A transparent polymer microfluidic layer is adapted to provide physical and electrical isolation for sample fluid delivery and to offer convenient observation. The preliminary experimental results have verified the designs and operations of these devices and shown the potential in developing the dual-function devices with low power consumption and full compatibility with the conventional CMOS technology.

ニューロンMOSトランジスタを用いたハミング距離検出回路の提案

A neuron MOS transistor has been proposed which operates more “intelligently” than a conventional MOS transistor. In this paper, we propose a Hamming distance detector with a large noise margin using the neuron MOS transistors. The proposed circuit accepts two bitstreams to be compared in parallel, and makes it possible to determine if the two bitstreams are identical (“exact match”) or if the Hamming distance between the two bitstreams is within a certain range (“near match”). Moreover, the “acceptable” range of the Hamming distance (in the case of “near match”) can be soft-programmed. The operating characteristics of the circuit are also analyzed in detail. Furthermore, these analyses are fully confirmed by simulation using the circuit analysis program HSPICE. © 2006 Wiley Periodicals, Inc. Electr Eng Jpn, 155(1): 44–51, 2006; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/eej.20223

Charge-based chemical sensors: a neuromorphic approach with chemoreceptive neuron MOS (C/sub V/MOS) transistors

A novel chemoreceptive neuron MOS (C/spl nu/MOS) transistor with an extended floating-gate structure has been designed with several individual features that significantly facilitate system integration of chemical sensing. We have fabricated C/spl nu/MOS transistors with generic molecular receptive areas and have characterized them with various fluids. We use an insulating polymer layer to provide physical and electrical isolation for sample fluid delivery. Experimental results from these devices have demonstrated both high sensitivity via current differentiation and large dynamic range from threshold voltage shifts in sensing both polar and electrolytic liquids. We have established electrochemical models for both steady-state and transient analyses. Our preliminary measurement results have confirmed the basic design and operations of these devices, which show potential for developing silicon olfactory and gustatory units that are fully compatible with current CMOS technology.

Deviation-tolerant floating gate structures as a way to design an on-chip learning neural networks

Hardware implementation of artificial neural networks (ANN) based on MOS transistors with floating gate (Neuron MOS or νMOS) is discussed. Choosing analog approach as a weight storage rather than digital improves learning accuracy, minimizes chip area and power dissipation. However, since weight value can be represented by any voltage in the range of supplied voltage (e.g. from 0 to 3.3 V), minimum difference of two values is very small, especially in the case of using neuron with large sum of weights. This implies that ANN using analog hardware approach is weak against Vdd deviation. The purpose of this paper is to investigate main parts of analog ANN circuits (synapse and neuron) that can compensate all kinds of deviation and to develop their design methodologies.

A νMOS Vision Chip Based on Cellular-Automaton Processing

A neuron MOS (νMOS) vision chip was designed and fabricated for developing high-speed parallel image-processing systems based on cellular-automaton processing. The chip consists of cellular νMOS circuits that implement two fundamental functions in digital image processing: i) cleaning up noise in binary images and ii) detecting edges in the images, in addition to photosensing and image quantizing. Experimental results reveal that the fabricated chip successfully extracted edges from noisy inputs, which demonstrates the great potential of the νMOS vision chip in future image-processing applications.