Netlist Description Research Articles

A method for deriving the state space equations for degenerate linear time invariant circuits

AbstractA procedure for writing the state space equations for linear time invariant circuits is proposed. With this method the state equations for both degenerate and nondegenerate circuits can be derived in a systematic and unified manner. Capacitors' voltages and inductors' currents are chosen as state variables. First all the capacitors and inductors are replaced with voltage and current sources, respectively, and the modified nodal analysis is applied to this new circuit. By inspecting the system of equations obtained in this way and identifying the dependent equations among them, it is possible to detect any degeneracy, that is, dependency among the capacitors' voltages and inductors' currents, and subsequently refine the list of state variables. No knowledge of the circuits' graph is required and only its netlist description is needed in order to derive the equations, which makes it suitable for implementation as a computer program. Several examples are presented in which application of the method is demonstrated.

Theory of Injection-Locked Oscillator Phase Noise

The paper describes the development of a model for the calculation of noise-driven phase response of an injection-locked oscillator perturbed by Gaussian white sources. Being based on the state space formalism the framework is unified encompassing all circuit topologies and methods of unilateral coupling. We thus avoid reverting to the kind of simplified block-diagram description that one finds in previously published works on the topic and our approach furthermore allows for all the main results and model parameters to be derived numerically based on the netlist description of the circuit. To our knowledge this constitutes the first attempt at an ILO phase-noise description not relying on block diagrams or other such phenomenological modelling strategies.

A NEW TOPOLOGY ORIENTED METHOD FOR SYMBOLIC ANALYSIS OF ELECTRONIC CIRCUITS

This paper presents a new approach to symbolic network analysis. The procedure is entirely topology oriented because it operates with a netlist description of the analyzed circuit. The obtained network function has nested form. The method introduces a graph representation of the factorization process, that is constructed directly from a given circuit description. Therefore, it is named Topology Decision Diagram (TDD). This graph serves as a skeleton for network function generation. TDD construction starts from the original circuit and spreads to simplified subcircuits. Every subsequent subcircuit is obtained by replacing a circuit branch with an open or a short. The proposed procedure generates the network function in reverse order. It starts from a single circuit parameter placed as a leaf of TDD. Thereafter, the circuit function grows instantiating the other circuit parameter one by one in a sequential order. The proposed method was developed for analogue CMOS circuits and, consequently, recognizes R, L, C and gm as circuit components.

Algorithms for Automatic Model Topology Formulation

A novel algorithm for automatic behavioral model topology formulation (MTF) is described in this paper. Several new terms are defined to support this formulation approach. The algorithms for determining the controllability and equivalence of branches are developed. The identification of differential pairs and current mirror structures is implemented automatically. Some other algorithms identify a subset of nodes in circuits that are extracted and modeled, while the other nodes will be collapsed. The MTF algorithm then is applied to construct a new signal-path graph, i.e., forming an equivalent circuit that has the ability to represent the behavior of the original circuit in a much-simplified form. This algorithm is implemented in a fully automated modeling tool, ASCEND, which starts from the netlist description of a circuit and generates a differential-algebraic-equation-based model. These models are able to represent static and dynamic behaviors with excellent accuracy and significant simulation speedup. The details of the MTF algorithm are described. Examples of applying the MTF algorithm for behavioral modeling are given.

Optimal Detector Design for On‐line Testing of Linear Analog Systems

The design of integrated fault detector for on‐line testing of linear analog systems is discussed in this paper. The method consists in a concurrent processing of available the node voltage signals to provide a residual on‐line, that carries information about the faults. Contrary to the few previous works dealing with the particular case of state variable analog systems, the method proposed here is useable without limitation for a larger class of linear analog systems, even when the state variables are not available as measurable voltages. For this purpose, an algorithm providing an extended state space model for any linear analog system from its netlist description is developed and implemented.

Analysis of noise in quartz crystal oscillators by using slowly varying functions method

By using formal manipulation capability of commercially available symbolic calculation code, it is possible to automatically derive the characteristic polynomial describing the conditions for oscillation of a circuit. The analytical expression of the characteristic polynomial is obtained through an encapsulation process starting from the SPICE netlist description of the circuit: by using a limited number of simple transformations, the initial circuit is progressively transformed in a simplified standard form. In this method, the nonlinear component is described by its large signal admittance parameters obtained from a set of SPICE transient simulations of larger and larger amplitude. The encapsulation process involving linear and nonlinear components as well as noise sources leads to a perturbed characteristic polynomial. In the time domain, the perturbed characteristic polynomial becomes a nonlinear nonautonomous differential equation. By using an extension of the slowly varying functions method, this differential equation is transformed into a nonlinear differential system with perturbation terms as the right-hand side. Eventually, solving this system with classical algorithms allows one to obtain both amplitude and phase noise spectra of the oscillator.

Time-domain analysis of nonlinear transducer networks

The existence of computer methods for the construction of network system equations from a netlist description and numerical methods for the solution of initial-value problems in mixed differential-algebraic equations (DAE’s) allow the time-domain analysis of networks containing nonlinear elements. This paper will demonstrate these techniques in application to electromechanical transduction systems exhibiting small- and large-signal nonlinear behavior. Nonlinear constitutive equations defining electromechanical elements in transducer networks will be developed in the proper form for inclusion in a modified nodal formulation. It will be shown that consistent sets of initial conditions can be determined from a modified netlist under limited circumstances, but these limitations do not significantly constrain the utility of method in this application. In fact, this approach opens the method up to elements with static behavior, such as permanent magnets or electrets. Time-domain behavior of the system is numerically derived from the descriptor equations by a backward difference formula (BDF) DAE integrator appropriate for stiff systems.

Logic optimization and equivalence checking by implication analysis

This paper proposes a new approach to multilevel logic optimization based on automatic test pattern generation (ATPG). It shows that an ordinary test generator for single stuck-at faults can be used to perform arbitrary transformations in a combinational circuit and discusses how this approach relates to conventional multilevel minimization techniques based on Boolean division. Furthermore, effective heuristics are presented to decide what network manipulations are promising for minimizing the circuit. By identifying indirect implications between signals in the circuit, transformations can be derived which are good candidates for the minimization of the circuit. A main advantage of the proposed approach is that it operates directly on the structural netlist description of the circuit so that the technical consequences of the performed transformations can be evaluated in an easy way, permitting better control of the optimization process with respect to the specific goals of the designer. Therefore, the presented technique can serve as a basis for optimization techniques targeting nonconventional design goals. This paper only considers area minimization, and our experimental results show that the method presented is competitive with conventional technology-independent minimization techniques. For many benchmark circuits, our tool, the Hannover implication tool, based on learning (HANNIBAL) achieves the best minimization results published to date. Furthermore, the optimization approach presented is shown to be useful in formal verification.

Building BDDs with ordering-reshuffle strategy

An ordering-reshuffle strategy for building BDDs from a net list description is proposed. This algorithm dynamically modifies an initial ordering according to the encountered adverse situation to maintain the intermediate BDD under a reasonable size. The effectiveness of this strategy is demonstrated by building common-ordering BDDs for large circuits in the ISCAS85 benchmark including c7552 which hitherto has not been successful.