This paper demonstrates a methodology to overcome the challenges in obtaining a distinguishable current image when the radius of curvature of the conductive atomic force microscopy (C-AFM) tip is larger than the feature size of the device under test, e.g., the individual tungsten contacts of a static random access memory (SRAM) device. A model is presented to understand the interaction between the C-AFM tip and the features on the surface of a SRAM sample. Based on this model, recessed depth (tungsten recessed to neighboring dielectric) or protruding height (protruding tungsten with respect to the dielectric) is then created on the sample surface to provide suitable topographical contrast so that the electrical signals from the smaller tungsten contacts could be better discerned. It has been calculated that the surface treated dimensions need to fall within a feasible range in order to obtain a well-resolved current image. In the case where a recessed depth is created, the depth cannot be too deep as the edge of the neighboring insulating dielectric would block the base of the C-AFM tip and prevent the tip from accessing the lower-residing tungsten contact. The lack of good contact between the tip and receding tungsten contact would result in the inability to extract the electrical signals from the tungsten contact. In the case where protruding tungsten is created, a height limit exists whereby the conductive-AFM tip would unintentionally touch the neighboring tungsten contacts, creating a false illusion that the tungsten contacts are shorted together. The proposed model is generic and is able to serve as a guide to achieve a good current image. The required dimension could be easily calculated by inserting the known specifications into the model. Following the theoretical understanding, the recessed depth and protruding height are then physically created on the sample surface for enhanced C-AFM imaging. The experimental results agree well with the theoretical predictions from the model. This technique is then applied on actual failure analysis/fault isolation of SRAM devices.