Negative Differential Transconductance Research Articles

Multifunctional Phototransistor Based on Double Van der Waals Heterojunction with Reversed Band Edge Bending

AbstractDouble van der Waals heterojunctions (vdWHs) based on 2D materials showcase multifunctional properties, including anti‐ambipolar behavior and polarization‐sensitive photodetection capabilities, providing a new degree of freedom for the development of next‐generation integrated electronics and optoelectronics. Herein, this work reports an anti‐ambipolar transistor with high polarized photosensitivity based on MoS2/Ta2NiS5/WSe2 double vdWH with back‐to‐back type‐I band alignment. It demonstrates a noticeable negative differential transconductance with an ultrahigh peak‐to‐valley ratio of 4.3 × 104 and a bidirectional transconductance variation from 41.6 to −17.5 nS when VD = 2 V. It is ascribed to the effective gate‐modulation of the reversed band edge bending at the double vdWH interfaces. Additionally, the structure benefits from a photogating effect and the anisotropic Ta2NiS5 interlayer, achieving a peak responsivity of 120.58 A W−1 and a decent specific detectivity of 2.65 × 1012 Jones at VD = 2 V and Vg = 5 V and exhibiting an exceptional photocurrent anisotropic ratio of 15.31 via the photovoltaic effect under 635 nm light. These findings not only expand the potential applications of the advanced 2D Ta2NiS5 material but also offer valuable insights for the development of multifunctional optoelectronic devices leveraging 2D double vdWHs.

A Mixture of Negative-, Zero-, and Positive-Differential Transconductance Switching from Tellurium/Indium Gallium Zinc Oxide Heterostructures.

Conventional transistors have long emphasized signal modulation and amplification, often sidelining polarity considerations. However, the recent emergence of negative differential transconductance, characterized by a drain current decline during gate voltage sweeping, has illuminated an unconventional path in transistor technology. This phenomenon promises to simplify the implementation of ternary logic circuits and enhance energy efficiency, especially in multivalued logic applications. Our research has culminated in the development of a sophisticated mixed transconductance transistor (M-T device) founded on a precise Te and IGZO heterojunction. The M-T device exhibits a sequence of intriguing phenomena, zero differential transconductance (ZDT), positive differential transconductance (PDT), and negative differential transconductance (NDT) contingent on applied gate voltage. We clarify its operation using a three-segment equivalent circuit model and validate its viability with IGZO TFT, Te TFT, and Te/IGZO TFT components. In a concluding demonstration, the M-T device interconnected with Te TFT achieves a ternary inverter with an intermediate logic state. Remarkably, this configuration seamlessly transitions into a binary inverter when it is exposed to light.

Charge transfer mechanism for realization of double negative differential transconductance

With development of information age, multi-valued logic (MVL) technology utilizing negative differential transconductance (NDT) phenomenon has drawn attention as next-generation computing technology that can replace binary logic. However, because conventional NDT devices primarily use ternary logic, multiple-peak NDT device is required for higher-radix MVL that can process more datasets. Here, van der Waals double-peak anti-ambipolar transistor (AAT) as NDT device was developed by utilizing peak voltage (Vpeak) modulation of NDT peak. For realization of quaternary logic, Vpeak modulation technology was developed through charge transfer mechanism from channel, thereby shifting NDT peak and increasing peak-to-valley current ratio (PVCR). Furthermore, Double-peak AAT was implemented through parallel configuration of two AATs with different Vpeak values. Finally, quaternary inverter with four widely stable logic states was implemented by utilizing the developed double-peak AAT with two distinct NDT peaks and high PVCR. This double-peak AAT is expected to contribute to the development of next-generation MVL technology capable of processing datasets.

Oxide Semiconductor Heterojunction Transistor with Negative Differential Transconductance for Multivalued Logic Circuits.

Multivalued logic (MVL) technology is a promising solution for improving data density and reducing power consumption in comparison to complementary metal-oxide-semiconductor (CMOS) technology. Currently, heterojunction transistors (TRs) with negative differential transconductance (NDT) characteristics, which play an important role in the function of MVL circuits, adopt organic or 2D semiconductors as active layers, but it is still difficult to apply conventional CMOS processes. Herein, we demonstrate an oxide semiconductor (OS) heterojunction TR with NDT characteristics composed of p-type copper(I) oxide (Cu2O) and n-type indium gallium zinc oxide (IGZO) using the conventional CMOS manufacturing processes. The electrical characteristics of the fabricated device exhibit a high Ion/Ioff ratio (∼3 × 103), wide NDT ranges (∼29 V), and high peak-to-valley current ratios (PVCR ≈ 25). The electrical properties of 15 devices were measured, confirming uniform performance in the PVCR, NDT range, and Ion/Ioff ratio. We analyze the device operation by varying the source/drain (S/D) position and changing the device geometry and the thickness of the Cu2O layer. Additionally, we demonstrate heterojunction ambipolar TR to elucidate the transport mechanism of NDT devices at a high gate voltage (VGS). To confirm the feasibility of the MVL circuit, we present a ternary inverter with three clearly expressed logic states that have a long intermediate state and greater margin of error induced by wide NDT regions and high PVCR.

Superionic Silver Halide Solid Electrolyte: Dielectric Property and Iontronic Memtransistor Application for Bioinspired Computing

AbstractTechnology like high‐level parallel information processing and storage in the brain remains a dream to the researchers using conventional solid‐state electronics. Here, a robust thin film bilayer superionic dielectric of poly(ethylene oxide) (PEO) and rubidium silver iodide (RbAg4I5) is developed to fabricate solid‐state iontronic synaptic memtransistors, which can serve as the basic building blocks for the hardware‐implementation of neuromorphic computing. X‐ray photoelectron spectroscopy and impedance measurements precisely confirm the stoichiometric composition of RbAg4I5 and dielectric nature combining with a PEO layer, respectively. The superionic bilayer PEO/RbAg4I5 gating effectively modulates the channel conductance analogously and displays memtransistor functionality. Interestingly, the transfer curves depict a colossal hysteresis yielding negative differential transconductance of peak‐to‐valley ratio up to 5 × 103 after the gate‐controlled resistive switching. Systematic electrical characterizations reveal a variety of synaptic behaviors, including the inhibitory postsynaptic current, paired‐pulse depression, and potentiation/depression curve. Finally, an artificial neural network for off‐chip digit recognition is simulated to assess the performance of the device for the neuromorphic application and achieved a test accuracy of 95.94% on the Modified National Institute of Standards and Technology dataset.

Novel approach for implementing ternary value logic devices showing negative differential transconductance characteristics by Fowler–Nordheim tunneling

Ternary value logic (TVL) devices are gaining attention owing to the limitations of binary devices in handling the increasing amount of information. However, the development of ternary devices has been hindered by the complex structures and use of materials lacking CMOS compatibility. This study presents a novel approach to develop ultra-simple TVL devices using thin-tunnel gate dielectrics of AlOx films and TiO2 channel layer. TVL devices are obtained by employing TiO2-based transistors with AlOx films as an oxide tunneling dielectric layer. The device exhibits typical transistor switching characteristics at low gate voltage (VG) and negative differential transconductance owing to Fowler−Nordheim tunneling current at high VG. The reversible implementation of three states, namely, ON, intermediate (INT), and OFF, with the same probability, is demonstrated with excellent reproducibility even after 200 cycles. A circuit is constructed to demonstrate the three output voltage states with respect to the input voltage by connecting the TVL device to a resistor. Additionally, the value and width of the plateau region of the INT output voltage state can be tuned by adjusting the variable resistance values. These highly simplistic TVL devices have the potential for application in low-power, highly integrated, and ultra-miniature electronic devices, thanks to their high level of CMOS compatibility.

Gate-Tunable van der Waals Photodiodes with an Ultrahigh Peak-to-Valley Current Ratio.

Photodetectors and imagers based on 2D layered materials are currently subject to a rapidly expanding application space, with an increasing demand for cost-effective and lightweight devices. However, the underlying carrier transport across the 2D homo- or heterojunction channel driven by the external electric field, like a gate or drain bias, is still unclear. Here, a visible-near infrared photodetector based on van der Waals stacked molybdenum telluride (MoTe2 ) and black phosphorus (BP) is reported. The type-I and type-II band alignment can be tuned by the gate and drain voltage combined showing a dynamic modulation of the conduction polarity and negative differential transconductance. The heterojunction devices show a good photoresponse to light illumination ranging from 520-2000nm. The built-in potential at the MoTe2 /BP interface can efficiently separate photoexcited electron-hole pairs with a high responsivity of 290mAW-1 , an external quantum efficiency of 70%, and a fast photoresponse of 78µs under zero bias.

Antiambipolar Transistor with Double Negative Differential Transconductances for Organic Quaternary Logic Circuits

AbstractOrganic integrated circuits have emerged as potential candidates for next‐generation computing technology because of their low‐cost production, light weight, and mechanical flexibility. However, the incompatibility of organic devices with modern lithographic techniques leads to a major bottleneck, that is, low integration density. Herein, it is attempted to solve this issue by developing an organic quaternary inverter that exhibits four distinguishable logic states and thus, can significantly improve the level of device integration. The key component of the inverter is a double‐peaked antiambipolar transistor (DAAT) with a double sequential negative differential transconductance characteristic. First, the DAAT is developed by employing two lateral p‐n heterojunctions, namely C8‐BTBT/PTCDI‐C8 and C8‐BTBT/PhC2‐BQQDI, in which three distinct conducting paths are produced in a step‐by‐step manner in accordance with the increase in the gate voltage (VG). Next, the quaternary inverter circuit is implemented by connecting the DAAT with an n‐type transistor. The inverter exhibits four logic states with a complete drain voltage to ground voltage sweep. Finally, a strategy of optimizing the thickness of the PTCDI‐C8 layer to improve the voltage transfer characteristics of the quaternary inverters is demonstrated. This study, thus, represents a step toward the development of high‐performance organic integrated circuits.

Diverse field-effect characteristics and negative differential transconductance in a graphene/WS2/Au phototransistor with a Ge back gate.

We propose an infrared-sensitive negative differential transconductance (NDT) phototransistor based on a graphene/WS2/Au double junction with a SiO2/Ge gate. By changing the drain bias, diverse field-effect characteristics can be achieved. Typical p-type and n-type behavior is obtained under negative and positive drain bias, respectively. And NDT behavior is observed in the transfer curves under positive drain bias. It is believed to originate from competition between the top and bottom channel currents in stepped layers of WS2 at different gate voltages. Moreover, this phototransistor shows a gate-modulated rectification ratio of 0.03 to 88.3. In optoelectronic experiments, the phototransistor exhibits a responsivity of 2.76 A/W under visible light at 532 nm. By contrast, an interesting negative responsivity of -29.5 µA/W is obtained and the NDT vanishes under illumination by infrared light at 1550 nm. A complementary inverter based on two proposed devices of the same structure is constructed. The maximum voltage gain of the complementary inverter reaches 0.79 at a supply voltage of 1.5 V. These results demonstrate a new method of realizing next-generation two- and three-dimensional electronic and optoelectronic multifunctional devices.

Graphene Bridge Heterostructure Devices for Negative Differential Transconductance Circuit Applications

HighlightsGraphene (Gr)-bridge heterostructure, consisting of a laterally series-connected (cascade) ambipolar/Gr/n-type 2D van der Waals channel materials for ambipolar semiconductor-based high-end application devices was developed.Non-classical transfer characteristics (humped curve) in FET operation and negative differential transconductances were observed.Gr-bridge heterostructure device with PdSe2 (narrow bandgap) allows multi-value logic operation while WSe2 (wide bandgap) enables frequency tripler circuit operation.

Ultralow Subthreshold Swing 2D/2D Heterostructure Tunneling Field-Effect Transistor with Ion-Gel Gate Dielectrics

Two-dimensional (2D) transition-metal dichalcogenide (TMD) semiconductors are promising materials for realizing band-to-band tunneling devices owing to the atomically thin layer and abrupt interface of their heterostructures. In this study, we transferred scalable few-atomic-layer thin films using metal-organic chemical vapor deposition (MOCVD)-grown molybdenum disulfide (MoS2) as an n-channel and CVD-grown molybdenum ditelluride (MoTe2) and tungsten diselenide (WSe2) as p-channels to build van der Waals vertical heterostructures. The heterostructures of intrinsic MoS2 and MoTe2 (or WSe2), each having n-type, ambipolar, or high p-type conductivity, were suitable for tunneling field-effect transistor (TFET) applications. We measured the electrical transport properties of the MoS2/MoTe2 (or WSe2) heterostructures using an ion-gel top gate. The fabricated TFET with MoS2/MoTe2 (or WSe2) heterostructures exhibits a subthreshold swing as low as 9.1 (or 7.5) mV/dec. The negative differential transconductance, negative differential resistance, and temperature-dependent I–V characteristics demonstrate the band-to-band tunneling process. The findings have significant potential for applications in the large-area production of next-generation wearable, stretchable, and flexible low-power electronic devices.

Surface Potential Visualization in Organic Antiambipolar Transistors Using Operando Kelvin Probe Force Microscopy for Understanding the Comprehensive Carrier Transport Mechanism

AbstractAn antiambipolar transistor (AAT) exhibits a negative differential transconductance (NDT) due to a partially overlapped p–n junction formed in the transistor channel. However, the NDT origin remains unclear. In this study, the operando Kelvin probe force microscopy is employed to unveil this issue. When the AAT is turned on, steep potential drops induced by pinch‐off states are visible in the p‐ and n‐type channels. Due to the similarity to the surface potential profiles in the constituent transistors, it is revealed that the pinch‐off points are formed at both edges of the p–n‐stacked layers. This result indicates that the overlapped layers behave like a pseudo‐drain electrode for both transistor channels. Therefore, the AAT drain current can be explained as the overlapped currents in the saturation regions of the p‐ and n‐type transistors. Moreover, the drain current is suppressed when either the p‐ or n‐type channel is completely depleted. The depletion layer formation is responsible for the NDT property. This technique provides a comprehensive understanding of the carrier transport mechanism of AATs, leading to the further evolution of organic electronic circuits.

Two-dimensional materials based on negative differential transconductance and negative differential resistance for the application of multi-valued logic circuit: a review

Two-dimensional materials based on negative differential transconductance and negative differential resistance for the application of multi-valued logic circuit: a review

A Van Der Waals Reconfigurable Multi-Valued Logic Device and Circuit Based on Tunable Negative-Differential-Resistance Phenomenon.

Multi-valued logic (MVL) technology that utilizes more than two logic states has recently been reconsidered because of the demand for greater power saving in current binary logic systems. Extensive efforts have been invested in developing MVL devices with multiple threshold voltages by adopting negative differential transconductance and resistance. In this study, a reconfigurable, multiple negative-differential-resistance (m-NDR) device with an electric-field-induced tunability of multiple threshold voltages is reported, which comprises a BP/ReS2 heterojunction and a ReS2 /h-BN/metal capacitor. Tunability for the m-NDR phenomenon is achieved via the resistance modulation of the ReS2 layer by electrical pulses applied to the capacitor region. Reconfigurability is verified in terms of the function of an MVL circuit composed of a reconfigurable m-NDR device and a load transistor, wherein staggered-type and broken-type double peak-NDR device operations are adopted for ternary inverter and latch circuits, respectively.

Charge transport behaviors in a multi-gated WSe2/MoS2 heterojunction

Heterojunctions and multi-gated structures facilitate the fabrication of high-performance and multifunctional transistors. Here, a WSe2/MoS2 heterojunction structure transistor with a back gate and two top gates is proposed. The back gate controls the carrier transport of the entire heterojunction channel, and the top gates independently control the carrier transports of MoS2 or WSe2 channels. The rectification direction of the heterojunction device could be reversed, and the rectification ratio could be modulated from 10−4 to 104 by changing the back-gate voltage. In addition, an evident negative-differential transconductance phenomenon with a current peak and a current valley are observed in the back-gate transfer characteristic curve, which results from the different control ability of the same gate voltage to the Fermi levels in MoS2 and WSe2. The current peak can be obviously modulated and eliminated by the MoS2 top gate, while the WSe2 top gate can control the position of the current valley from −8 to +12 V, which clearly supports the heterostructure energy band model. Moreover, the diversity of output states under multi-gate modulation makes applications in logic circuits possible. These results demonstrate the potential of this approach for the development of next-generation electronic functional devices.

Carrier-Transport Mechanism in Organic Antiambipolar Transistors Unveiled by Operando Photoemission Electron Microscopy.

Organic antiambipolar transistors (AATs) have partially overlapped p-n junctions. At room temperature, this p-n junction induces a negative differential transconductance in an AAT. However, the detailed carrier-transport mechanism remains unclear. Herein, an operando photoemission electron microscopy is used to tackle this issue owing to the technique's ability to visualize conductive electrons in real time during transistor operation. Notably, it is observed that when the AAT is on, a depletion layer forms at the lateral p-n junction. The visualized depletion layer shows that both p- and n-type channels have pinch-off states in the gate voltage range when the AAT is in on state. The steep potential gradient at the lateral p-n interface enhances the electron conduction from n-type to p-type semiconductor. Another significant finding is that most electrons are considered to recombine with the accumulated holes in the p-type semiconductor, affording the reduction of photoemission intensity by ≈80%. This technique provides a thorough understanding of carrier transport in AATs, further improving the device performance.

Electrically Reconfigurable Organic Logic Gates: A Promising Perspective on a Dual‐Gate Antiambipolar Transistor (Adv. Mater. 15/2022)

Multifunctional Logic Circuits In article number 2109491, Yutaka Wakayama and co-workers demonstrate electrically reconfigurable organic logic circuits using a dual-gate anti-ambipolar transistor. The transistor shows a negative differential transconductance even at room temperature. This unique feature achieves five two-input logic gate operations with “only a transistor”. Such logic operations are not obtainable in conventional transistors. The device concept will provide a way of realizing multifunctional organic logic circuits using a simple circuit design.

Electrically Reconfigurable Organic Logic Gates: A Promising Perspective on a Dual‐Gate Antiambipolar Transistor

AbstractElectrically reconfigurable organic logic circuits are promising candidates for realizing new computation architectures, such as artificial intelligence and neuromorphic devices. In this study, multiple logic gate operations are attained based on a dual‐gate organic antiambipolar transistor (DG‐OAAT). The transistor exhibits a Λ‐shaped transfer curve, namely, a negative differential transconductance at room temperature. It is important to note that the peak voltage of the drain current is precisely tuned by three input signals: bottom‐gate, top‐gate, and drain voltages. This distinctive feature enables multiple logic gate operations with “only a single DG‐OAAT,” which are not obtainable in conventional transistors. Five logic gate operations, which correspond to AND, OR, NAND, NOR, and XOR, are demonstrated by adjusting the bottom‐gate and top‐gate voltages. Moreover, varying the drain voltage makes it possible to reversibly switch two logic gates, e.g., NAND/NOR and OR/XOR. In addition, the DG‐OAATs show a high degree of stability and reliability. The logic gate operations are observed even months later. The hysteresis in the transfer curves is also negligible. Thus, the device concept is promising for realizing multifunctional logic circuits with a simple transistor configuration. Hence, these findings are expected to surpass the current limitations in complementary metal−oxide−semiconductor devices.

Emergence of multiple negative differential transconductance from a WSe2 double lateral homojunction platform

Recent advances in two-dimensional (2D) van der Waals heterostructures have re-spurred the investigation of non-linear negative differential carrier transport transistors as a potential ingredient for the upcoming digital-driven hyperconnected era. Although notable findings employing various 2D heterojunctions have been recently demonstrated, the performance metrics are insufficient to fulfill requirements for practical device applications, and fundamental difficulties associated with multiple vertical stacking processes in device fabrication must be resolved. Here, we report the realization of multiple negative differential transconductance (NDT) and resistance (NDR) characteristics obtained from a single p-i-n WSe2 double lateral homojunction (DLHJ) transistor. Forming the DLHJ through the selective surface charge transfer doping of a homogeneous bilayer WSe2 film, double NDT characteristics that excel those expected from individual junction components and have high peak-to-valley current ratios (PVCRs) of 36.6 and 12.9 are achieved. Performing combined experimental characterizations and first-principle calculations, obtained exceptional NDT performance at room temperature is determined to originate from the modulation of trap-assisted tunneling and nonlinear 2D band shifts in response to the gate control. Furthermore, the quaternary logic operation based on the triple NDR with the largest PVCR of 137 is achieved by the correlated biasing of the WSe2 DLHJ device.

Bias-controlled multi-functional transport properties of InSe/BP van der Waals heterostructures

Van der Waals (vdW) heterostructures, consisting of a variety of low-dimensional materials, have great potential use in the design of a wide range of functional devices thanks to their atomically thin body and strong electrostatic tunability. Here, we demonstrate multi-functional indium selenide (InSe)/black phosphorous (BP) heterostructures encapsulated by hexagonal boron nitride. At a positive drain bias (VD), applied on the BP while the InSe is grounded, our heterostructures show an intermediate gate voltage (VBG) regime where the current hardly changes, working as a ternary transistor. By contrast, at a negative VD, the device shows strong negative differential transconductance characteristics; the peak current increases up to ~5 μA and the peak-to-valley current ratio reaches 1600 at VD = −2 V. Four-terminal measurements were performed on each layer, allowing us to separate the contributions of contact resistances and channel resistance. Moreover, multiple devices with different device structures and contacts were investigated, providing insight into the operation principle and performance optimization. We systematically investigated the influence of contact resistances, heterojunction resistance, channel resistance, and the thickness of BP on the detailed operational characteristics at different VD and VBG regimes.