Nb Trilayer Research Articles

Ground-state characterization of Nb charge-phase Josephson qubits

We present investigations of Josephson charge-phase qubits inductively coupled to a radio-frequency driven tank-circuit enabling the readout of the states by measuring the Josephson inductance of the qubit. The circuits including junctions with linear dimensions of 60 nm and 80 nm are fabricated from Nb trilayer and allowing the determination of relevant sample parameters at liquid helium temperature. The observed partial suppression of the circulating supercurrent at 4.2 K is explained in the framework of a quantum statistical model. We have probed the ground-state properties of qubit structures with different ratios of the Josephson coupling to Coulomb charging energy at 20 mK, demonstrating both the magnetic control of phase and the electrostatic control of charge on the qubit island.

Six-Layer Process for the Fabrication of<tex>$rm Nb/Al-rm AlO_x/rm Nb$</tex>Josephson Junction Devices

A six-layer process is described for the fabrication of Josephson junction devices and Superconducting QUantum Interference Devices (SQUIDs) on silicon wafers up to 150 mm in diameter. The Nb/Al-AlO/sub x//Nb trilayers are sputter-deposited in a load-locked vacuum chamber with base pressure in the low 10/sup -7/ Pa (10/sup -9/ Torr) range and a very low leak up rate of 5/spl times/10/sup -6/ Pa/min (3.5/spl times/10/sup -5/ mTorr/min). The barrier process is optimized for a critical current density of 100 A/cm/sup 2/, and all resistors are fabricated from palladium with a sheet resistivity of 1 /spl Omega//sq. A charge dissipative dielectric layer is used in order to reduce the probability of damage caused by electrostatic charge build-up and discharge. The trilayer films are wet etched, while the subsequent metal and dielectric films are patterned using fluorine-based reactive ion etch, Ar ion milling, or lift-off techniques. This process is currently being used to fabricate dc SQUIDs for various instrumentation applications, integrated SQUID magnetometers and planar gradiometers, and single tunnel junction detectors.

Measurements of a Persistent-Current Qubit Driven by an On-Chip Radiation Source

Monolithic integration of control electronics with superconducting qubits will facilitate scalability of a superconducting quantum computer by reducing the room temperature electronics necessary for performing quantum state manipulation. We report the experimental results of the monolithic integration of an on-chip radiation source with a persistent-current (PC) qubit and dc SQUID measurement device. The devices were fabricated at MIT Lincoln Laboratory in a Nb/Al/AlOx/Nb trilayer process. The two PC qubit states were detected by measuring the switching current of an underdamped dc SQUID magnetometer inductively coupled to the qubit. The radiation source comprised an overdamped dc SQUID operating in the voltage state and inductively coupled to the qubit and measurement SQUID through a low-Q RLC filter. The oscillator was designed to have tunable amplitude and frequency to satisfy the requirements for coherent quantum manipulation of a superconducting PC qubit. We will discuss the measurements in the millikelvin regime and the effects of the oscillator noise on the state of the qubit.

Design and Operation of a Pulse-Number Multiplier for a High-Precision RSFQ D/A Converter

A pulse-number multiplier (PNM) is a principal subsystem of our rapid single flux quantum digital-to-analog converter for metrology applications. The PNM circuit generates a high-speed pulse train from an input of a precise low-frequency clock signal. We designed, fabricated, and successfully tested a PNM test circuit. The PNM test circuit was implemented by using our standard cell library on 1.6 kA/cm/sup 2/ Nb trilayer technology. Fully functional operation was confirmed by low-speed testing. Experimental bias margins were wider than /spl plusmn/20%, and these results agreed with a simulation. We also tested the circuit by average-voltage measurements for estimating the frequencies of output pulse trains. Results of average-voltage measurements implied that the output frequency of the PNM circuit was tunable from 5 GHz to 17 GHz. The bit error rate (BER) of the PNM circuit was measured, and extrapolation of the error-function fits suggested a sufficiently small BER at the optimum bias point.

Single-charge devices with ultrasmall Nb∕AlOx∕Nb trilayer Josephson junctions

Josephson junction transistors and 50-junction arrays with linear junction dimensions from 200nm down to 70nm were fabricated from standard Nb∕AlOx∕Nb trilayers. The fabrication process includes electron beam lithography, dry etching, anodization, and planarization by chemical-mechanical polishing. The samples were characterized at temperatures down to 25mK. In general, all junctions are of high quality and their I-U characteristics show low leakage currents and high superconducting energy gap values of Δ≈1.35meV. The characteristics of the transistors and arrays exhibit some features in the subgap area, associated with tunneling of Cooper pairs, quasiparticles, and their combinations due to the redistribution of the bias voltage between the junctions. Total island capacitances of the transistor samples ranged from 1.5fF to 4fF, depending on the junction sizes. Devices made of junctions with linear dimensions below 100nm×100nm demonstrate a remarkable single-electron behavior in both superconducting and normal state. We also investigated the area dependence of the junction capacitances for transistor and array samples.

Fabrication of wide-IF 200–300GHz superconductor–insulator–superconductor mixers with suspended metal beam leads formed on silicon-on-insulator

We report on a fabrication process that uses SOI substrates and micromachining techniques to form wide-IF SIS mixer devices that have suspended metal beam leads for rf grounding. The mixers are formed on thin 25μm membranes of Si, and are designed to operate in the 200–300GHz band. Potential applications are in tropospheric chemistry, where increased sensitivity detectors and wide-IF bandwidth receivers are desired. They will also be useful in astrophysics to monitor absorption lines for CO at 230GHz to study distant, highly redshifted galaxies by reducing scan times. Aside from a description of the fabrication process, electrical measurements of these Nb∕Al–AlNx∕Nb trilayer devices will also be presented. Since device quality is sensitive to thermal excursions, the new beam lead process appears to be compatible with conventional SIS device fabrication technology.

Analysis of the fabrication process of Nb/Al-AlN/sub x//Nb tunnel junctions with low R/sub n/A values for SIS mixers

We characterize the fabrication process of superconductor-insulator-superconductor junctions (SIS) based on a Nb/Al-AlN/sub x//Nb tri-layer. Utilization of the AlN/sub x/ tunnel barrier, produced by Al nitridation in a nitrogen glow discharge, enables us to produce high quality SIS junctions with low R/sub n/A values (the product of junction resistance and area). Analyzing the correlation of junction resistance and plasma properties, it is concluded that the mechanism of tunnel barrier formation is based on nitrogen implantation into the Al layer with subsequent diffusion of nitrogen, stimulated by plasma heating. The latter process plays a dominant role since R/sub n/A values are well correlated with the power dissipated on the substrate surface. An SIS mixer using this technology and electron-beam lithography has been successfully fabricated.

Design and operation of a rapid single flux quantum demultiplexer

A demultiplexer (DMUX) is a key subsystem of rapid single flux quantum (RSFQ) circuits and systems in practical applications. High-speed data from RSFQ circuits should be converted into sufficiently low-speed ones for transmission to and processing by room temperature electronics. We designed, fabricated and successfully tested an RSFQ DMUX based on the synchronous shift-and-dump architecture whose advantages are modularity and compactness. A 1-to-8 DMUX was implemented using our standard cell library on 1.6 kA cm−2 Nb trilayer technology. Fully functional operation was confirmed by low speed testing. Experimental bias margins were as large as ±16%. Results of average voltage measurements implied that the DMUX was operated at data rates up to 25 Gb s−1.

Analog-to-digital converter based on RSFQ technology for radio astronomy applications

We are developing an analog-to-digital converter (ADC) based on rapid single-flux quantum technology for radio-astronomic spectroscopy applications where very wide bandwidth is required and relatively small resolution is sufficient. The ADC consists of periodic-flash comparators, a demultiplexer and output drivers; and is sufficiently simple to be implemented on a single chip using a conventional 2–3 μm Nb trilayer technology. A 2-bit ADC has been designed for operation at 16 GHz of the sampling frequency. All the subsystems of the ADC have been fabricated using standard 1.6 kA cm−2 Nb/AlOx/Nb technology and have been successfully tested.

Electron density fluctuations at interfaces in Nb/Si bilayer, trilayer, and multilayer films: An x-ray reflectivity study

A grazing incidence x-ray reflectivity technique has been used to determine electron density profile (EDP) as a function of depth in Nb-on-Si and Si-on-Nb bilayer, Nb–Si–Nb and Si–Nb–Si trilayer, and Nb/Si multilayer structures. In each case, films having layer thicknesses of 35 Å were deposited on float glass and Si(100) substrates under ultrahigh vacuum conditions using an electron beam evaporation technique. EDP determined in as-deposited bilayer films shows that the widths of Si-on-Nb and Nb-on-Si interfaces are 20 and 40 Å, respectively. The large difference observed in the widths is attributed to the different growth morphology of 35 Å Nb and 35 Å Si single layer films as revealed by atomic force microscopy investigations. In situ dc resistance measurements carried out on 35 Å single layer Nb films during growth show percolation at a thickness much less than the layer thickness. In case of as-deposited Nb–Si–Nb trilayer film, EDP shows a width of 21 Å at both the interfaces viz. Si-on-Nb and Nb-on-Si whereas in the case of as-deposited Si–Nb–Si trilayer films, the widths of Si-on-Nb and Nb-on-Si interfaces are 21 and 42 Å, respectively. The EDPs obtained from bilayer and trilayer films are used to determine layer-by-layer electron density variation in Nb/Si multilayer structures. The results corresponding to the as-deposited multilayer structure indicate that interdiffusion is larger in the bottom layers of the stack. To study the role of kinetic and thermodynamic factors in the interfacial reactions, the bilayer, trilayer, and multilayer samples were isochronally annealed in vacuum up to a temperature of 300 °C in steps of 50 °C for 1 h. EDP of annealed bilayer and trilayer films show an increase in interfacial width due to interdiffusion of Nb and Si and samples annealed at 250 and 300 °C show Nb-rich and Si-rich intermixed regions. In addition to this, plateau regions having an electron density of 1.8 e/Å3 are observed in the EDP of Nb–Si–Nb and Si–Nb–Si trilayer structures annealed at 300 °C which indicates the formation of a Nb3Si phase. Structural parameters obtained from EDP are extended to interpret the results in as-deposited and annealed multilayer structures. The observed contraction in a bilayer period of an annealed multilayer structure is interpreted in terms of formation of a dense Nb3Si phase confirmed by wide angle x-ray diffraction measurements. Consequently, the multilayer structure is fully destroyed between 250–300 °C.

Characteristics of Nb junctions with additional Al/AlOx

We systematically investigated the characteristics of Nb/Al/AlO x /Al/AlO x /Nb junctions having a structure in which Al/AlO x films are placed in a Nb/Al/AlO x /Nb trilayer junction. The junction characteristics reflect superconductivity in the second Al film due to the proximi ty effect. As a result, the critical current density J c and the hysteresis on its current–voltage ( I – V ) curve strongly depend on the transparencies of the AlO x barriers. The hystereses of the junctions are smaller than t hose of Nb/Al/AlO x /Nb junctions at the same J c . Intrinsically overdamped junctions are also realized. The intrinsically overdamped junctions can considerably reduce an area occupied by a single gate. Furthermore, the spread of critical current I c for the junctions, which have hystereses, connected in series, is ±1.2%. This shows that the junctions with additional Al/AlO x have uniform enough characteristics to be used in integrated circuits.

Superconducting chip receivers for imaging application

Experimental details of a unique superconducting imaging array receiver are discussed. Each pixel contains an internally pumped receiver chip mounted on the back of the elliptical microwave lens. Each chip comprises a quasi-optical SIS mixer integrated with a superconducting flux-flow oscillator (FFO) both fabricated from the same Nb/AlO/sub x//Nb trilayer on a silicon substrate. Properties of the integrated lens antenna were studied using an externally pumped reference SIS mixer which showed antenna sidelobes below /spl sim/17 dB and a receiver double side band noise temperature, T/sub RX/(DSB), below 100 K within the frequency range 460-500 GHz that is close to the quantum noise. For the imaging array T/sub RX/(DSB)=150 K has been measured at 500 GHz using the internal flux-flow oscillator as a local oscillator (LO). A balanced SIS mixer was tested showing T/sub RX/(DSB)<100 K within the range of 480-510 GHz using the internal LO. A computer system was developed to control simultaneously the dc bias of the SIS mixer and the frequency and power provided by FFO. The system also performs automatic optimization of the receiver noise temperature.

Evaluation of critical current density of Nb/Al/AlO/sub x//Nb Josephson junctions using test structures at 300 K

We have designed and fabricated test structures that allow the determination of the critical current density and processing run-out of low T/sub c/ Josephson junctions based only on room-temperature measurements. We demonstrated that the 300 K tunneling conductance of a junction barrier is proportional to the critical current at 4.2 K. This testing technique greatly reduced the time required to characterize a process wafer. In one demonstration we tested hundreds of devices across a 150-mm-diameter wafer in less than an hour. In another we used a selective niobium anodization process with only two mask levels to determine the critical current density of a Nb/AlO/sub x//Nb trilayer within a day of its deposition. We have also used automated probing stations to decrease testing delays further and thus to improve process cycle time.

A superconductive flash digitizer with on-chip memory

Recording transient physical phenomena such as short electromagnetic pulses requires a very wide-band digitizer. We have successfully designed, fabricated, and tested a superconductive flash digitizer circuit using Nb trilayer technology. The digitizer consists of a 6-bit flash analog-to-digital converter (ADC), a set of on-chip switches to start and stop data acquisition, and a bank of acquisition shift-registers for on-chip memory. A 5-MHz clock reads the data out to room-temperature electronics for analysis. We have used this digitizer to acquire multi-GHz sine waves. We have also recorded the details of short single pulses containing both a short rise time (/spl sim/100 ps) and structure with greater than a 10 GHz instantaneous bandwidth.

Rapid single flux quantum T-flip flop operating up to 770 GHz

Rapid Single Flux Quantum (RSFQ) T-flip flops (TFFs) operating up to 770 GHz have been demonstrated at 4.2 K. The devices, consisting of either resistively shunted or unshunted Josephson junctions, are fabricated using a planarized Nb/AlO/sub x//Nb trilayer process. Electron beam lithography is used to pattern all levels with a minimum junction area less than 0.1 /spl mu/m/sup 2/. Critical current densities of 0.5 mA//spl mu/m/sup 2/ and 2.5 mA//spl mu/m/sup 2/ are used for the shunted (tested at 1.8 K) and unshunted devices (tested at 4.2 K) respectively. The input and output frequencies of the TFFs are obtained from the input and output voltages by the Josephson relation. The output voltage is exactly half of the input voltage when the divide-by-two operation is correct.

Improved 1 V and 10 V Josephson voltage standard arrays

1 V and 10 V Josephson voltage standard arrays are fabricated on the basis of an improved design, using a modified technology. The Nb/Al/sub 2/O/sub 3//Nb trilayer is deposited directly on the Si wafer. The edges of the base electrodes are insulated by an anodization process. The maximum step voltage increases linearly with the external microwave voltage. Switching between different voltage levels is possible by simple switching of the dc voltage bias. A laboratory-made, oversized circular waveguide reduces the attenuation of the experimental set-up.

An integrated 500 GHz receiver with superconducting local oscillator

An integrated quasioptical receiver consisting of a planar double-dipole antenna, SIS mixer and superconducting Flux-Flow Oscillator (FFO) with matching circuits has been designed, fabricated and tested in the frequency range 420-530 GHz. The integrated receiver is very suitable for space applications because of its low size, mass and power consumption. All components of the receiver are integrated on a 4 mm/spl times/4 mm/spl times/0.2 mm crystalline quartz substrate using a single Nb-AlO/sub x/-Nb trilayer. The successful operation of the integrated receiver comprising a number of new crucial elements has been demonstrated. A DSB noise temperature as low as 140 K at 500 GHz and a tuning range of more than 100 GHz have been obtained. A comparison of the FFO with conventional external LO has been performed.

Contention solver for a superconducting packet switch

The paper describes the architecture of a contention solver (CS) to be used in a superconducting packet switch prototype, and the design and tests of 2/spl times/2 switching elements which compose the CS. The contention solver is based on a Batcher sorter, in which switching elements check for contention between input packets. A priority port is used to guarantee correct operation of the sorter even if a packet is invalidated during the sorting process. A 2/spl times/2 CS switching element with 2-bit data-width was designed in dual-rail logic. It was fabricated using three-junction SQUID gates by a standard Nb tri-layer process, and consists of 102 OR-equivalent gates in an area of 1.2 mm x 1.8 mm. Its correct operation was confirmed completely.

35 ħ two-stage SQUID system for gravity wave detection

We have designed, built and tested a two-stage SQUID measuring system which is primarily intended for use in a 50 mK omnidirectional gravity wave detection system. We fabricated three Nb-Al/AlO/sub x/-Nb trilayer SQUIDs on a single chip: there is one sensor SQUID and two readout SQUIDs which amplify the output of the sensor SQUID. At a temperature of 90 mK, we measured an intrinsic energy sensitivity of the sensor SQUID of /spl epsi//sub v/=S/sub /spl Phi///(2L)=35/spl planck/ at 1 kHz, of which 24/spl planck/ is white noise and 11/spl planck/ is 1/f noise.

A 4 X 4 superconducting Batcher-Banyan switch

The paper describes a Batcher sorter and a Banyan network which together form a nonblocking and self-routing switch. The Batcher sorter sorts input packets in the order of their address values. This sorting operation guarantees no blocking in the succeeding Banyan network and presents an efficient way to check contention. The Banyan network distributes contention-free packets to their final destinations. The Batcher and Banyan switches were designed by using a three-junction SQUID gate family driven by three-phase powering clocks. The Batcher sorter is composed of 2/spl times/2 Batcher switching elements. Each Batcher switching element sorts two input packets in the order of their address values. A 4/spl times/4 Batcher sorter with 2-b data width, which is composed of six 2/spl times/2 Batcher switching elements, was fabricated by an Nb tri-layer process. Its correct operation was confirmed. The Banyan network consists of 2/spl times/2 Banyan switching elements. A 2/spl times/2 Banyan switching element with 2-b data width was also fabricated. The correct operation was confirmed up to 4 GHz by using a test pattern generator integrated on-chip.