Native Compiler Research Articles

Exploring compiler optimization space for control flow obfuscation

Code obfuscation is a promising technique for securing software and protecting it from adversaries. The objective is to harden the exploitation of security vulnerabilities for the attacker as well as launching of successful attacks. Obfuscation can be classified into layout, data, and control flow obfuscation. Control flow obfuscation impedes the understanding of the application logic by making it complicated to determine the actual control flows. Although numerous control flow methods exist in the literature, the role of existing compiler optimizations has just been discovered. This paper is the first one that explores the existing optimization space of LLVM compiler for obfuscating code. Our techniques optimally explore the native compiler's optimizations to improve the original code performance and reduce memory space with no disruptive efforts, tools, or extra costs. In the CBench benchmark suite, our work is able to improve 246%, 143%, and 468% in cyclomatic complexity, program length, and implementation effort, respectively, compared to unobfuscated code. Therefore, instead of inventing new obfuscation tools, the existing compiler optimizations can easily be used to obfuscate control flows, saving the overall cost and efforts.

SpinQ: Compilation Strategies for Scalable Spin-Qubit Architectures

Despite Noisy Intermediate-Scale Quantum devices being severely constrained, hardware- and algorithm-aware quantum circuit mapping techniques have been developed to enable successful algorithm executions. Not so much attention has been paid to mapping and compilation implementations for spin-qubit quantum processors due to the scarce availability of experimental devices and their small sizes. However, based on their high scalability potential and their rapid progress it is timely to start exploring solutions on such devices. In this work, we discuss the unique mapping challenges of a scalable crossbar architecture with shared control and introduce SpinQ , the first native compilation framework for scalable spin-qubit architectures. At the core of SpinQ is the Integrated Strategy that addresses the unique operational constraints of the crossbar while considering compilation scalability and obtaining a O(n) computational complexity. To evaluate the performance of SpinQ on this novel architecture, we compiled a broad set of well-defined quantum circuits and performed an in-depth analysis based on multiple metrics such as gate overhead, depth overhead, and estimated success probability, which in turn allowed us to create unique mapping and architectural insights. Finally, we propose novel mapping techniques that could increase algorithm success rates on this architecture and potentially inspire further research on quantum circuit mapping for other scalable spin-qubit architectures.

Simple, fast, and safe manual memory management

Safe programming languages are readily available, but many applications continue to be written in unsafe languages because of efficiency. As a consequence, many applications continue to have exploitable memory safety bugs. Since garbage collection is a major source of inefficiency in the implementation of safe languages, replacing it with safe manual memory management would be an important step towards solving this problem. Previous approaches to safe manual memory management use programming models based on regions, unique pointers, borrowing of references, and ownership types. We propose a much simpler programming model that does not require any of these concepts. Starting from the design of an imperative type safe language (like Java or C#), we just add a delete operator to free memory explicitly and an exception which is thrown if the program dereferences a pointer to freed memory. We propose an efficient implementation of this programming model that guarantees type safety. Experimental results from our implementation based on the C# native compiler show that this design achieves up to 3x reduction in peak working set and run time.

Codification of Islamic Republic of Iran's Emergency Medical Services (EMS) Native Reaction Protocol to Suspected Ebola Patients based on World Protocols

Introduction: Biological threats are one of the greatest dangers that threaten national security of different countries. Ebola haemorrhagic fever is one of these threats and there is no guideline that helps us to deal with suspected cases in Emergency Medical Services (EMS) in Iran. Objective: This study has been conducted to develop native guidelines reaction, based on world protocols, in Emergency Medical Services of the Islamic Republic of Iran in facing Ebola. Method: This study is considered literature review and was conducted by library studies. At first we started by identifying the domestic and international organizations and centres then visiting the sites and information resources available, we searched for proper keywords then we collected and localized all guidelines and instructions about dealing with Ebola. In the end a comprehensive chart was provided to determine the way of facing and transporting patients suspected with Ebola by care and pre-hospital emergency personnel. Discussion: Based on general facts, overview guidelines should be useful to establish native compilation that includes planning and preparation, screening (telephone triage) patients, special assessment and transmit team via telephone calls, making necessary coordination with other organizations and units within and outside the organization, preparation for patient transport, preparation and carrying out some activities after transporting and the process of evaluation after transferring patients. Conclusion: To succeed in facing similar diseases, considering the need to write native guidelines for each country according to the generalities mentioned, all organizations and institutions involved, should start working in concert with each other and the instructions and practice manoeuvres should be performed again and again to review and fix bugs.

Runtime Vectorization Transformations of Binary Code

In many cases, applications are not optimized for the hardware on which they run. Several reasons contribute to this unsatisfying situation, such as legacy code, commercial code distributed in binary form, or deployment on compute farms. In fact, backward compatibility of ISA guarantees only the functionality, not the best exploitation of the hardware. In this work, we focus on maximizing the CPU efficiency for the SIMD extensions. The first contribution was originally published in the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS XV, July 2015, Agios Konstantinos, Greece. It is a binary-to-binary optimization framework where loops vectorized for an older version of the processor SIMD extension are automatically converted to a newer one. It is a lightweight mechanism that does not include a vectorizer, but instead leverages what a static vectorizer previously did. We show that many loops compiled for x86 SSE can be dynamically converted to the more recent and more powerful AVX; as well as, how correctness is maintained with regards to challenges such as data dependencies and reductions. We obtain speedups in line with those of a native compiler targeting AVX. The second contribution is the runtime vectorization of loops in binary codes that were not originally vectorized. For this purpose, we use open source frameworks that we have tuned and integrated to (1) dynamically lift the x86 binary into the Intermediate Representation form of the LLVM compiler, (2) abstract hot loops in the polyhedral model, (3) use the power of this mathematical framework to vectorize them, and (4) finally compile them back into executable form using the LLVM Just-In-Time compiler. In most cases, the obtained speedups are close to the number of elements that can be simultaneously processed by the SIMD unit. The re-vectorizer and auto-vectorizer are implemented inside a dynamic optimization platform; it is completely transparent to the user, does not require any rewriting of the binaries, and operates during program execution.

RNGAVXLIB: Program library for random number generation, AVX realization

Abstract The library RNGSSELIB for random number generators (RNGs) based upon the SSE2 command set is presented. The library contains realization of a number of modern and most reliable generators. Usage of SSE2 command set allows to substantially improve performance of the generators. Three new RNG realizations are also constructed. We present detailed analysis of the speed depending on compiler usage and associated optimization level, as well as results of extensive statistical testing for all generators using available test packages. Fast SSE implementations produce exactly the same output sequence as the original algorithms. Program summary Program title: RNGSSELIB Catalogue identifier: AEIT_v1_0 Program summary URL: http://cpc.cs.qub.ac.uk/summaries/AEIT_v1_0.html Program obtainable from: CPC Program Library, Queenʼs University, Belfast, N. Ireland Licensing provisions: Standard CPC licence, http://cpc.cs.qub.ac.uk/licence/licence.html No. of lines in distributed program, including test data, etc.: 4177 No. of bytes in distributed program, including test data, etc.: 21 228 Distribution format: tar.gz Programming language: C. Computer: PC. Operating system: UNIX, Windows. RAM: 1 Mbytes Classification: 4.13. Nature of problem: Any calculation requiring uniform pseudorandom number generator, in particular, Monte Carlo calculations. Solution method: The library contains realization of a number of modern and reliable generators: mt19937 , mrg32k3a and lfsr113 . Also new realizations for the method based on parallel evolution of an ensemble of dynamical systems are constructed: GM19 , GM31 and GM61 . The library contains both usual realizations and realizations based on SSE command set. Usage of SSE commands allows the performance of all generators to be substantially improved. Restrictions: For SSE realizations of the generators, Intel or AMD CPU supporting SSE2 command set is required. In order to use the realization lfsr113sse , CPU must support SSE4 command set. Running time: Running time is of the order of 20 sec for generating 109 pseudorandom numbers with a PC based on Intel Core i7-940 CPU. Running time is analysed in detail in Section 5 of the paper.

The PEPPHER composition tool: performance-aware composition for GPU-based systems

The PEPPHER (EU FP7 project) component model defines the notion of component, interface and meta-data for homogeneous and heterogeneous parallel systems. In this paper, we describe and evaluate the PEPPHER composition tool, which explores the application's components and their implementation variants, generates the necessary low-level code that interacts with the runtime system, and coordinates the native compilation and linking of the various code units to compose the overall application code to optimize performance. We discuss the concept of smart containers and its benefits for reducing dispatch overhead, exploiting implicit parallelism across component invocations and runtime optimization of data transfers. In an experimental evaluation with several applications, we demonstrate that the composition tool provides a high-level programming front-end while effectively utilizing the task-based PEPPHER runtime system (StarPU) underneath for different usage scenarios on GPU-based systems.

An interpreter for server-side hop

HOP is a Scheme-based multi-tier programming language for the Web. The client-side of a program is compiled to JavaScript, while the server-side is executed by a mix of natively compiled code and interpreted code. At the time where HOP programs were basic scripts, the performance of the server-side interpreter was not a concern; an inefficient interpreter was acceptable. As HOP expanded, HOP programs got larger and more complex. A more efficient interpreter was necessary. This new interpreter is described in this paper. It is compact, its whole implementation counting no more than 2.5 KLOC. It is more than twice faster than the old interpreter and consumes less than a third of its memory. Although it cannot compete with static or JIT native compilers, our experimental results show that it is amongst the fastest interpreters for dynamic languages.

Tsunami: massively parallel homomorphic hashing on many‐core GPUs

SUMMARYHomomorphic hash functions play a key role in securing distributed systems that use coding techniques such as erasure coding and network coding. The computational complexity of homomorphic hash functions remains a main challenge. In this paper, we present a massively parallel solution, named Tsunami, by exploiting the widely available many‐core graphic processing units (GPUs). Tsunami includes the following optimization techniques to achieve the highest ever hashing throughput: (1) using Montgomery multiplication and precomputation to speed up modular exponentiations; (2) using a clean implementation of Montgomery multiplication in order to decrease the demand of registers and shared memory and increase the utilization ratio of GPU processing cores; (3) using our own assembly code to implement the 32‐bit integer multiplication, which outperforms the assembly codes generated by the native compiler by 20%; and (4) exploiting memory alignment and constant memory on GPUs to improve the efficiency of memory access. Integrating the above techniques, our Tsunami achieves a significant improvement over existing results. Specifically, the hashing throughput achieved by Tsunami on a GTX295 GPU (NVIDIA, Santa Clara, CA, US) is about 33 times that of the existing solution on a quad‐core CPU. We also show that the hashing throughput grows almost linearly with the number of GPU cores. Copyright © 2011 John Wiley & Sons, Ltd.

Returning Control to the Programmer

Server and workstation hardware architecture is continually improving, yet interpreted languages have failed to keep pace with the proper utilization of modern processors. SIMD (single instruction, multiple data) units are available in nearly every current desktop and server processor and are greatly underutilized, especially with interpreted languages. If multicore processors continue their current growth pattern, interpreted-language performance will begin to fall behind, since current native compilers and languages offer better automated SIMD optimization and direct SIMD mapping support. As each core in commercial x86 multicore processors includes a dedicated SIMD unit, the performance disparity will grow exponentially as long as the available SIMD units remain underutilized in interpreted-language environments.

Parallelisation technique for serial 3D seismic codes: SMS approach

<p style="margin: 0.0px 0.0px 0.0px 0.0px; font: 9.0px Times;">We investigate a fast and easy way to parallelise seismological serial codes mainly oriented for simulating the</p> <p style="margin: 0.0px 0.0px 0.0px 0.0px; font: 9.0px Times;">seismic wave propagation through anelastic dissipative media. Having an efficient modelling tool is important</p> <p style="margin: 0.0px 0.0px 0.0px 0.0px; font: 9.0px Times;">in both assessing strong ground motion and mitigation of seismic hazard when the site effects are considered,</p> <p style="margin: 0.0px 0.0px 0.0px 0.0px; font: 9.0px Times;">and in crustal propagation when the crustal geological structures are of interest. Our chosen case study is representative of a set of such seismological 3D problems. The Scalable Modelling System (SMS) tool for parallelization is considered. The IBM SP5 native compiler has been used. Results such as Speed-Up and Efficiency are shown and discussed. SMS can run both in shared and distributed memory environments. The greater advantages of using SMS in such environments become apparent with the utilisation of a higher number of multiprocessor machines arranged in a cluster. We also demonstrate how successful porting from serial to parallel codes is realised by way of minimal instructions (6% of the serial original code only) provided that an ad hoc profiling analysis of the serial code is first performed.</p> <br />

ProteoWizard: open source software for rapid proteomics tools development

Summary: The ProteoWizard software project provides a modular and extensible set of open-source, cross-platform tools and libraries. The tools perform proteomics data analyses; the libraries enable rapid tool creation by providing a robust, pluggable development framework that simplifies and unifies data file access, and performs standard proteomics and LCMS dataset computations. The library contains readers and writers of the mzML data format, which has been written using modern C++ techniques and design principles and supports a variety of platforms with native compilers. The software has been specifically released under the Apache v2 license to ensure it can be used in both academic and commercial projects. In addition to the library, we also introduce a rapidly growing set of companion tools whose implementation helps to illustrate the simplicity of developing applications on top of the ProteoWizard library.Availability: Cross-platform software that compiles using native compilers (i.e. GCC on Linux, MSVC on Windows and XCode on OSX) is available for download free of charge, at http://proteowizard.sourceforge.net. This website also provides code examples, and documentation. It is our hope the ProteoWizard project will become a standard platform for proteomics development; consequently, code use, contribution and further development are strongly encouraged.Contact: darren@proteowizard.org; parag@ucla.eduSupplementary information: Supplementary data are available at Bioinformatics online.

A Portable Implementation for Objective Caml Flight

Caml-Flight is a data-parallel extension for Caml Light. It is an intermediate, portable and mostly deterministic functional language for distributed memory multiprocessors (DMM). Its current implementation modifies the Caml Light compiler to introduce new instructions for the language and its virtual machine, and to define a kind of persistence to communicate values. Caml Light has now evolved to become Objective Caml, including an object extension and a native compiler. To benefit from this new distribution, we propose a new implementation called Objective Caml Flight. To do so we use new libraries and tools included in Objective Caml such as multi-threading, persistence and parsers, i.e. without modification to the original compiler needed with the Caml-Flight approach. This paper presents an easier way to implement parallel extensions for Objective Caml and an actual realization called Objective Caml Flight. This new implementation is compared to Caml-Flight.

Numerical modelling of dynamical interaction between seismic radiation and near-surface geological structures: a parallel approach

We investigate a faster and easier way to parallelise seismological codes able to simulate the dynamical interaction between seismic radiation and near-surface geological structures. This is important in assessing strong ground motion, in the mitigation of seismic hazard and for studies concerning site effects. Our chosen case study is representative of a set of seismological problems dealing with the interaction of anti-plane seismic wave propagation in a heterogeneous viscoelastic 2D media. High Performance Fortran and OpenMP tools of parallelisation are considered. Third party and IBM SP3 native compiler performances are also analysed. Results such as Speed-Up and Efficiency are shown and discussed. We have found that the most simple and efficient method to parallelise a given code belonging to the set of serial codes represented by our case study depends mainly on computational size: if the RAM of a single multiprocessor machine is sufficient for the program memory requirements, OpenMP should be preferred. If more RAM is needed, the greater advantages in using HPF become apparent with the utilisation of a higher number of multiprocessor machines in a cluster. We also demonstrate how successful porting from serial to parallel codes is realised by way of minimal instructions, provided that an ad hoc profiling analysis of the serial code is first performed.

Register tiling in nonrectangular iteration spaces

Loop tiling is a well-known loop transformation generally used to expose coarse-grain parallelism and to exploit data reuse at the cache level. Tiling can also be used to exploit data reuse at the register level and to improve a program's ILP. However, previous proposals in the literature (as well as commercial compilers) are only able to perform multidimensional tiling for the register level when the iteration space is rectangular. In this article we present a new general algorithm to perform multidimensional tiling for the register level in both rectangular and nonrectangular iteration spaces. We also propose a simple heuristic to determine the tiling parameters at this level. Finally, we evaluate our method using as benchmarks typical linear algebra algorithms having nonrectangular iteration spaces and compare our proposal against hand-optimized vendor-supplied numerical libraries and against commercial compilers able to perform optimizing code transformations such as inner unrolling, unroll-and-jam, and software pipelining. Measurements were taken on three different superscalar microprocessors. Results will show that our method outperforms the native compilers (showing speedups of 2.5 in average) and matches the performance of vendor-supplied numerical libraries. The general conclusion is that compiler technology can make it possible for nonrectangular loop nests to achieve as high performance as hand-optimized codes.

Proxy compilation of dynamically loaded Java classes with MoJo

Interest in Java implementations for resource-constrained environments such as embedded systems has been tempered by concerns regarding its efficiency. Current native compilers for Java offer dramatic increases in efficiency, but have poor support for dynamically-loaded classes, which are typically served by slow interpreters or JIT compilers, the code-size of this latter utterly mismatching the resource constraints of the system.After a brief survey of Ahead-of-Time compilers for Java, we present MoJo --- a new native compiler and the testbed for our proxy compilation scheme, which allows embedded clients to connect to servers and delegate compilation of Java class packages to native code libraries.We also present initial results from experimental testing using MoJo in a resource-constrained, mobile computing environment. We show that MoJo is faster than all surveyed Java implementations for the test platform executing our initial test application. Our proxy compilation scheme results in a 94% speed increase over the fastest tested interpreter system and a 20% speed increase over the fastest tested JIT system.The MoJo-generated binaries for the application are also shown to be 45 times smaller than those required by its nearest iPAQ JRE competitor and 275 times smaller than the Sun JRE v1.3.1 for iPAQ as a direct result of our incremental, on-demand transfer of API classes to the client.

Efficient Java RMI for parallel programming

Java offers interesting opportunities for parallel computing. In particular, Java Remote Method Invocation (RMI) provides a flexible kind of remote procedure call (RPC) that supports polymorphism. Sun's RMI implementation achieves this kind of flexibility at the cost of a major runtime overhead. The goal of this article is to show that RMI can be implemented efficiently, while still supporting polymorphism and allowing interoperability with Java Virtual Machines (JVMs). We study a new approach for implementing RMI, using a compiler-based Java system called Manta. Manta uses a native (static) compiler instead of a just-in-time compiler. To implement RMI efficiently, Manta exploits compile-time type information for generating specialized serializers. Also, it uses an efficient RMI protocol and fast low-level communication protocols.A difficult problem with this approach is how to support polymorphism and interoperability. One of the consequences of polymorphism is that an RMI implementation must be able to download remote classes into an application during runtime. Manta solves this problem by using a dynamic bytecode compiler, which is capable of compiling and linking bytecode into a running application. To allow interoperability with JVMs, Manta also implements the Sun RMI protocol (i.e., the standard RMI protocol), in addition to its own protocol.We evaluate the performance of Manta using benchmarks and applications that run on a 32-node Myrinet cluster. The time for a null-RMI (without parameters or a return value) of Manta is 35 times lower than for the Sun JDK 1.2, and only slightly higher than for a C-based RPC protocol. This high performance is accomplished by pushing almost all of the runtime overhead of RMI to compile time. We study the performance differences between the Manta and the Sun RMI protocols in detail. The poor performance of the Sun RMI protocol is in part due to an inefficient implementation of the protocol. To allow a fair comparison, we compiled the applications and the Sun RMI protocol with the native Manta compiler. The results show that Manta's null-RMI latency is still eight times lower than for the compiled Sun RMI protocol and that Manta's efficient RMI protocol results in 1.8 to 3.4 times higher speedups for four out of six applications.

Towards Language-Agnostic Mobile Code

The Java Virtual Machine is primarily designed for transporting Java programs. As a consequence, when JVM bytecodes are used to transport programs in other languages, the result becomes less acceptable the more the source language diverges from Java. Microsoft's .NET transport format fares better in this respect because it has a more flexible type system and instruction set, but it is not extensible, and (for example) has no provision for supporting explicit programmer-specified parallelism. Both platforms have difficulty making transported programs run efficiently.This paper discusses first steps towards mobile code representations that are independent (in the sense that the representation can be appropriately parameterized) of the source language (e.g., Java), intermediate representation (e.g., bytecode), and target architecture (e.g., x86). We call this kind of parameterizable framework language-agnostic.We present two techniques which provide parts of the envisioned language-agnostic functionality. Compressed abstract syntax trees as a wire format provide for a very dense encoding of programs at a high level of abstraction. We show how to parameterize the compression algorithm in a modular fashion with knowledge beyond the purely syntactical level. This leads to the notion of well-formedness by construction. The second technique defines the semantics of programs by mapping from abstract syntax trees to a typed core calculus representation. Based on this representation it becomes possible to use portable definitions of security policies and to execute programs written in different source languages, even if a more efficient trusted native compiler is not available on the target platform.

An efficient implementation of Java's remote method invocation

Java offers interesting opportunities for parallel computing. In particular, Java Remote Method Invocation provides an unusually flexible kind of Remote Procedure Call. Unlike RPC, RMI supports polymorphism, which requires the system to be able to download remote classes into a running application. Sun's RMI implementation achieves this kind of flexibility by passing around object type information and processing it at run time, which causes a major run time overhead. Using Sun's JDK 1.1.4 on a Pentium Pro/Myri.net cluster, for example, the latency for a null RMI (without parameters or a return value) is 1228 μsec, which is about a factor of 40 higher than that of a user-level RPC. In this paper, we study an alternative approach for implementing RMI, based on native compilation. This approach allows for better optimization, eliminates the need for processing of type information at run time, and makes a light weight communication protocol possible. We have built a Java system based on a native compiler, which supports both compile time and run time generation of marshallers. We find that almost all of the run time overhead of RMI can be pushed to compile time. With this approach, the latency of a null RMI is reduced to 34 μsec, while still supporting polymorphic RMIs (and allowing interoperability with other JVMs).

Parallelization of NAS benchmarks for shared memory multiprocessors

This paper presents our experiences of parallelizing the sequential implementation of NAS benchmarks using compiler directives on SGI Origin2000 distributed shared memory (DSM) system. Porting existing applications to new high performance parallel and distributed computing platforms is a challenging task. Ideally, a user develops a sequential version of the application, leaving the task of porting the code to parallelization tools and compilers. Due to the simplicity of programming shared-memory multiprocessors, compiler developers have provided various facilities to allow the users to exploit parallelism. Native compilers on SGI Origin2000 support multiprocessing directives to allow users to exploit loop-level parallelism in their programs. Additionally, supporting tools can accomplish this process automatically. We experimented with these compiler directives and supporting tools by parallelizing sequential implementation of NAS benchmarks. Results reported in this paper indicate that with minimal effort, the performance gain is comparable with the hand-parallelized, carefully optimized, message-passing implementations of the same benchmarks.