Nanowire Field-effect Transistors Research Articles

High‐Performance Flexible Silicon Nanowire Field Effect Transistors on Plastic Substrates

AbstractInorganic semiconductor nanowires, known for their exceptional electronic properties and mechanical flexibility, are widely regarded as the ideal 1D channel materials for creating high‐performance flexible electronics. In this work, the integration of ordered arrays of silicon nanowire (SiNW) field effect transistors (FETs) directly onto flexible plastic substrates is showcased. The self‐aligned crystalline SiNW multi‐channels are first grown through an in‐plane solid–liquid–solid mechanism on rigid substrates, and then efficiently transferred in‐batch onto flexible polyethylene terephthalate (PET) plastics. The FETs constructed on these transferred SiNW channels exhibit outstanding performance, with a high on/off current ratio of >105, a low subthreshold swing of 175 mV dec−1, and remarkable mechanical stability that can endure an extremely small bending radius of 0.5 mm for 1000 cycles. Furthermore, inverter logics are also successfully demonstrated on plastic substrates, highlighting a prominent routine for scalable integration of high‐quality SiNW channels in the development of low‐cost, high‐performance flexible displays and wearable electronics.

Signature of electrothermal transport in 18 nm vertical junctionless gate-all-around nanowire field effect transistors

Abstract Addressing temperature hot-spots resulting from self-heating effects (SHE) poses a significant challenge in the design of emerging nanoscale transistors, such as vertical junctionless nanowire field-effect transistors (VNWFETs), due to reduced thermal conductivity. Consequently, electrothermal modeling becomes crucial for a comprehensive understanding of the underlying physical mechanisms governing carrier degradation and thermal conduction in these nanoscale devices. In this study, we present an enhanced drift-diffusion model coupled with nonlocal Guyer-Krumhansl (GK) equations to accurately capture carrier-phonon interactions and explore the electrothermal characteristics of gate-all-around (GAA) VNWFETs. Pulsed current-voltage (I–V) measurements are employed to investigate the performance of a state-of-the-art 18nm VNWFET technology. Furthermore, we report on the influences of both trapping and SHE under high-bias conditions for varying pulse widths. Our findings reveal that optimization of mobility degradation mechanisms allows for improved control over the physical behavior of carrier transport in these emerging technologies. Through careful consideration of these factors, it becomes possible to enhance the overall performance of GAA VNWFETs, particularly in mitigating temperature hot-spots and addressing challenges associated with self-heating effects.

Analysis of coupling effect between TID and SET in SOI Tri-Gate nanowire field-effect transistors

This study investigates the response of nanowire field-effect transistors (NWFETs) to total ionizing dose (TID), single-event transient (SET), and their coupling effects in junctionless (JL), inversion (IM), and junctionless accumulation (AC) modes. The degradation of the three modes under irradiation and the effect of device bias configuration on the electrical properties of NWFETs are analyzed, and the different effects of SET on the three modes are compared. On this basis, the influence of TID on SET current generation and the charge collection mechanism are studied, and the changes in peak current, pulse width, and collected charge of transient current under different TIDs are compared. The results show that JL mode has the worst resistance to TID and SET coupling effects, followed by IM and AC modes.

Numerical simulation of core shell dual metal gate stack junctionless accumulation mode nanowire FET (CS-DM-GS-JAMNWFET) for low power digital applications

In this paper, Core Shell Dual Metal Gate Stack Junctionless Accumulation Mode Nanowire FET (CS-DM-GS-JAMNWFET) is proposed, which has enhanced performance and is suitable for analog and digital applications. A high-k gate stack engineering, Hafnium Oxide (HfO2) is deployed in the outer as well as inner gate oxides of the core shell structure. The proposed device is compared with CS-DM-JAMNWFET, CS-SM-JAMNWFET, DM-GS-JAMNWFET, DM-JAMNWFET, and SM-JAMNWFET by maintaining a constant threshold voltage for all structures. The proposed CS-DM-GS-JAMNWFET provides a substantial reduction in subthreshold current with a high Ion/Ioff ratio as compared to other competent device structures. Also, the proposed device exhibits improvements in various parameters compared to the SM-JAMNWFET. It shows improvement in drain current (2.27 times), output conductance (2.14 times), subthreshold swing (0.94 times), transconductance (2.47 times), gate capacitance (2.00 times), cut-off frequency (1.24 times), intrinsic gain (12.95 times), current gain (1.46), Ion/Ioff ratio (6.15 times), unilateral power gain (1.09 times), maximum transducer power gain (1.08 times), Transconductance Generation factor (1.08 times), gain frequency product (14.61 times), transconductance frequency product (1.32 times), and gain transconductance frequency product (17.27 times). These benefits are due to combined advantages of the dual metal high-k dielectric HfO2 structure in core shell JAM FET, which enhances the device's gate dominance over the channel with high driving current.

A machine learning approach to accelerate reliability prediction in nanowire FETs from self-heating perspective

Nanowire Field Effect Transistors (NWFETs) have been considered as the next-generation technology for sub-10 nm technology nodes, succeeding FinFETs. However, the highly confined nature of Nanowire FETs creates reliability issues that significantly impact their performance. Therefore, this work proposes a machine learning-based technique for analyzing the self-heating-induced reliability issues in NWFETs. The influence of self-heating effects in NWFET has been predicted in terms of saturation current (Idsat), threshold voltage (Vth), the maximum carrier temperature along the channel (eTmax), and the maximum Lattice temperature (LTmax) with multivariable regression. TCAD-assisted machine learning has been used for algorithm training and prediction. A dataset has been created by varying the parameters of the NWFETs like the thickness of the channel (tsi), the thickness of oxide (tox), Length of source/drain (Lsd), length of source/drain contact (Lsdc), doping concentrations etc. The Random Forest Regression algorithm has been used to estimate the performance of NWFETs in predicting the desired output parameters suitably with the given dataset.

A Calibration Strategy for Silicon Nanowire Field-Effect Transistor Biosensors and Its Application in Ultra-Sensitive, Label-Free Biosensing.

The silicon nanowire field-effect transistor (SiNW FET) has been developed for over two decades as an ultrasensitive, label-free biosensor for biodetection. However, inconsistencies in manufacturing and surface functionalization at the nanoscale have led to poor sensor-to-sensor consistency in performance. Despite extensive efforts to address this issue through process improvements and calibration methods, the outcomes have not been satisfactory. Herein, based on the strong correlation between the saturation response of SiNW FET biosensors and both their feature size and surface functionalization, we propose a calibration strategy that combines the sensing principles of SiNW FET with the Langmuir-Freundlich model. By normalizing the response of the SiNW FET biosensors (ΔI/I0) with their saturation response (ΔI/I0)max, this strategy fundamentally overcomes the issues mentioned above. It has enabled label-free detection of nucleic acids, proteins, and exosomes within 5 min, achieving detection limits as low as attomoles and demonstrating a significant reduction in the coefficient of variation. Notably, the nucleic acid test results exhibit a strong correlation with the ultraviolet-visible (UV-vis) spectrophotometer measurements, with a correlation coefficient reaching 0.933. The proposed saturation response calibration strategy exhibits good universality and practicability in biological detection applications, providing theoretical and experimental support for the transition of mass-manufactured nanosensors from theoretical research to practical application.

Persistent polarization effects and memory properties in ionic-liquid gated InAs nanowire transistors

Iontronics exploits mobile ions within electrolytes to control the electronic properties of materials and devices' electrical and optical response. In this frame, ionic liquids are widely exploited for the gating of semiconducting nanostructure devices, offering superior performance compared to conventional dielectric gating. In this work, we engineer ionic liquid gated InAs nanowire-based field effect transistors and adopt the set-and-freeze dual gate device operation to probe the nanowires in several ionic gate regimes. We exploit standard back-gating at 150 K, when the ionic liquid is frozen and any crosstalk between the ionic gate and the back gate is ruled out. We demonstrate that the liquid gate polarization has a persistent effect on the nanowire properties. This effect can be conveniently exploited to fine-tune the properties of the nanowires and enable new device functionalities. Specifically, we correlate the modification of the ionic environment around the nanowire to the transistor threshold voltage and hysteresis, on/off ratio and current level retention times. Based on this, we demonstrate memory operations of the nanowire field effect transistors. Our work shines a new light on the interaction between electrolytes and semiconducting nanostructures, providing useful insights for future applications of nanodevice iontronics.

Investigating the effect of scaling and temperature on the performance of improved junctionless nanowire FET through simulation analysis

An Improved Junctionless Nanowire Field Effect Transistor (I-JL-NWFET) device is proposed in this paper to address the limitations of conventional JL-NWFET. This research paper initially, comprehensively analyzes the impact of channel length (L) and channel thickness (t si ) scaling on the electrical, analog/RF, and linearity performance of I-JL-NWFET and JL-NWFET. The results suggest that the specific design features in I-JL-NWFET contribute to a more robust and less sensitive response to variations in scaling compared to its counterpart, JL-NWFET. Furthermore, an exploration into the impact of temperature on the electrical, analog/RF, and linearity performance is also conducted for both I-JL-NWFET and JL-NWFET. The electrical performance of I-JL-NWFET showcases a significantly reduced temperature sensitivity in parameters like drain current (I D ), Subthreshold Slope (SS) and Drain Induced Barrier Lowering (DIBL) compared to JL-NWFET. Subsequently, analyzing the analog/RF performance in the context of parameters such as transconductance (g m ), Transconductance Gain Factor (TGF), output conductance (g d ), early voltage (V EA ), total gate capacitance (C GG ), and cut-off frequency (f T ) under temperature variation, a lower degree of variability in I-JL-NWFET is observed compared to JL-NWFET. Furthermore, the linearity performance of I-JL-NWFET, assessed through parameters such as second and third-order transconductance (g m2 , g m3 ), second and third-order input voltage intercept points (VIP2, VIP3), and third-order intermodulation distortion (IIP3 and IMD3) is improved at the higher temperature than that of JL-NWFET.

Exosomal membrane proteins analysis using a silicon nanowire field effect transistor biosensor

Exosomes are of great significance in clinical diagnosis, due to their high homology with parental generation, which can reflect the pathophysiological status. However, the quantitative and classification detection of exosomes is still faced with the challenges of low sensitivity and complex operation. In this study, we develop an electrical and label-free method to directly detect exosomes with high sensitivity based on a Silicon nanowire field effect transistor biosensor (Si-NW Bio-FET). First, the impact of Debye length on Si-NW Bio-FET detection was investigated through simulation. The simulation results demonstrated that as the Debye length increased, the electrical response to Si-NW produced by charged particle at a certain distance from the surface of Si-NW was greater. A Si-NW Bio-FET modified with specific antibody CD81 on the nanowire was fabricated then used for detection of cell line-derived exosomes, which achieved a low limit of detection (LOD) of 1078 particles/mL in 0.01 × PBS. Furthermore, the Si-NW Bio-FETs modified with specific antibody CD9, CD81 and CD63 respectively, were employed to distinguish exosomes derived from human promyelocytic leukemia (HL-60) cell line in three different states (control group, lipopolysaccharide (LPS) inflammation group, and LPS + Romidepsin (FK228) drug treatment group), which was consistent with nano-flow cytometry. This study provides a highly sensitive method of directly quantifying exosomes without labeling, indicating its potential as a tool for disease surveillance and medication instruction.

Terahertz Radiation Detectors Using CMOS Compatible SOI Substrates

AbstractIn recent years, silicon‐based room temperature Terahertz (THz) detectors have become the most optimistic research area because of their high speed, low cost, and unimpeded compatibility with mainstream complementary metal‐oxide‐semiconductor (CMOS) device technologies. However, Silicon (Si) suffers from low responsivity and high noise at THz frequencies. In this review, the recent advances in Si‐based THz detectors using silicon‐on‐insulator (SOI) substrates are presented. These offer several advantages over bulk counterparts, such as reduced parasitic capacitance, enhanced electric field confinement, and improved thermal isolation. The different types of THz detectors exploiting SOI substrate, such as conventional metal‐oxide‐semiconductor field effect transistors (MOSFETs), junction‐less MOSFETs, junction‐less nanowires field effect transistors (JLNWFETs), micro‐electromechanical system (MEMS), metal‐semiconductor‐metal (MSM) structures, and single electron transistor (SET), are discussed, and their key performances in terms of responsivity, noise equivalent power (NEP), bandwidth, and dynamic range are compared. The challenges and opportunities for further improvement of SOI THz detectors, such as device scaling, integration, and modulation, are also highlighted. This review may offer compelling evidence supporting the idea that SOI THz detectors have the potential to facilitate high performance, low power consumption, and scalability—qualities essential for advancing next‐level technologies.

Leakage Current and Hot-Carrier Injection in the Junctionless Nanowire FETs Enhanced by Tensile Mechanical Stress

Leakage Current and Hot-Carrier Injection in the Junctionless Nanowire FETs Enhanced by Tensile Mechanical Stress

Performance improvement of planar silicon nanowire field effect transistors via catalyst atom doping control

Catalytic growth of silicon nanowires (SiNWs), mediated by metallic droplet, provide ideal quasi-1D channels to construct high performance field effect transistor (FET). However, the incorporation of catalytic metal atoms into SiNWs channels has significant impact on the FET characteristics, and thus needs to be better understood and controlled to fulfil its potential for high performance electronics. In this work, we focus on the effect of the incorporation of indium (In) catalytic atoms into planar SiNWs, grown via an in-plane solid-liquid-solid (IPSLS) mechanism, on the FET device performance. It is found that the initial high concentration of p-type In dopants in the as-grown SiNWs led to an equivalent boron (B) doping of 5×1018 cm−3. However, a simple step-wise annealing in oxygen at different temperatures, varied from 620 °C to 920 °C, can help to out-diffuse the dissolved In atoms into the surface SiO2 layer, and reduce the In concentrations down to <5×1017 cm−3, as verified by atom-probe tomography (APT) and four-point-probe measurements. This effective dopant control enables a remarkable device performance improvement of the Schottky barrier FETs, built upon an orderly array of parallel SiNWs of approximately 25 nm in diameter, where the current ratio (Ion/Ioff) has been substantially boosted from 105 to 108, while the subthreshold swing (SS) reduced from 400 mV/dec down to ∼100 mV/dec, with a hole carrier mobility increased from 10 to ∼75 cm2 V−1 s−1 as extracted according to a finite element analysis. These results pave the way for the employment of the catalytic IPSLS SiNWs to serve as high quality 1D channels for high-performance SiNWs-based electronics and sensors.

Performance of Si and GaAs GAA Nanowire FET for 8 nm Channel Length Using 3D Full Quantum Transport Simulation

Performance of Si and GaAs GAA Nanowire FET for 8 nm Channel Length Using 3D Full Quantum Transport Simulation

Statistical Reproducibility of Selective Area Grown InAs Nanowire Devices.

New approaches such as selective area growth (SAG), where crystal growth is lithographically controlled, allow the integration of bottom-up grown semiconductor nanomaterials in large-scale classical and quantum nanoelectronics. This calls for assessment and optimization of the reproducibility between individual components. We quantify the structural and electronic statistical reproducibility within large arrays of nominally identical selective area growth InAs nanowires. The distribution of structural parameters is acquired through comprehensive atomic force microscopy studies and transmission electron microscopy. These are compared to the statistical distributions of the cryogenic electrical properties of 256 individual SAG nanowire field effect transistors addressed using cryogenic multiplexer circuits. Correlating measurements between successive thermal cycles allows distinguishing between the contributions of surface impurity scattering and fixed structural properties to device reproducibility. The results confirm the potential of SAG nanomaterials, and the methodologies for quantifying statistical metrics are essential for further optimization of reproducibility.

Analysis of Different Nanostructures of ISFET Biosensors Towards Liposome Detection

Proteins are needed by all living cells for structural and functional purposes. However, some proteins such as liposome instability may result in medication leaks that could harm cells. The detection of liposomes is dependent on the complex interactions between proteins, which are necessary for both their structural integrity and functional characteristics. This emphasizes the critical role that proteins play in the precise identification and examination of liposomal structures. Ion-sensitive field-effect transistor (ISFET) biosensor has gained popularity in the clinical research field for biomolecule detection due to its high detection sensitivity, mass-production capability, and low manufacturing cost. Nanohub BioSensorLab software was used to analyze the performance of different structures of ISFET (planar, cylindrical nanowire, nanosphere and double-gate FET) by simulating the settling time and selectivity of the biosensors. As the structural dimension expands from 1D to 3D, the settling time increases by three folds at the lowest analyte concentration. The fastest settling times were achieved by planar ISFET and double-gate FET. For selectivity measurements, an enhanced selectivity was achieved by increasing the concentration of the target molecule and decreasing the concentration of the parasitic molecule. A higher selectivity is determined by the higher Signal-to-Noise Ratio (SNR) value. The SNR increased linearly corresponds to the increase in the concentration of the target molecule as well as the decrease in the parasitic molecule’s concentration. The parasitic molecule's size increase of 1 nm causes a rise in SNR of 5.00×103.

Correction: Improved analog and AC performance for high frequency linearity based applications using gate-stack dual metal (DM) nanowire (NW) FET (4 H-SiC)

Correction: Improved analog and AC performance for high frequency linearity based applications using gate-stack dual metal (DM) nanowire (NW) FET (4 H-SiC)

A proposal and simulation analysis for a novel architecture of gate-all-around polycrystalline silicon nanowire field effect transistor

A proposal for a novel gate-all-around (GAA) polycrystalline silicon nanowire (poly-SiNW) field effect transistor (FET) is presented and discussed in this paper. The device architecture is based on the realization of poly-SiNW in a V-shaped cavity obtained by tetra methyl ammonium hydroxide (TMAH) etch of monocrystalline silicon (100). The device’s behavior is simulated using Silvaco commercial software, including the density of states (DOS) model described by the double exponential distribution of acceptor trap density within the gap. The electric field, potential, and free electron concentration are analyzed in different nanowire regions to investigate the device's performance. The results show good performance despite the high density of deep states in poly-SiNW. This can be explained by the strong electric field caused by the corner effect in the nanowire, which favors the ionization of the acceptor traps and increases the free electron concentration.

Peculiarities of the SCLC Effect in Gate‐All‐Around Silicon Nanowire Field‐Effect Transistor Biosensors

AbstractHigh‐quality liquid gate‐all‐around (LGAA) silicon nanowire (NW) field‐effect transistor (FET) biosensors are fabricated and studied their properties in 1 mm phosphate‐buffered saline solution with pH = 7.4 using transport and noise spectroscopy. At small VDS, the conventional current behavior of FET with a linear dependence on voltage is registered in the output current‐voltage (I‐VM) characteristics with M = 1. At drain‐source voltage VDS &gt; 0.6 V, the I‐V characteristics with stronger power M are revealed. It is shown that the current in LGAA NW FETs follows current proportional to voltage in power M = 4 dependence on small liquid gate voltages. Transport and noise spectroscopy analyses demonstrate that the obtained results are associated with the space‐charge‐limited current (SCLC) effect. Moreover, a strong two‐level random telegraph signal (RTS) is found in the region corresponding to SCLC at VDS values exceeding 0.6 V. The RTS related to single trap phenomena results in a well‐resolved Lorentzian component of noise spectra. The results demonstrate that the SCLC and two‐level RTS phenomenon are correlated effects. They should be taken into account during the development of single‐trap‐based devices, including biosensors.

Effect of Quasi-One-Dimensional Properties on Source/Drain Contacts in Vertical Nanowire Field-Effect Transistors (VNWFETs).

In this study, we investigated the influence of quasi-one-dimensional (Quasi-1D) characteristics on the source and drain contact resistances within vertical nanowire (NW) field-effect transistors (FETs) of diminutive diameter. The top contact of the NW is segregated into two distinct regions: the first encompassing the upper surface, designated as the axial contact, and the second encircling the side surface, known as the radial contact, which is formed during the top-contact metal deposition process. Quantum confinement effects, prominent within Quasi-1D NWs, exert significant constraints on radial transport, consequently inducing a noticeable impact on contact resistance. Notably, in the radial direction, electron tunneling occurs only through quantized, discrete energy levels. Conversely, along the axial direction, electron tunneling freely traverses continuous energy levels. In a meticulous numerical analysis, these disparities in transport mechanisms unveiled that NWs with diameters below 30 nm exhibit a markedly higher radial contact resistance compared to their axial counterparts. Furthermore, an increase in the overlap length (less than 5 nm) contributes to a modest reduction in radial resistance; however, it remains consistently higher than the axial contact resistance.

Comparison of SiGeC/SiGe/SiC–Si heterojunction based vertical nanowire FET using non equilibrium Green's function

Advancement in FET technology has forced researchers to seek alternate semiconductor devices and materials. TFETs, junctionless FETs, and nanowires are a few examples of modern FETs, whereas Si alloys, graphene, and TMDC are a few materials that have shown promising behaviour to replace Si in the future. In this work, SiGeC/SiGe/SiC–Si based vertical heterostructure nanowires have been investigated. Due to the nanoscale dimensions of the FET and to incorporate the quantum effects along with Schrodinger-Poisson equations, non-equilibrium Green's function has been used as a principle simulator. For simulation, Ge/Carbon mole concentration of 0.25 and 0.01, respectively is used. To thoroughly investigate the effect of variation in doping profile and temperature range, simulated heterojunction nanowire showed that SiGeC-based nanowire result in a better ION/IOFF ratio as compared to SiGe and SiC-based heterojunction nanowire.