Nanotube Thin-film Transistors Research Articles

Low-power carbon nanotube-based integrated circuits that can be transferred to biological surfaces

Integrated circuits that can be interfaced with biological systems could expand the function of electronic devices, providing, for example, advanced forms of monitoring, diagnosis and therapy in clinical applications. However, limitations in the performance of electronic devices on flexible or biodegradable substrates constrain the complexity and power dissipation of such devices. Here, we report carbon nanotube-based thin-film transistors and integrated circuits that can be transferred to arbitrary surfaces. We show that this wafer-scale platform can be transferred to biodegradable polymers, plant leaves and a person's wrist, and demonstrate the operation of the transferred devices and circuits on a curved plant leaf. Our nanotube thin-film transistors on biodegradable flexible substrates have ultralow power consumption with an off-state current as low as 0.1 pA μm−1, a subthreshold swing of 62 mV dec−1, and a static power consumption of 2.5 × 10−13 W in an inverter. The thin-film transistors also exhibit highly uniform performance with an 80 mV standard deviation in the threshold voltages. Furthermore, we constructed a full adder integrated circuit, with rail-to-rail outputs and a read-only memory, on a flexible substrate that can be driven by a small single supply voltage of 2 V.

Fabrication and characterisation of high-performance and high-current back-gate thin-film field-effect transistors using sorted single-walled carbon nanotubes

The authors present the wafer scale fabrication and characteristics of back-gate semiconducting carbon nanotube thin-film field-effect transistors (SN-TFTs) suitable for high-current applications. Good on-off current ratio TFTs using affordable 95- purity semiconducting tubes by appropriately choosing the length of the nanotubes and improving the nanotube density have been demonstrated. Moreover, the nanotube thin-film deposition is carried out using a simple solution-based assembly method and good TFT performance and high currents are achieved with random-oriented network of nanotubes. Hafnium oxide (HfO x ) is used as the gate dielectric material to improve the device performance. The global gate devices have shown an excellent p -type behaviour with a low output conductance value of 0.3 S. The SN-TFTs have exhibited a maximum on off ratio of 4 10 4 at lower operating gate voltages, a maximum on-current of 3.1 mA at a current density of 6.2 A/ m, a steep sub-threshold slope of 600 mV/decade, threshold voltage of 1.5 V, a maximum normalised transconductance of 0.7 S/ m and a maximum carrier mobility of 44.2 cm 2 /V s.