Nanoelectronics Research Articles

Quo vadis, worldwide nanoindustry?

An overview of key stages in nanotechnology progress and the world nanoindustry market development has been carried out. A comprehensive analysis of patents, including the growth rate of numbers of patent applications from 2001 to 2014; patent distributions between countries, institutes, and companies; and a compilation of main areas in patent protection is given. The main part of the review is devoted to trends in three primary clusters in nanoindustry: nanomaterials, nano(opto)electronics, and nanomedicine. Characteristics of the most interesting products and technologies in the main fields of interest are presented, including classification, market value, and main applications.

An Overview of Recent Progresses in Nanotechnology

Nanotechnology is one of the research fields which draw serious attention of industrialists. It deals with the methods used to study the physical events and construction of structures in the range of 1-100 nanometres (nm). Incorporation of these structures into applications also takes a part. The enormous potential to build materials with unique properties for different applications makes it an area of profound interest. The nanotechnology based products include electronics goods, sporting materials, personal care and automotive parts. However the main disadvantage is that these materials and their unique characteristics pose considerable risks to environment and human health. Understanding the scope and diversity of the industry is a vital step in identifying potential risks related with them. It is like an electronics industry toolkit that gives us tools which permit us to make nanomaterials with ultra-fine particle size and crystalline structure. The application of nanotechnology in telecommunication industry is also on the rise. The strategies speaking on include sensors, Nano scale antennae and nanotubes. The primary aim of this paper is to study the recent aspects of “nanotechnology”. It also gives a brief explanation of nanotechnology and its applicability in various fields such as medicine, food technology, computing, robotics, solar cells etc. Towards the end a brief overview of emerging commercial applications of Nano electronics has been included. Risks experienced in advanced nanotechnology are also discussed.

Methodological aspects of the study branch of science histology (as electron microscopy) under the formation of a new technological order (Russia, the second half of the XX century - the beginning of the XXI century)

After analyzing the obtained during the investigation, the information we can talk about the existence of several major periods in the development of electron microscopy of the XX century in Russia. The first period is descriptive, on the basis of works on the history of certain biological sciences, cytology, histology, as well as the basic approach to the presentation of their main methods [E.M. Vermel, 1970; R.F. Kapustin, A.A. Gorbach, 2014], which states that no matter how improved the microscope, he would not allow to penetrate the secrets of cell morphology, if not at the same time to improve the technique of material processing, machinery manufacturing “microscopic sample» [Z.S. Katsnelson, 1963]. Destinations many studies have allowed through the use of modern methods of microscopy to link all stages of development of an organism with certain cell structures [L.Y. Blyakher, 1968]. The next period is associated with the development of technologies in the improvement and dissemination of electron microscopy. There has been a real surge of new directions in mikropostroenii are absorbed microscopes that meet all modern technical requirements [B.K. Ioannisiani, 1960; M.P. Panfilov, 1970]. Out of electron microscopy in the sphere of large-scale production and export to the world markets, identified the third stage of development of electron microscopy. Methodological analysis of the results allows us to determine the following main tendencies of development: use of nanoelectronics, the ability to explore the structure of organisms; in the formation of a new technological order play an important role public investment in microscopy, which form the basis of the spread of this method in the world and Russian economy [S.Yu. Glazyev, 2009]; scientific justification for ways to optimize physical resources and production processes, which are of a purely applied character, its practical importance can be manifested in the following forms: nanoelectronics, nanomaterials, nanobiotechnology and nanoequipment [S.Yu. Glazyev, 2010]. Thus, such a timely practical development can provide investment and the leading position of this sector in the crest of the wave of a new economic order.

Optical and electronic properties of N/B doped graphene

Since its discovery in 2004, the graphene has attracted great attention because of its unique chemical bonding structure, which has excellent chemical, thermal, mechanical, electrical and optical properties. Due to the graphene being a zero band gap material, it has a limited development in the field of nano electronics. Therefore, in order to broaden its application scope, it is very important to carry out a study on opening the band gap of graphene. In this paper, we construct three models, i.e., the intrinsic graphene model, the N-doped graphene model, and the B-doped graphene model. We study the energy band structures and the electronic densities of states for the intrinsic graphene and the N/B doped graphenes with different doping concentrations. Furthermore, we study their optical and electronic properties including the absorption spectra, the reflection spectra, the refractive indexes, the conductivities, and the dielectric functions. The results are as follows. 1) The electronic states in the vicinity of the Fermi level for the intrinsic graphene are mainly generated by the C-2p orbits, while the electronic states in the vicinity of the Fermi level for the N/B doped graphenes are mainly generated through the hybridization between C-2p and N-2p/B-2p orbits. N doped graphene is of n-type doping, while B doped graphene is of p-type doping. 2) Compared with that of the intrinsic graphene, the Fermi level of N doped graphene moves up 5 eV. In the meantime, the band gap is opened, and the Dirac cone disappears. On the contrary, the Fermi level of B doped graphene moves down 3 eV compared with that of the intrinsic graphene. However, like the N doping, the band gap is also opened, and the Dirac cone disappears. Furthermore, the N doping is more effective than the B doping in opening the energy gap of the graphene for the same N/B doping concentration. 3) The N/B doping can cause the optical and electronic properties of the graphene to change, and exert great influences on the absorption spectrum, reflection spectrum, the refractive index, and the dielectric function, however it has little influence on the conductivity. When the energy of the incident wave is larger than a certain value, the optical and electrical properties of the intrinsic graphene remain unchanged. Besides, for the above case, the corresponding energies for the N/B doped graphenes are smaller than that for the intrinsic graphene. In addition, the energy for the B doped graphene is smallest. The conclusions of this paper can provide a theoretical basis for the application of graphene in optoelectronic devices.

Study of Structural and Electronic Properties of Doped Arm Chair Single-Walled Carbon Nanotubes

Structural and electronic properties of endohedrally doped armchair single-wall carbon nanotubes (SWCNTs) with a chain of six atoms of Ag and Cu have been studied using ab-initio density functional theory. We investigate the binding energy/atom, ionization potential, electron Affinity and Homo-Lumo gap of doped armchair SWNTs from (4,4) to (6,6) with two ends open. BE/atom is maximum for (5, 5) doped armchair carbon nanotube; suggest that it is more stable than (4, 4) and (6, 6) doped tubes. Whereas ionization potential of Ag doped tubes is more and electron affinity is less with respect to of Cu doped tubes showing that Ag doped tubes are less reactive than Cu doped tubes. Homo- Lumo gap of doped arm chair tubes decreases exponentially with the increase in diameter of the tubes. This shows that confinement induce a strong effect on electronic properties of doped tubes. These combined systems can be used for future Nano electronics. The ab–initio calculations were performed with SIESTA code using generalized gradient approximation (GGA).

Growth of Graphene Nanocoil in a SiC Container: A Molecular Dynamics Study

Graphene nano structures find their application in modern nano electronics because of their excellent mechanical, unique electronics and electrical properties owing to the ballistic transport, where the charge carriers can move freely without getting scattered. In this work, we show a possibility to grow a miniaturised coil from a pre-existing graphene coil layer using molecular dynamics simulation. From our calculations it was observed that isolated carbon atoms get attached to the edge of the initial graphene coil and form an extension of the coil structure. The growth process depends strongly on the chirality of the growth front as well as the growth temperature. An optimal temperature between 2000 - 2300 K was proposed for all the edge structures except armchair (2500 K) type for the maximum number of the new hexagonal rings. Our results predict a technique that can be adopted experimentally to grow graphene nanocoil.

Controlled synthesis and property of horizontally aligned carbon nanotubes

Horizontally aligned carbon nanotubes (HACNTs) refers to the horizontally aligned CNT arrays grown and parallel on flat substrates, with relatively large intertube distances. Due to their perfect structures, excellent properties and lengths up to millimeters, even centimeters, HACNTs show great potential as building blocks for transparent displays, nano electronics, quantum lines, field emission transistors, superstrong tethers, and aeronautics and aerospace materials, etc. Great development was obtained on the study of ultralong CNTs during the past decade. In this review, we summarize the recent progress on the growth mechanism, structure-controlled synthesis, optical visualization, controllable manipulation, mechanical, electrical and thermal properties, as well as the superlubricity between the shells of HACNTs. First we review the growth mechanism of ultralong CNTs, pointing out the key for obtaining CNTs with perfect structures, extraordinary properties and macroscale lengths. We then discuss the controlled synthesis of ultralong CNTs with various chirality, diameters, lengths, and morphologies, etc. After that, we discuss the optical visualization, controllable manipulation, structure and property characterization, and superlubricity of HACNTs. Finally, an outlook is presented to shed light on the future study of ultralong CNTs.

(Invited) A Metal Oxide Antifuse-Diode Device

Crystalline metal oxides have been used in various micro and nano electronics and optoelectronics, such as conductors, superconductors, and light emitting devices (LEDs). The amorphous metal oxide dielectric is usually a high-k material suitable for the insulation purpose. The doped metal oxide, such as the Zr-doped HfO2 (ZrHfO), high-k thin film has many advantageous material and electrical properties, such as the high crystallization temperature, low interface layer thickness in contact with Si, and low interface density of states (1). When nanocrystals are embedded into the high-k metal oxide dielectric thin film, electrons and charges can be stored for a long period of time, which is suitable for the nonvolatile memory application (2). Recently, it was proved by the author’s group that the broad band white light could be emitted from the metal oxide dielectric thin film after the dielectric breakdown due to the thermal excitation of the nano size conductive paths (3). In this talk, a new high-k dielectric based device that shows both antifuse and diode functions is reported. Figure 1 shows a large “programmed” to “unprogrammed” leakage current ratio of 105 is obtained from an original MOS capacitor made of a high-kgate dielectric on a p-type wafer, which fits the antifuse requirement. Figure 2 shows that for a same device in the programmed state, the leakage current increases with the increase of the magnitude of the gate voltage in the negative voltage range. However, the leakage current remains low and changes little over a large range of gate voltage in the positive voltage range, which is similar to the diode behavior. On the other hand, the leakage current-voltage curve of the new device is almost linear while that of the conventional diode follows the exponential relationship. The operation physics, structure, and material properties of the new device will be discussed in detail. Y. Kuo, J. Lu, S. Chatterjee, J. Yan, H. C. Kim, T. Yuan, W. Luo, J. Peterson, and M. Gardner, “Sub 2 nm Thick Zirconium Doped Hafnium Oxide High-K Gate Dielectrics,” ECS Trans., 1(5), 447-454 (2006).Y. Kuo, invited, “Nanocrystals Embedded High-k Nonvolatile Memories – bulk film and nanocrystal material effects,” ECS Trans., 53(4), 121-128 (2013).Y. Kuo, invited, “A Solid State Thin Film Incandescent Light Emitting Device,” Proc. IDEM, 104-107 (2014). Figure 1

(Invited) MOS Interface Control Technologies for Advanced III-V/ Ge Devices

One of the most critical issues for III-V/Ge MOSFETs, which have been regarded as a promising CMOS structure under sub 10 nm regime, is formation of superior gate stacks satisfying the requirements of thin EOT, excellent MOS interface quality enabling high channel mobility and low S factor and high reliability. As a result, MOS interface control engineering is still of paramount importance. In this presentation, we focus on viable III-V/Ge gate stack technologies by using ALD high-k films for realizing these requirements.Two types of III-V semiconductors, InGaAs- and GaSb-based materials, have currently stirred a strong interest for n- and p-MOSFETs, respectively. In addition, the GaSb-based materials have become important for tunnelling FET application. As for InGaAs gate stacks, the insertion of 0.2-nm-thick ultrathin Al2O3 inter-layer can effectively improve the HfO2/InGaAs interface properties, resulting in 1-nm-thick CET HfO2/Al2O3/InGaAs MOS gate stacks with low gate leakage of 2.4×10-2 A/cm2 [1]. The resent studies have revealed that ALD La2O3 gate stacks can yield lower Dit than the Al2O3 ones [2, 3], indicating that La2O3 can be a promising high k material for III-V gate stacks. On the other hand, we have found that the InGaAs gate stacks using La2O3 only can include a large amount of slow traps. We present that ultrathin La2O3 interface control layers combined with Al2O3 and HfO2 can optimize both fast interface state density and slow trap density near the MOS interfaces.As for GaSb gate stacks, much higher Dit of Al2O3/GaSb MOS interfaces than that of Al2O3/InGaAs MOS interfaces severely degrades the device performance. Any thermal processing significantly is observed to increase Dit at Al2O3/GaSb interfaces [4]. It is shown that InAs passivation can effectively improve the MOS interface properties and the thermal stability [5]. As a result, 2.5-nm-thick InAs passivation can provide the peak hole mobility of 159 cm2/Vs for Al2O3/InAs/GaSb pMOSFETs [6]. In addition, surface treatment for InAs/GaSb hetero-structures by buffered HF, instead of conventional (NH4)2Sx, can further improve Dit at the MOS interfaces with Al2O3 [7].As for Ge gate stacks, we have presented ultrathin EOT Al2O3/GeOx/Ge and HfO2/Al2O3/GeOx/Ge gate stacks, fabricated by a plasma post oxidation method [8, 9]. HfO2/Al2O3/GeOx/Ge gate stacks with EOT of 0.76 nm have yielded (100) Ge p- and n-MOSFETs with high peak mobility of 546 cm2/Vs and 690 cm2/Vs, respectively [9]. We evaluated limiting factors of electron and hole mobility in Ge n- and p-MOSFETs. In a high Ns region the Ge MOS channel mobility is significantly degraded by surface roughness scattering as well as trapping of free electrons and holes into interface states inside the conduction and valence bands [10, 11]. The mobility in the high Ns region can be improved by reduction in surface roughness through a layer-by-layer plasma oxidation process [10]. Also, atomic Deuterium annealing can reduce Dit inside the bands, resulting in higher effective mobility [12]. However, the decrease in slow trap density for the Ge MOS gate stacks is a strong concern. While we observed the decrease in slow trap density near the valence band edge of Ge for ALD AlYO3/GeOx/Ge gate stacks formed by plasms post oxidation [13], the reduction in slow trap density for n-MOSFETs has not been obtained yet. Further optimization of Ge gate stacks is strongly needed for obtaining sufficient reliability in Ge CMOS.This work was partly supported by JST-CREST, the Grant in-Aid for Scientific Research through the MEXT (26249038), and the Innovation Research Project on Nano electronics Materials and Structures from NEDO. The authors would like to thank Drs. H. Yamada and O. Ichikawa in Sumitomo Chemical Corporation, and Drs. H. Yokoyama and M. Mitsuhara in NTT for their collaborations.

Gold Nanorods: Synthesis, Growth Mechanism and Purification

Gold nanorods have caused much attention due to their unique physical properties. Nowadays, gold nanorods have created a great promise for their use in nanoelectronic, optical and biomedical applications. By adjustment of experimental conditions, the morphology, size and aspect ratio of gold nanorod can be finely controlled, which finally affect the physical properties of gold nanorods. In this review, the various synthesis methods of gold nanorods, such as template method, electrochemical synthesis method, seeded growth method and even recently developed seedless growth method are summarized. The effects of experimental conditions on the crystal structures and physical properties of gold nanorods are discussed in detail, along with the recent research progress on the growth mechanism of single-crystalline and pentahedrally-twinned nanorods. Finally, general strategies to improve the purity of product are provided.

(Gordon E. Moore Medal for Outstanding Achievement in Solid State Science and Technology) Research on Nano and Giga Electronics – Breakthroughs Along the Path

ICs and TFT LCDs are two largest semiconductor industries nowadays. The former is mainly driven by the Moore’s Law in the continuous shrinkage of the nano-size devices for improved speeds and functions. The latter has progressed toward the manufacture of high density devices on the ultra-large glass substrate. However, the most critical devices in both products, i.e., MOSFETs and TFTs, are operated based on the same principle. The success of these technologies is dependent on the thorough understanding and controlling of material properties, fabrication processes, and device physics. In this presentation, I will review some key breakthroughs achieved in my laboratory, such as the generalized material-process-device relationship for the large-area TFT array, the simplest 2-mask TFT process, the plasma radiation damage mechanism, the plasma-based room-temperature copper etch process, the doped metal oxide high-k gate dielectrics, the nanocrystals embedded high-k nonvolatile memories, the solid-state incandescent LEDs, and various new devices. Future developments of the technologies will be discussed.

(Invited) High Performance III-V-on-Insulator MOSFETs on Si Realized by Direct Wafer Bonding Applicable to Large Wafer Size

MOSFETs using III-V channels with high mobility and low effective mass have been regarded as strongly important for obtaining CMOS under sub 10 nm technology nodes [1, 2]. One of the critical issues to realize III-V MOSFEs is to form high quality III-V films on large size Si wafers. This heterogeneous integration of III-V devices on Si wafers must be explored for realizing high device performance as well as merging electrical and photonic applications on the Si platform. The existing methodologies could have unavoidable drawbacks such as inferior device quality or high cost in comparison with the current Si-based technology. We have already proposed and demonstrated ultrathin-body (UTB) InGaAs- and GaSb-based channel formation on Si substrates by using direct wafer bonding [3-10]. A UTB (3.2 nm InGaAs)/ultrathin buried oxide (UTBOX) (Al2O3(4.4 nm)/SiO2 (3.3 nm))/Si substrate [3] and a UTB quantum well channel (3 nm InGaAs/3 nm InAs/3 nm InGaAs/ UTBOX/Si) substrate [7, 8] have provide superior MOSFET performance due to the high channel material quality. Here, the III-V channels epitaxially-grown on III-V substrates have been transferred to Si substrates, indicating that the wafer size of III-V layers is limited to that of the available III-V host substrates such as InP. As a consequence, this method is not simply applicable to III-V-on-Si substrates with large Si wafer sizes of 300 nm and beyond. In this study, we present InGaAs-on-insulator (-OI) fabrication from an InGaAs layer grown on a Si donor wafer with a III-V buffer layer instead of growth on an InP donor wafer. In this novel DWB technique using a Si donor wafer, InGaAs/InxAl1-xAs/GaAs layers were epitaxially grown on Si substrates first. After Al2O3 atomic layer deposition as a BOX layer, CMP has been carried out for surface smoothing for Al2O3/III-V/Si wafer and wafers were bonded each other. Subsequent wet etching thinned the top Si and the III-V buffer layers, resulting in the formation of InGaAs-OI on Si substrates. While the present demonstration has employed 4-inch Si host substrates, this technology allows us to yield large wafer size scalability of III-V-OI layers up to the Si wafer size of 300 mm with a high film quality and low cost. The high film quality has been confirmed by Raman and photoluminescence spectra. Also, in order to evaluate the electrical properties, InGaAs-OI MOSFETs was fabricated with the same fabrication process as in the present works [5-8]. Here, gate stack was composed of 10 nm Al2O3 and Ta gate metal. S/D was formed by Ni-InGaAs metal S/D. We have confirmed the good ID-VG curves with a subthreshold slope of 100 mV/dec and on/off ratio > 106 for InGaAs-OI MOSFETs with body thickness of 9 nm and LG of 1 μm. The high electron mobility of 1700 cm2/Vs and the mobility enhancement of 3× against Si MOSFETs have been demonstrated. InGaAs-OI MOSFETs fabricated from the Si donor wafer exhibit high mobility comparable to that from the InP donor wafer, indicating that the present wafer fabrication process can realize sufficiently high quality InGaAs-OI on Si wafers with the same level as those obtained from the InP donor wafer. The leakage current of InGaAs-OI MOSFETs fabricated from the Si donor wafer is also found to be uniform and as low as that from the InP donor wafer. As a result, thanks to the change of donor wafers from InP to Si, the present integration scheme of DWB for InGaAs-OI provides excellent wafer scalability up to the Si wafer size > 300 mm with maintaining high device quality. This work was partly supported by the Innovation Research Project on Nano electronics Materials and Structures, and Research and Development Program for Innovative Energy Efficiency Technology from NEDO and JST-CREST. The authors would like to thank Drs. M. Hata, T. Osada, O. Ichikawa, and H. Yamada in Sumitomo Chemical Corporation for their collaborations.

Adhesion energy of single wall carbon nanotube loops on various substrates

The physics of adhesion of one-dimensional nano structures such as nanotubes, nano wires, and biopolymers on different material substrates is of great interest for the study of biological adhesion and the development of nano electronics and nano mechanics. In this paper, we present force spectroscopy experiments of a single wall carbon nanotube loop using our home-made interferometric atomic force microscope. Characteristic force plateaux during the peeling process allows us to access to quantitative values of the adhesion energy per unit length on various substrates: graphite, mica, platinum, gold and silicon. By combining a time-frequency analysis of the deflexion of the cantilever, we access to the dynamic stiffness of the contact, providing more information on the nanotube configurations and its intrinsic mechanical properties.

(Gordon E. Moore Medal for Outstanding Achievement in Solid State Science and Technology) Research on Nano and Giga Electronics – Breakthroughs Along the Path

MOSFETs and TFTs are key semiconductor devices in the two largest semiconductor industries nowadays. The development of the former follows the Moore’s Law in shrinking of the size to the nano scale. The advancement of the latter is toward the high density, large area array. They are operated based on the same principle and facing common challenges. The success is dependent on the thorough understanding of material properties, fabrication processes, and device physics. The author reviews two sets of critical works developed in his laboratory, i.e., plasma thin film technology and high-k thin films for electronics and optoelectronics.

Chemically synthesized nano composite (Zinc/Magnesium) Oxide for tunable band gap devices

Formation of hetro structures in nano structured materials is essential for their potential applications in nano electronics and photonic devices. As a promising candidate for blue and ultraviolet optoelectronic devices, ZnO has attracted much attention due to its wide band gap (3.37eV), large exciton binding energy (60meV), low epitaxial growth temperature and high oxidation resistance. In addition since the ionic radii of Mg+2+(0.57A0) and Zn2+(0.60A0) are quite close, they may alloy by replacing each other in the matrix. The doping of Mg in ZnO is done through a simple and novel technique from metal acetates using ammonium carbonate as precipitant. An organic capping agent (EDTA) is used prevent agglomeration and the addition is done under constant stirring. The carbonate precursor obtained is heated on the basis of TGA to obtain the metal nano composite. The effects of different parameters on particle size and morphology of (Zn-Mg)O nano composite is optimized by "one at a time" method. Under optimum conditions, spongy shaped, uniform and homogeneous structured (Zn-Mg)O nano composite powders with particle size few nano meters are obtained. The optical and structural properties of nano composite prepared by solution techniques are investigated by X-ray diffraction, UV-Visible spectroscopy, and PL, FTIR and electron microscopy techniques. The effect of annealing on the optical properties of this nano composite is also studied

Planning the priority of high tech industries based on SWARA-WASPAS methodology: The case of the nanotechnology industry in Iran

Decision-making and planning at the top level is highly complicated. One important duty of each government and of policy makers is planning at different levels for future problems. This research addresses such a concern. Planning for the future is the aim of this research. Moreover, the importance of the topic is discussed. The case study focused on is the nanotechnology industry and its development in Iran. Nanotechnology is one of the main and strategic industries in Iran. The important criteria for such a development are determined based on a literature review and the experiences from other countries. The different alternatives are selected based on the different applications of nanotechnology in other industries. The alternatives are: agriculture, transportation, construction, oil and gas, textile products, food industry, defence industry, health and medicine, nano electronics, nano energy and environment and water. The methodology employed is Multiple Criteria Decision Making (MCDM). In addition, SWARA-WASPAS is the hybrid MADM model employed in which SWARA is applied to evaluate the criteria and WASPAS is utilised to evaluate and rank the alternatives.

Nano Electronics: A New Era of Devices

The technical and economic growth of the twentieth century was marked by evolution of electronic devices and gadgets. The day-to-day lifestyle has been significantly affected by the advancement in communication systems, information systems and consumer electronics. The lifeline of progress has been the invention of the transistor and its dynamic up-gradation. Discovery of fabricating Integrated Circuits (IC’s) revolutionized the concept of electronic circuits. With advent of time the size of components decreased, which led to increase in component density. This trend of decreasing device size and denser integrated circuits is being limited by the current lithography techniques. Non-uniformity of doping, quantum mechanical tunneling of electrons from source to drain and leakage of electrons through gate oxide limit scaling down of devices. Heat dissipation and capacitive coupling between circuit components becomes significant with decreasing size of the components. Along with the intrinsic technical limitations, downscaling of devices to nanometer sizes leads to a change in the physical mechanisms controlling the charge propagation. To deal with this constraint, the search is on to look around for alternative materials for electronic device application and new methods for electronic device fabrication. Such material is comprised of organic molecules, proteins, carbon materials, DNA and the list is endless which can be grown in the laboratory. Many molecules show interesting electronic properties, which make them probable candidates for electronic device applications. The challenge is to interpret their electronic properties at nanoscale so as to exploit them for use in new generation electronic devices. Need to trim downsize and have a higher component density have ushered us into an era of nanoelectronics.

Controlled stripes of ultrafine ferroelectric domains.

In the pursuit of ferroic-based (nano)electronics, it is essential to minutely control domain patterns and domain switching. The ability to control domain width, orientation and position is a prerequisite for circuitry based on fine domains. Here, we develop the underlying theory towards growth of ultra-fine domain patterns, substantiate the theory by numerical modelling of practical situations and implement the gained understanding using the most widely applied ferroelectric, Pb(Zr,Ti)O3, demonstrating controlled stripes of 10 nm wide domains that extend in one direction along tens of micrometres. The observed electrical conductivity along these thin domains embedded in the otherwise insulating film confirms their potential for electronic applications.

(Invited) Non-Equilibrium Transport Theory Applied to Nano Electronics Problems

Theory of non-equilibrium transport has progressed a lot. The self-consistent theory of both electric and phonon (and hence heat) currents including the electro-phonon coupling effects between them has been developed and it provides us useful information of the heat generation and the heat dissipation effects accompanying the currents. It will be a useful basic theory for the device simulator, if it could be combined with a large scale electronic structure method something like the DFTB method with which micron meter scale devices can be handled within realistic computational resources. The progress in this direction would be very fruitful for both semiconductor physics and device physics. Yet another useful example is a more material oriented study. In terms of the standard first principle Non-Equilibrium Green Function (NEGF) method, for an example, we discuss channel and electrode material dependence in electric current versus bias voltage profile of the resistive random access memory cell.

Non-Equilibrium Transport Theory Applied to Nano Electronics Problems

Atomistic non-equilibrium transport theory has been developed a lot in a bit different community than the nano-electronics, i.e., the atomic and molecular junctions community.[1] The NEGF (non-equilibrium Green function) method has been combined with first principle electronic structure methods, which has become a standard tool in nano-electronics, too, nowadays. After making a brief overview of the latest progresses obtained in non-equilibrium transport theory including the heat problem and the noise problem, we will discuss some results obtained in our nano-electronics research. The subject of our discussions includes channel and electrode materials dependence of transport properties of some resistive RAM junctions. [2]Ref.)[1] Yoshihiro Asai, “Nonequilibrium phonon effects on transport properties through atomic and molecular bridge junctions”, Phys. Rev. B 78, 045434 (2008).[2] Takehide Miyazaki, Hisao Nakamura, Kengo Nishio, Hisashi Shima, Hiroyuki Akinaga, and Yoshihiro Asai, ”First-Principles Transport Modeling for Metal/Insulator/Metal Structures”, JPS Conf. Proc. , 012075 (2014).ACKNOWLEDGMENTSThe authors would like to thank to Drs. Takehide MIYAZAKI, Kengo NISHIO, Hisashi SHIMA, and Hiroyuki AKINAGA for their collaborations and discussions.